IEEE SOLID-STATE CIRCUITS MAGAZINE Fall 2012 1 Senior Administrator, Katherine Olstein Terms to 31 Dec

FALL 2012 VOL. 4 • NO. 4 www.ieee.org/sscs-news

INTRODUCTION TO SYSTEMS features CARVER MEAD • LYNN CONWAY 8 Reminiscences of the VLSI Revolution How a series of failures triggered a paradigm shift in digital design. By Lynn Conway

32 A Paradigm Shift Was Happening All Around Us By Chuck House

36 Witnessing the Birth of VLSI Design By Carlo H. Séquin

about this image: This book helped start a revolution; read 40 “Covering” all about it starting on p. 8. H ow we missed the inside-story of the VLSI revolution. By Ken Shepard

tutorial columns/ 43 On the Other Applications departments of Organic Electronics on Foil 3 Contributors By Hagen Marien, Michel S.J. Steyaert, 4 Editor’s Note Erik van Veenendaal, and Paul L. Heremans 5 r P esident’s Corner 6 associate editor’s view 50 people 54 Chapters 61 o s ciety News 62 iEEE news 64 Conference Reports 71 Conference Calendar CVR 3 footer

Digital Object Identifier 10.1109/MSSC.2012.2214274

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 1 Senior Administrator, Katherine Olstein Terms to 31 Dec. 2014 IEEE solid-state IEEE SSCS, 445 Hoes Lane Christian Enz, Hideto Hidaka, Kofi Makinwa, Piscataway, NJ 08854 USA Boris Murmann, Roland Thewes circuits magazine Tel: +1 732 981 3410 Fax: +1 732 981 3401 Region 8 Representative Editor-in-Chief Bram Nauta Mary Y. Lanzerotti SSC Administrative committee [email protected] Region 10 Representative President, Rakesh Kumar [email protected] Vacant Technology Connexions, Inc. TECHNOLOGY EDITOR Poway, California, USA Chairs of Standing Committees Jake Baker Vice-President, Bill Bidermann Awards—John J. Corcoran [email protected] Zeebo, Inc. Chapters—Jan Van der Spiegel Secretary, Trudy Stetzler Education—Domine Leenaerts Tutorials Editor TI, Inc. Meetings—Ken O Willy Sansen Membership—Tzi-Dar Chiueh [email protected] Treasurer, H.S. Lee, MIT Nominations Past President, Bernhard Boser —Bernhard Boser Associate Editor for the far east UC Berkeley Publications—Glenn Gulak Pengfei Zhang [email protected] Other Representatives Representative to Sensors Council ASSO CIatE EDITOR FOR Darrin Young IEEE Periodicals/ EUROPE AND AFRICA Representative to CAS from SSCS Magazines Department Marcel Pelgrom Tony Chan Carusone [email protected] Senior Managing Editor Representative to SSCS from CAS Geraldine Krolin-Taylor C OntRIBUTING EDITOR Michael Flynn Tom Lee Representatives to EDA Council senior Art Director Janet Dudar [email protected] Bryan Ackland, Vivek Tawari News Editor Representatives to ISSCC Assistant Art Director Katherine Olstein Bryan Ackland, Jan Van der Spiegel Gail A. Schnitzer [email protected] Representative to IEEE GOLD Program production coordinator Emre Ayranci Theresa L. Smith MAGAZINE ADVISORY COMMITTEE Representatives to Nanotechnology Council Chair: Richard Jaeger S taff Director, Publishing Operations Jake Baker, Erik Heijne, Elad Alon, Ian Young Fran Zappulla Michael Kelly, Rakesh Kumar, Representative to Technical Committee on RFID Mary Lanzerotti, Tom Lee, Shahriar Mirabbasi Editorial Director Dawn M. Melley Katherine Olstein, Representative to Engineering Technology Marcel Pelgrom, Willy Sansen, Management Council Production Director Lewis Terman, Alice Wang, Pengfei Zhang Mike Beunder Peter M. Tuohy Representative to Biometrics Council Advertising Production Manager Bruce Hecht Felicia Spagnoli IEEE solid-state Elected AdCom Members at Large Business Development Manager circuits society Terms to 31 Dec. 2012 Susan Schneiderman +1 732 562 3946 Fax: +1 732 981 1855 Executive Director, Michael Kelly Kerry Bernstein, John J. Corcoran, [email protected] IEEE SSCS, 445 Hoes Lane Hae-Sung (H.S.) Lee, Trudy Stetzler, www.ieee.org/ieeemedia Piscataway, NJ 08854 USA William Redman-White Tel: +1 732 981 3400 Terms to 31 Dec. 2013 IEEE prohibits discrimination, harassment, and Fax: +1 732 981 3401 Jake Baker, Tohru Furuyama, Franz bullying. For more information, visit http://www. [email protected] Dielacher, Peter Kinget, Stefan Rusu ieee.org/web/aboutus/whatis/policies/p9-26.html.

SCOPE: Each issue of IEEE Solid-State Circuits Magazine is envisioned as a self-contained resource for fundamental theories and practical advances within the field of integrated circuits (ICs). Written at a tutorial level and in a narrative style, the magazine features articles by leaders from industry, academia and government explaining historical milestones, current trends and future developments. contact information: See the “Contact Us” page on SSCS Web site: http://ewh.ieee. org/soc/sscs/index.php? option=com_content&task=view&id= 10&Itemid=3. IEEE Solid-State Circuits Magazine (ISSN 1943-0582) ( SCMOCC) is published quarterly by The Institute of Electrical and Electronics Engineers, Inc. Headquarters: 3 Park Avenue, 17th Floor, New York, NY 10016-5997, USA +1 212 419 7900. Responsibility for the contents rests upon the authors and not upon the IEEE, the Society, or its members. The magazine is a membership benefit of the IEEE Solid-State Circuits Society, and subscriptions are included in Society fee. Replacement copies for members are available for $20 (one copy only). Nonmembers can purchase individual copies for $155.00. Nonmember subscription prices are available on request. Copyright and Reprint Permissions: Abstracting is permitted with credit to the source. Libraries are permitted to photocopy beyond the limits of the U.S. Copyright law for private use of patrons: 1) those post-1977 articles that carry a code at the bottom of the first page, provided the per-copy fee indicated in the code is paid through the Copyright Clearance Center, 222 Rosewood Drive, Danvers, MA 01970, USA; and 2) pre-1978 articles without fee. For other copying, reprint, or republication permission, write to: Copyrights and Permissions Department, IEEE Service Center, 445 Hoes Lane, Piscataway NJ 08854 USA Copyright © 2012 by The Institute of Electrical and Electronics Engineers, Inc. All rights reserved. Periodicals postage paid at New York, NY, and at additional mailing offices. Postmaster: Send address changes to IEEE Solid-State Circuits Magazine, IEEE, 445 Hoes Lane, Piscataway, NJ 08854 USA. Canadian GST #125634188 Printed in USA

Digital Object Identifier 10.1109/MSSC.2012.2214275 about the cover: Lynn Conway conceived of and became the principal author of the famous Mead-Conway text, thereby launching a worldwide revolution in VLSI system design in the late 1970s.

2 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE Contributors

Lynn Conway in- Carlo H. Séquin the design house AnSem as a senior vented scalable MOS is a professor of design engineer. design rules and computer science highly simplified at the University of Michel S.J. Stey methods for silicon California, Berkeley. aert is a full profes- chip design, con- After working with sor at the Katholieke ceived of and became the principal integrated circuits for two decades, Universiteit Leuven author of the famous Mead-Conway he now works on three-dimensional and chair of the text, and pioneered the intensive designs, ranging from architectural Electrical Engineer- course at MIT that taught these building models to abstract geomet- ing Department. methods, thereby launching a rical sculptures. worldwide revolution in VLSI system Erik van Veenen design in the late 1970s. Ken Shepard has daal is a principal been influenced by scientist at Polymer Chuck House was Lynn Conway’s work Vision BV. most recently chan- for more than 25 cellor of Cogswell years. He is a pro- College, Sunnyvale, fessor of electrical California, and exec- engineering at Columbia University. Paul L. Heremans utive director of is an imec fellow, Media X @ Stanford University after Hagen Marien director of imec’s a long career at Hewlett-Packard was a research assis- Large Area Electron- and Intel. tant in the ESAT- ics Department, and MICAS Laboratory part-time profes- of the Katholieke sor in the Electrical

Digital Object Identifier 10.1109/MSSC.2012.2215750 Universiteit Leuven. Engineering Department of the Uni- Date of publication: 24 December 2012 After finishing his Ph.D., he joined versity of Leuven.

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 3 editor’s note

Mary Lanzerotti

Welcome to the Fall 2012 Issue of IEEE Solid-State Circuits Magazine!

This Fall 2012 issue marks the fourth How a Series of Failures Triggered grateful for the work of our continuing issue of the fourth year of IEEE Solid- a Paradigm Shift in Digital Design,” News Editor Katherine Olstein and for TState Circuits Magazine. In this issue, and three expert articles in honor the columns of PengFei Zhang, associ- we are fortunate to feature Lynn Con- of Prof. Conway that describe the ate editor of Asia, and Tom Lee, conway, professor of Electrical Engineer- impact of her research: tributing editor. ing and Computer Science Emerita at ■■ Chuck House, “A Paradigm Shift The goal of each issue of IEEE Solid- the University of Michigan. This spe- Was Happening All Around Us” State Circuits Magazine continues to cial issue is titled “Lynn Conway: VLSI ■■ Carlo Séquin, “Witnessing the Birth be to create a series of self-contained Reminiscences.” We are delighted to of VLSI Design” resources, with original sources and be able to present the achievements ■■ Kenneth Shepard, “‘Covering’: new contributions by experts describ- in this special issue in honor of Prof. How We Missed the Inside-Story ing the current state of affairs in tech- Conway. of the VLSI Revolution.” nology in view of the influence of the In this issue, we present Prof. We are very fortunate for the sup- original papers and/or patents. Conway’s feature article, “Remi- port of our Executive Director Michael Thank you very much for reading niscences of the VLSI Revolution: Kelly, who joined the IEEE Solid-State IEEE Solid-State Circuits Magazine. Circuits Society in April 2012, and for Please send comments and “Letters

Digital Object Identifier 10.1109/MSSC.2012.2228430 our Tutorials Editor Willy Sansen and to the Editor” to marylanzerotti@ Date of publication: 24 December 2012 Technology Editor Jake Baker. We are post.harvard.edu.

4 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE By Lynn Conway Reminiscences of the VLSI Revolution: How a series of failures triggered a paradigm shift in digital design

Preface tedium and technical drudgery, seldom witnessing the nnovations in science and engineering joys of such creativity. have excited me for a lifetime, as they If only I could wave a wand, I’ve often wished, and have for many friends and colleagues. say “YOU CAN DO IT” to inspire young folks to dedicate Unfortunately, our wider culture often their lives to such adventures. But then various friends I imagines the engineering life to be one of asked me to write about my own career – a tale wherein Digital Object Identifier 10.1109/MSSC.2012.2215752 travails, setbacks, dark days and obscurity at times Date of publication: 24 December 2012 seemed the theme – and I wondered who’d be inspired

8 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE 1943-0582/12/$31.00©2012IEEE by such a journey, so often apparently lonely, difficult Edwin Armstrong pioneered the regenerative and and discouraging? super-regenerative circuits, the super-heterodyne radio However, after deeper contemplation and review, I receiver and FM radio. His visionary inventions involved realized that each setback in my story, each hardship, elegant arrangements of simple electronic components, actually strengthened my skills, my perspectives, and and helped launch a revolution in radio. my resolve. And when colleagues began reading the early drafts, they reacted similarly: “Wow, this is really Time and Place Are Everything something!” The story was authentic, real – maybe even Just as Steinmetz had with electrification and Armstrong surreal – and it actually happened. with wireless communication, I found myself a student The child who once dreamed of “making a difference,” at the beginning of a technological revolution: digital indeed made a difference after all. And with that, I’d like computing in the early 1960s. And, I was at the right to inspire YOU to imagine how you too can positively place: Columbia University’s School of Engineering and impact our world. Be assured, it won’t be easy, and fame Applied Science, with its close ties to IBM, then a leading may never come your way, but the satisfaction gained force in the emerging industry. from a life of creative work will be immense. Trust me Along with delving into every relevant course on this! in math, physics, electrical engineering, and computing, I also did an independent study there with Childhood Fascinations Dr. Herb Schorr, just prior to his joining IBM. I must have I loved listening to the radio made a good impression, for I was quickly recruited as a child during WWII, espe- by IBM Research and in 1965 found myself at the T. J. cially to BBC broadcasts from Watson Research Center at Yorktown Heights, work- London. Thrilled by hearing ing on a highly proprietary and secretive supercom- people speak from far away, puter project, a project unknown even to many within I wondered how this mysteri- the company. ous machine worked, with all The Advanced Computing Systems (ACS) project had the glowing tubes and strange- been personally launched by IBM’s then-CEO Thomas. looking parts inside. J. Watson, Jr., and given the mission to “go for broke” My father was a chemical to create the most powerful scientific computer in the engineer, and he gave me The world. Staffed with pre-eminent IBM computing experts Wonder Book of Knowledge as of the time including the legendary John Cocke, the one of my first ‘big books.’ project soon moved to what would become Silicon Valley From it I learned not only how [1], [2]. to read, but also how electric- Herb Schorr led ACS’s architecture department, where ity was tamed and radios were I worked on an architectural simulation model of the created, and that engineers did evolving hardware design. The initial design for the these things. ACS-1 exploited cache memory, instruction pre-fetch, Becoming fascinated by multiple pipelined functional units, and an innovative astronomy, math, physics and instruction set and branch hardware for anticipating ved. r electronics, and encouraged to and minimizing branch disruptions in instruction flow. build things that worked, I was There was a bottleneck in instruction issuance, however, channeled to become an engi- and functional units often stood idle as stalled instruc- Rights Rese neer. Among my heroes were tions awaited results. All Charles Steinmetz and Edwin Gene Amdahl, already famous inside IBM for his work Armstrong; I knew their sto- on System 360, along with other prominent computer ries well and dreamed of doing architects of the day, presumed that no single-stream such things. architecture could be found that issued, on average,

© 2012, Lynn Conway. Conway. Lynn © 2012, Steinmetz pioneered meth- more than one instruction per machine cycle [3]. Cocke ods for calculating alternating questioned this presumption, but no way had been found current phenomena using complex numbers, complex around the bottleneck – as yet. exponentials and vector diagrams, simplifying a highly Unaware that this was an open research question, arcane field. His books and passionate teaching launched I took it on as a design challenge and obsessed on it for the AC revolution, and his story carried an embedded over a month. I explored varying ways to represent and message: Someone who faced physical challenges (he issue instructions, mentally juggling all aspects of the was afflicted with hunchback and hip dysplasia) or who problem simultaneously – everything from mathematical was somehow perceived as different might become liked, abstractions, to architectural structures, to circuit-level even honored, if they made valuable contributions. implementations, but to no avail.

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 9 Cycle (n): Source Matrix Destination Matrix Busy Vector Branch 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 # ' ! 1 243 5 678 #'! + R3 R4 R7 11 1 1 1 1 1 * R7 R2 R4 11 1 1 + R1 R2 R5 11 1 1 ' R8 R1 R8 1 111

Cycle (n+1): Source Matrix Destination Matrix Busy Vector Branch 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 # ' ! 1 243 5 678 #' + R3 R4 R7 11 1 1 1 11 11 * R7 R2 R4 11 1 1 - R6 R3 R3 11 1 1

71, R1; R2 = 0 11

FIGURE 1: DIS functional diagrams, showing multiple out-of-order issuance of instructions per machine cycle.

My First Invention fraction of the main processor’s circuitry, and couldn’t envision In the fall of 1965, however, it sud- total circuitry), the scheme proved how to reach down into and more denly beamed down to me: By hold- simple and elegant in both function fully exploit it. Nor could expert ing pending instructions in a queue, and structure, and more than dou- ECL circuit designers provide archi- and representing source and des- bled the machine’s performance. tects with the necessary circuit tination registers and functional This was a personal Edwin Arm- level hooks to resolve intractable units in unary positional form strong moment for me. I now knew computer architecture problems. DIS rather than in binary, I determined what it felt like to invent something revealed that only a rethinking of the that it would be possible to scan cool. In fact, DIS proved to be a basics across all levels of abstraction the queue, resolve dependencies, fundamental advance in computer could break the logjam – a lesson and issue multiple instructions out- architecture and by a circuitous that deeply affected my later work in of-order (OOO), even when various route has since become a standard VLSI [3]. entries were stalled [3]. fixture in modern high-performance Another problem inhibiting prog- The scheme involved not only microprocessors. ress was the complexity of the ACS-1’s mathematical and micro-architec- design. I realized that a rigorous over- tural ideas, but also tricks at the Lessons Learned all system design methodology was logic and circuit levels, using arrays One might ask how could a shy, required – based on a coordinated, of ACS high-speed emitter-coupled naïve, freshly-minted MSEE be the hierarchical, multi-level computer logic (ECL) integrated circuits and one to invent multiple-OOO DIS? The simulation of formalized design par- exploiting their ‘wired-OR’ connec- problem had been clear to others; titions – for there to be any hope of tions to scan queue-columns within why hadn’t they found a solution? collective group activity to generate machine cycle-time constraints. An The belief that it couldn’t be done the sequences of internal subsystem- ACS colleague at the time, Brian Ran- undoubtedly held back progress, interface test patterns for debugging, dell, coined a perfect name for the while ethnographic observations bringing up and maintaining such a scheme, Dynamic Instruction Sched- reveal further problems: By the complex machine. uling (DIS). It was quickly incor- mid-1960s, chasms had developed These realizations, along with porated into the ACS-1 design [3], between the various specialized many insights into interpersonal [4], [5]. groups working on computer archi- team behavior that I had gained DIS provides a sort of ‘turbo- tecture, logic design, circuit design, from the then-recent ethnometho- charger’ for pushing more instruc- and packaging – with each specialty logical work of Harold Garfinkel, tions through a processor during optimizing their work at a particular led me to design and propose a for- each machine cycle than would oth- level of abstraction, and then toss- malized design of the ACS design erwise be possible. Although huge ing it over the wall to the next. process, a proposal which was well- regular arrays of ECL circuits were As a result, most computer archi- received and also strongly impacted required to implement that ‘turbo- tects lacked knowledge about the my later thinking on VLSI design charger’ for the ACS-1 (a moderate rapidly advancing ECL integrated methods [3], [5], [6], [7].

10 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE My First Failed Project remaining right in the Bay Area. A In hindsight, it is now recognized gritty survivor, I began at the bottom that had the ACS-1 been built, it of the ladder as a contract program- would likely have been the premier mer, with a new identity that allowed supercomputer of the era, eclips- me to work in “stealth mode”. None- ing both the CDC 7600 and the IBM theless, it was a terrifying time. Any Model 91 [1]. But, that was not to be. public outing would have killed my Instead, in 1968 Gene Amdahl new career and I could have ended up proposed that the ACS-1 be replaced unemployed, a social outcast, living with a S360-compatible supercom- on the streets. puter, and the ACS project fell victim Fortunately, after a series of to the ensuing political confronta- rapid upward moves I was hired as tion. Declared “a failure” by IBM a systems programmer at Memorex executive B. O. Evans, the ACS proj- Corporation. On joining Memorex, ect was disbanded [8]. Apparently, I described the general nature of FIGURE 2: The Memorex 7100. neither Amdahl nor Evans nor other my computer design work at IBM to key IBM people had a clue about the HR department. When Memorex the novel DIS architectural innova- entered the computer business I was was still inaccessible outside Intel tions that had been made within the given responsibility for CPU archi- (except for knowledge about the rap- secretive project; the invention was tecture and design for the Memorex idly emerging application of MOS- shelved away and apparently lost in 30 System (MRX30), an entry-level FET’s in dynamic memories [9]). Did dusty technical reports. competitor to IBM’s System 3. It was architects have to understand MOS now mid-1971. circuits and devices to design such Fired by IBM Creating a TTL micro-programmed microprocessor chips? Did folks At that same time in 1968, I was pio- minicomputer from a blank sheet of outside semiconductor houses have neering along another path, as well. paper, under tight time and cost con- futures in computer architecture? I alerted HR at IBM that I was under- straints, was a tremendous hands-on The future of digital design taking a gender transition to resolve experience. I loved the intense team- seemed to be in MOS, but I had no a terrible existential situation I had work and gained confidence as an clue how to get into it. faced since childhood. I was hop- enthusiastic thought leader on the ing to quietly maintain employment project. Using methods I’d developed My Second Failed Project during that difficult period. How- at ACS, I quickly built a register trans- Just as we completed the MRX30 ever, the news escalated to IBM’s fer level simulator to coordinate the manufacturing prototype, Memorex Corporate Executive Committee overall design effort. When first pow- left the computer business – a victim (including CEO T.J. Watson, Jr.), and ered up in early 1972, the ‘Memorex of monopolistic pricing moves by I was summarily fired [3]. 7100’ processor (the MRX30 manufac- IBM. I was crushed and no longer Finding myself unemployed and turing prototype, shown in Figure 2) saw a future there. Not only had IBM in the midst of transition, I watched came up smoothly and ran code with fired me, it was now stamping out my contributions to ACS go down just two minor wiring errors. It was many competitors that I might pos- the tubes as the failed project a triumph. sibly work for! simultaneously imploded. I grieved Nonetheless, in late 1972 I asked over this misfortune, but there was Explosive News my headhunter to open a job search nothing I could do about it. And not Then in November 1971, Intel and received two excellent offers: to surprisingly, given ACS-1’s stained announced the 4004 micropro- be the architect of Fairchild Semi- image within IBM, little curiosity cessor, followed by the 8008 in conductor’s next microprocessor or ever arose at the company about April 1972. These were blockbuster to join Xerox at the new Palo Alto what developments had occurred events for digital system designers Research Center (PARC). there. The DIS concepts eventually and seriously grabbed my attention. The Fairchild opening seemed a leaked out, however, and began I attended several intensive short great opportunity, but I felt uneasy. propagating through the architec- courses to learn about the chips. Knowing nothing about MOS cir- ture community, the full story only They proved architecturally simple cuitry, I hesitated at the prospect of beginning to emerge in recent years. and easy to use. merely blocking out simple architec- Detailed knowledge about the tures that others would implement. Starting All Over Again underlying MOS (metal-oxide-semi- I also had doubts about fitting into I completed my transition and started conductor) digital circuitry about the semiconductor industry, with its my career all over again in early 1969, which I was so curious, however, famously macho disdain of women.

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 11 Xerox was different, however. Concurrent Events at Fairchild, In 1974, IBM’s Robert Dennard, A movement was underway there Intel, IBM and Caltech inventor of the single transistor that promised to revolutionize com- In 1970, Carver Mead at Caltech DRAM, showed that when MOSFET puting by creating a new world of had coined the term “Moore’s Law” geometries, voltages and dopings interactive personal computers and for Gordon Moore’s 1965 prediction were scaled down, gate transit times related storage devices, scanners, [10] that chip device counts would also scaled down and performance copiers, laser-printers and network double every two years. A special- thus improved by the same factor communications. PARC was recruit- ist in device physics in addition to [18]. Taken together, the density ing the best and brightest young his teaching duties at Caltech, Mead improvements predicted by Moore’s talent from across the U.S. to join became a high-level consultant at Law and the performance improve- the effort, including a number of Intel, gaining access to vital projects ments predicted by Dennard sig- women scientists. A diverse and and know-how there. Around this naled a coming explosive growth in eclectic group, I’d heard of many of same time Mead reportedly inde- chip processing power. the ‘names’ already working there. I pendently invented a metal-gate Bert’s brother Ivan Sutherland took the job at PARC in 1973. PMOS circuit design for PLA-based joined Caltech in 1974 as found- My project was a tough one: cre- finite-state machines, realizing ing Chair of the new Computer Sci- ate a compound OCR/FAX system that it would be easier to code ence Department there. Famous for that compressed office documents logic than to draw it [11]. his pioneering work in computer for efficient communication. It took In 1972, Bruce Hoeneisen and graphics, Ivan was excited about two years of work on character- Mead described MOS device scaling the potential for microelectronics. recognition algorithms, as well as principles in a widely read paper, He recruited Mead to join his new the architecture, logic design, and predicting that MOS field-effect- department, bringing in Mead’s packaging of a novel image process- transistors (MOSFETs) would func- expertise in device physics and cir- ing system, to create the TTL proto- tion properly at gate lengths as small cuit design and his many connec- type. The Xerox Sierra filled a full as 0.25 micron, far smaller than the tions in industry. rack of circuit boards, and there was 10 micron gates of the time [12]. In ‘75 Ivan Sutherland, Carver no way to then reduce it to a few LSI Motivated by the possibilities of Mead and Tom Everhart (then chips. It was clearly doomed. scaling, Mead began teaching MOS chair of EECS at U.C. Berkeley) con- integrated circuit design courses at ducted a major ARPA study of the My Third Failed Project Caltech, based on the dynamic-logic basic limitations of microelectron- The end came in 1975 when William design methods that were rapidly ics fabrication. Their ARPA report R. (Bert) Sutherland joined PARC as evolving within several semicon- (published in ‘76) urgently recom- manager of the Systems Sciences ductor firms to exploit the new mended research into the system Lab (SSL). Bert had led the Computer technology – from the early work design implications of “very-large- Science Division at Bolt, Beranek of Frank Wanlass at General Micro- scale integrated circuits” in light of and Newman (BBN) and knew where electronics, to that of Bob Booher at coming advances in scaling – point- he wanted his new lab to focus. He Autonetics, to that of Lee Boysel and ing out that no methods existed for began vetting staff and projects, his teams at Fairchild Semiconduc- coping with such complexity and bringing in Wesley (Wes) Clark of tor and then at Four Phase Systems, no approaches then underway held LINC fame to advise him. to that of Federico Faggin and oth- promise of solutions [19]. By then I had told Bert in confi- ers at Intel on the Intel 4004, 8008 Bert introduced me to Carver and dence about my IBM work, and in and other early microprocessors Ivan that fall, and I began studying an intense follow-on interview, I [13], [14], [15], [16]. their recent work – having no idea presented the details of Sierra and The latest Intel circuit design what adventures lay ahead. Ivan soon my ACS-1 innovations to both Wes methods well exploited the new wrote a letter to his brother Bert – a and Bert. Afterwards, Wes told Bert, self-aligned silicon-gate fabrication letter that has since proven to be “This is the real thing!” technology, a concept invented in historic – proposing that PARC and I was able to keep my job, but 1966 by Bower and Dill at Hughes Caltech work together to attack the Sierra had to go. I was severely dis- Research [17] and by Kerwin, Klein, system complexity problem [20], [21]. heartened over yet another failed and Sarace at Bell Labs, and first project. There was no way to know commercialized by Faggin while The PARC/Caltech Collaboration at the time, of course, that all of at Fairchild [16]. Bright Caltech In early ‘76, the Sutherland brothers those failed projects had prepared students studying these methods formalized a collaborative research and positioned me to launch a revo- under Mead’s guidance had no diffi- project between Xerox PARC and lution in what would become known culty applying them to basic digital Caltech. The mission: to explore as ‘VLSI design’. circuit design. ways to more easily create systems

12 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE in silicon, and apply the emerging Alto computers, which we all used of easily-derailed arcane practices, personal computing technology at to gain design experience. Mike and turnaround times spanned PARC to the task. Tolle, Chris Carrol, Rod Masumoto, many months. At Caltech, Ivan Sutherland asked Ivan Sutherland, Dave Johannsen Even so, we made great prog- Carver Mead, and his students Jim and Carver Mead worked on the ress in 1976 as we cranked up our Rowson and Dave Johannsen, to “OM” microprocessor data path at knowledge in MOS design and tool be part of the team. At PARC, Bert Caltech, using symbolic layout soft- building – although learning more asked two researchers to join the ware (ICL/ICLIC) by Ron Ayres. Ron than we wished to know about team: one was Doug Fairbairn, a and Ivan crafted a graphical inter- what can go wrong in prototype brilliant young computer engineer change format (Caltech Intermedi- implementation. then designing Xerox’s NoteTaker, ate Form, CIF), to circumvent the n2 Meanwhile, Ivan Sutherland the world’s first portable personal translation problem that arose when prepared an article for Scientific computer. Bert’s other invitation converting each design tool’s output American about the challenge was to me. to one of many mask specs. microelectronics posed to comput- Personally, I could hardly believe Our tool building and design ing theory and practice. Since most this reversal in fortune! I was being work in that early period went well, of a chip’s surface was occupied propelled into MOS-LSI, and was but chip prototyping proved diffi- by ‘wires’ (conducting pathways confident my experiences at ACS cult. We could obtain masks from on the various levels) rather than would give clues on how to proceed. Silicon Valley mask makers of the ‘components’ (transistors), decades By now it was clear that commer- time, using reticle pattern-genera- of minimization theory in logic cially viable chips would inevitably tor code produced by ICARUS. How- design had become irrelevant. And contain several million transistors ever, wafer fabrication was quite by co-mingling logic and memory by the early 1990s. By scaling sup- another matter. within regular lateral arrays of ply voltages and exploiting the com- Engineers within semiconductor small processing structures in sili- ing CMOS technology, MOS circuits firms could get small lots of pro- con, it was possible to save both would become as fast as ECL but with totype chips via regular fab runs time and energy in internal on- far lower power dissipation. The – either by stepping reticles of pro- chip communications. capabilities of an entire ACS-1 prototypes into a few die locations on The resulting article, co-authored cessor could eventually be ‘printed’ production masks, or by substitut- by Carver Mead, was a powerful on a single chip, and personal coming masks containing multiple pro- statement of the challenges we faced puters like those emerging at PARC totype designs as one particular as 1976 drew to a close [22]. The were destined to have the power of boatload of wafers transited the fab bottom line: A huge and previously- current-day supercomputers. It also line. However, it was nearly impos- unknown territory for creative archi- meant that my DIS invention would sible for outsiders to access such tectural innovation had opened up, inevitably come to life. These elec- prototyping. Only ‘writers’ working and as yet there were no theories or trifying possibilities launched me for the ‘printing plant’ could become methods to guide those explorations. into hyperdrive. ‘published’; i.e., only designers working for the semiconductor firms Simplification and Convergence Exploration Begins could get their chips manufactured. By late 1976, I sensed in our work Our work began with concentrated Mead’s contacts occasionally pro- a parallel to Steinmetz’s time – a studies, including taking a number vided access to MOS fab for Caltech time when DC technology was well of short intensive courses on the circuit designs, and he worked to established but was running out of very latest relevant technologies gain similar access for our PARC/ steam – while the emerging AC con- in Silicon Valley. And, while Mead Caltech project. This involved exten- cepts seemed mysterious, even to taught us about NMOS device phys- sive coordination during design and expert practitioners, who as yet had ics, circuit design and fabrication mask-making in order to meet the no formal theories to develop AC processes, I shared my knowledge many requirements of the target fab technology. of computer architecture, and of line. Each line had different layout Steinmetz had broken the log- multiple-abstraction-level computer- design rules, mask polarities, align- jam by coalescing mathematical design-process design, with him. ment marks, process test patterns, methods and design examples that We then waded in by build- scribe lines and more – with all of enabled practicing engineers to ing hands-on prototype chip sub- that data communicated via detailed routinely design AC electrical sys- systems, learning as we went paperwork unique to each company. tems with predictable results. This along. Fairbairn and Rowson cre- We sometimes obtained prototype starter set of knowledge was suf- ated an interactive layout sys- chips for our project this way. How- ficient to launch the AC revolution. tem called “ICARUS” on the Xerox ever it was a daunting activity, full By applying Steinmetz’s principles,

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 13 and switch contacts on DIFF. Addi- tionally, wiring and stray capacitances were often modest compared to gate capacitances. Thus turning a transistor on for a sufficient time and then off could charge (or discharge) the gate-capacitance of a subsequent transistor and then isolate it – dynamically storing the on (or off) state as in a Dennard dynamic RAM cell [18]. At the top level, architects composed digital systems as arrangements of interconnected registers and intervening logic, with data movement and logical sequencing controlled by state machines. Regis- ters could now be built in NMOS as FIGURE 3: Lynn Conway at Xerox PARC in 1977. arrays of inverters, each composed as a simple pull-up/pull-down transistor pair using depletion-mode practicing engineers spawned a Structuring a Design Methodology MOSFETs as loads. Data movement whole new industry. With this theory in mind, I convinced between registers could be con- Similarly, this seemed the right Mead we should set a far more ambi- trolled by pass transistors, using way to attack the VLSI complex- tious goal for the work. We should two-phase non-overlapping clocks to ity problem. Instead of visualiz- move to create a simplified method- isolate the dynamically stored data. ing an ever more complex future ology for designing whole systems Clocking times could be calculated into which all current and evolving in silicon, not just circuits – and aim as simple multiples of minimum developments were projected, why it specifically at computer architects FET-gate delays. Logic functions not begin by simplifying, simplify- and system designers. He agreed, could be crafted using simple NMOS ing, simplifying? Would that not and in an incredibly intense period structures placed between succes- spawn something starkly simple in the spring of 1977 we formulated sive register stages. State-machines and eminently practical instead? the basics of the new methods. could be built using NMOS program- This wasn’t about engineering Happily, NMOS was perfect for this mable logic arrays (PLAs), with reg- new things; it was about the engi- simplification. isters holding state to feedback to neering of new knowledge. My Seen from an architect’s perspec- inputs at successive machine cycles. key idea was to sidestep tons of tive, an NMOS chip could be visual- All this could be done using simple accumulated vestigial practices in ized as a miniature 3-layer printed rules of thumb for gate geometries, system architecture, logic design, circuit board, with wires printed on pullup/pulldown ratios, fan-outs, circuit design and circuit layout, the metal (MET), polysilicon (POLY) power distribution and timing. and replace them with a coher- and diffusion (DIFF) levels, and with By routing control lines perpen- ent but minimalist set of meth- vias (i.e., “contacts”) connecting wir- dicular to data lines, important ods sufficient to do any digital ing levels where needed. As a result subsystems could be woven as design – restructuring the levels of of the new self-aligned silicon-gate regular arrays of cleverly designed abstraction themselves to be appro- fabrication process, a MOSFET tran- NMOS cells – resurrecting long-lost priate for MOS-LSI. sistor was formed (and easily con- non-gate-logic methods, as in sym- I theorized that if such a starter ceptualized) wherever a path on the metric networks of relay contact set could be composed, it would POLY level crossed over a path on switches, and elevating the bi- enable thousands of system design- the DIFF level. directional ‘switch’ as a basic level ers to quickly migrate from TTL But there was more. The resis- of abstraction. We sketched cell into MOS-LSI – just as I had. Most of tance of wires was small compared to topologies as stick diagrams, using what was needed was all around us, on-transistors, while off-transistors blue, red and green pencils to indi- including the latest Intel’s MOS-LSI had extremely high resistance. Thus cate cell wiring on the MET, POLY design lore. The challenge was to an NMOS FET could be abstracted and DIFF levels – and wherever a make wise decisions about what to as an almost perfect ‘bi-directional ‘red wire’ crossed a ‘green wire’ keep, and what to toss. switch’ with its control gate on POLY an FET ‘switch’ was created. Cell

14 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE topologies were then geometrically layouts were also tied to particular ‘structured’ design methodology (as expanded to form cell layouts, com- processes, and had to be redone as Mead called it) from top-to-bottom. pacted to the degree possible under new processes came online. Of course the rules needed the target fab line design rules for In contrast to our other successes, tweaking to gain compactions and spacings and widths. circuit layout seemed an intractable to better anticipate scaling effects. When implemented, such designs level of design abstraction. Ques- For example, we set line widths and often required far less area, time tions of computational complex- separations on the MET layer to m,3 and energy to perform functions ity also loomed: How could such while keeping those on the POLY and than those produced using tradi- complex, rapidly changing geomet- DIFF layers at m.2 Still, the rule set tional abstraction-levels and opti- ric layout rules be encoded, applied, remained small at only two pages in mizations at each level – shattering and checked – given the increases length, easy to teach, learn, apply, years of established academic the- in circuit density anticipated in the and check (see Fig. 4). ory and industry practice – and they coming years? These simplified scalable design were often dramatically simpler rules had many implications. With to design. Invention of Scalable Design Rules circuit density doubling roughly In early 1977, I began asking myself: every two years, why spend time Layout design rules: What is the simplest possible set on intense layout compaction? Why The Fly in the Ointment of layout design rules? I found the not compress design times by using The stick diagrams of cell topolo- answer in a different question: these simpler rules, and race to the gies contained all information nec- What is the maximum from among next smaller process that much essary for laying out functionally the minimum lateral line widths, sooner? Even more importantly, scal- unique cells. The layout design separations, extensions and over- able rules allowed cell topologies rules merely said what was prohib- laps at all levels for a given process? to be laid out in a timeless form – ited during the compaction of geo- Once found, I knew this one mea- opening the door to widely-sharable, metrically expanded cell topologies sure of process resolution could be time-durable MOS cell libraries. towards minimal areas. used to limit minimum sizes for all Adjacent subsystems could also Unfortunately, MOS fabrication layout features. often be abutted by designing their engineers produced large books of The resulting, minimalist covering cells at the same pitch (extend- layout design rules unique to each rules were crude and non-optimal, ing some cells’ lateral dimensions, new process, often running 40 pages but they fit onto a single page – that in where needed), saving space and or more. In efforts to increase itself, a breakthrough. I also noticed improving performance by elimi- yields, layout designers valiantly something else: The minimalist-rules nating wiring channels. EDA tools applied these rules, including those generated layouts having a timeless for generating and checking layouts enabling only tiny compactions, quality. They remained unchanged, were also greatly simplified and often using arbitrary angles and even as the process scaled down. speeded-up by using rectilinear wir- curvatures to scrunch on-chip fea- Suddenly it beamed down to me: ing on a Lambda-based integer grid, tures down in size. Just imagine the MOS design rules should not be rather than at arbitrary angles and complexity of the layouts, hand-cut framed as sets of lengths but as sets dimensions as in earlier practices. into rubylith patterns for maskmak- of ratios of lengths. Such dimen- Thus the Lambda-based design ing, that resulted from such efforts! sionless rules could then be scaled rules played a similarly simplifying, To ease the burden for students to any process as multiples of a empowering and unifying role at the in his earlier circuit-design classes, basic length unit in microns, a unit I knowledge-interface between VLSI Mead crafted ad-hoc rules having called Lambda (m). designs and EDA tools, as had the reduced complexity by tossing low- I quickly crafted an NMOS rule self-aligned MOS gate at the knowl- return constraints and formulating set to explore this idea, setting m at edge-interface between LSI designs ‘covering’ sets of rules – using line- one-half the maximum of minimum and semiconductor fabrication. widths, separations, extensions and line-widths, separations, exten- The scalable design rules opened overlaps somewhat larger than the sions, and overlaps. The resultant another door, as well. Suddenly a minimums required for target pro- rule set was less toy-like than the clean separation between chip design cesses. Such rules were easier to minimalist rule set, and revealed and fabrication was possible, with teach, apply and check, and were far the full potential of the idea. extremely simple rules providing better for prototype design where I vividly recall seeing Mead’s jaw the interface. extreme compaction was not needed. drop that spring morning in 1977 However, such rule-crafting required as I presented my strategy for m The “Tall Thin Man” expertise, judgment and close coor- -based rules on my whiteboard at The transparency of the new meth- dination with fab lines. The resulting PARC. This was it! We now had a ods enabled architects to design

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 15 2m 3m

(a) (b) m m

m m 2m 2m 2m 2m (c) (d) (i) (j)

2m 2m Cover m 2m 4m 2m m (e) (f) 4m

(k) (l) 2m 1½m

m 2m 3m m m 3m 1½m 1½m (g) (h) (m) (n)

FIGURE 4: The m-based scalable NMOS design rules [23], [24]. (a) Wd /.m H 2 (b) Sdd /.m H 3 (c) Wp /.m H 2 (d) Spp /.m H 2 (e) Spd /.m H 1 (f) Epd /.m H 2 1 1 (g) Example of several rules. (h) SEig/;mmHH112 ig/.2 (i) WEcd/;mmHH21c /. (j) Epc /.m H 1 (k) SScc /;/.mmHH22cg (l) Opd /,m = 1 and details of butting contact. (m) WSmm/;/.mmHH33m (n) Emc /.m H 1 systems from top-to-bottom, as of alternatives for expressing design rules in particular had dra- they had in the days of relay contact architectures in silicon. Using our matic implications for tool-building switches and vacuum tubes in the methods, architects could clearly and chip prototyping. 1950’s, when I was a student. visualize and instantiate their By this time, however, signs of Now once again, digital cir- creations all the way down to the resistance were emerging at PARC, cuitry could be easily envisioned switches in silicon. It was a tremen- as critics in the competing Computer and crafted, using simple rules dous breakthrough! Science Lab (CSL) looked askance at of thumb. No longer were exten- A new world of architectural what they saw as our “toy” designs sive calculations and circuit simu- exploration opened up before us, a and “toy” design tools. Not surpris- lations needed as in bipolar IC world I had peered into twelve years ingly, they questioned what our tiny design. While such efforts were before, when inventing DIS at ACS. I effort could possibly bring to the still needed during process devel- sensed that thousands of engineers huge semiconductor industry. opment to ensure circuit function could now have similar experiences What we clearly needed were and performance, they were not as system architects by exploiting classy tutorial design examples, needed when designing prototype our new methods. At least, that was and in June 1977 Dave Johannsen circuits and layouts. So long as on- my theory at the time. set out to rigorously apply the new chip test patterns found that elec- Meanwhile, Fairbairn’s and Row- methods to the design of a follow- trical parameters were within spec, son’s ICARUS software and Ayres’ on data path chip at Caltech. The our design rules of thumb worked ICL/ICLIC enabled us to input, edit, OM2 would be completed by year- perfectly well. print, and visually inspect our lay- end, yielding excellent examples For years, ECL and TTL had outs. However, these were only the of subsystem design using the new imposed logic-gate and clock- beginning of a parallel revolution methods. Unlike the OM1, the OM2 edge-triggered flip-flop register in EDA, as new tools evolved to sup- actually worked. abstractions onto system design – port work across the restructured Early in our work Mead had impeding top-down visualizations levels of abstraction. The scalable coined a term – The “Tall Thin

16 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE Man” – to describe system design- The sophisticated comput- and produce a formal description of ers like Johannsen who used our ing environment at PARC gave us the CIF language (CIF2.0). Johannsen exploratory methods, and the term uncommon confidence. We could also completed the OM2 in Decem- eventually took its place in the interactively create documents and ber 1977, in a much-needed early lexicon of Silicon Valley. Although designs using our Alto systems, col- validation of the new methods. women engineers (including me) laborating locally via e-mail and file- By February 1978, I had incor- were excluded by Mead’s imagery, sharing, and interacting remotely porated the ICARUS tutorial, the the phrase stuck, for a time. with colleagues at leading univer- CIF2.0 specification, and the OM2 sities by using the new ARPANET. design examples into a draft of the What to do with Swept along by PARC’s movement to first five chapters, just in time for the New Knowledge? bring computer power to the indi- spring semester courses taught by The rush of ideas in early 1977 led vidual, we had intellectual power- Bob Sproull at CMU and Fred Rosen- to a host of challenges. Most espe- tools at our disposal that provided berger at Washington University. cially, what were we to do with the means and the wherewithal to This version of the book included the new knowledge? In response, I do unprecedented things. many color plates I had made on the began evolving a tutorial to unfold As I began writing the book, my new color copiers at PARC, enabling and explain it all, honing a mini- Alto became the integrating node easier teaching and better mastery malist sequence of ideas sufficient and control-center for a wildly- of the new methods [23]. for architects to visualize what expanding project and community of Then one day, in a rush of enthu- a chip is and how it now might contributors. While I drafted expla- siasm, I changed the title to Intro- be designed. nations of the structured design duction to VLSI Systems. The task was akin to revealing methods, Mead provided input on a medieval cathedral as composed NMOS fabrication and mask-making, Bert’s Challenge of pointed arches, ribbed vaulting, Fairbairn and Rowson crafted an ICA- By this time, Bert Sutherland had thin walls and flying buttresses, RUS tutorial, and Johannsen began joined the EECS Department advisory showing how a set of basic prin- documenting OM2 design examples committee at M.I.T., and soon after ciples were sufficient to raise such to round out the text. offered me a challenge: Go to M.I.T. a complex structure. While doing We introduced the first three in the fall, he said, and introduce a this work, I began realizing that chapters in the fall of 1977, inter- senior/masters-level course on this launching such an abstract system jecting them into MOS circuit design stuff. I was thrilled. We’d been testing of knowledge by publishing bits and courses taught by Mead at Caltech portions of the book in various MOS pieces here and there in traditional and by Carlo Séquin at U.C. Berke- circuit design courses, but this was journals would be inadequate, espe- ley. (Séquin had recently joined the chance to pioneer a completely cially when it challenged so much our team as a consultant at PARC). new full-fledged system design established practice. What to do? We titled those preliminary chap- course based solely on the book. ters Introduction to LSI Systems, but I was also terrified. A bit shy The Idea of “The Book” then paused at how to acknowledge among strangers and fearful of pub- The die was cast in early June 1977, authorship. Mead was a well-con- lic speaking, I also lived in dread during a relaxed, evening team-brain- nected full professor at the time, of being outed about my past. Up storming meeting at PARC. Thinking while I was virtually unknown out- to now, I had been sheltered as a out loud, I launched the idea: Why side of our group. Thus even though researcher in the laboratory envi- not write a book about our work, and I was the architect and principal ronment at PARC, and had only self-publish it using PARC’s Alto sys- author of the book, we listed Mead recently begun to flourish as a tems and laser printers? as first author – to enhance the research manager there. Teaching If the book were comprehensive, book’s credibility [23]. at M.I.T. would be quite a different well-written, and filled with good Building on the feedback that matter, involving much more pub- design examples, it would appear came in, I prepared five full chapters lic visibility. It seemed beyond my to reflect years of mature practice. for courses set to be taught the next reach and in my anxiety I wavered. In yet another echo of the Stein- spring. Dick Lyon, a brilliant Caltech But Bert insisted: “Lynn, you’ve got metz story, I theorized that such a grad and signal processing expert to do this!” book would be taken seriously and joined our team at PARC. (Lyon went Shortly afterward, while glancing could launch the new methods we on to invent the optical mouse, at Steinmetz’s photo on my office were proposing. Mead let out a big, among other things.) The winter wall, his story came back to mind, “Yeah!”, and Fairbairn was excited of 1977–78, Lyon and Carlo Séquin especially the impact of his teach- as well. So that was it. The decision worked with computer graphics ing at Union College. It was one of had been made, and off we went. expert Robert (Bob) Sproull to refine the great turning points in my life:

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 17 labs joined in the effort; in fact, the whole team pitched in to help com- pile the new guidebook [25]. Summer passed in a whirlwind of preparations. Before long I was packing-up boxes of freshly-minted texts and course handouts – and heading out on my 3000-mile road trip to M.I.T.

Launching the Course Launching the course was a for- midable experience, in particular because I was terrified of becoming tongue-tied in front of the students. My solution was to be massively over-prepared. FIGURE 5: Students at DEC-20 terminals in the MIT ‘78 VLSI design lab. I wrote out each lecture in complete detail, including every instruc- tional point, every drawing and I threw caution to the wind, and quick-turnaround implementation every calculation. Along the way, I went for it. methods. As the summer of 1978 unfolded the fundamental concepts progressed, I based the whole course of electric circuit theory, electronic Planning the M.I.T. Course plan around these ideas. design, switching theory, digital The spring of 1978, I immersed With Bert’s support, I also logic design, and computer sys- myself in finishing the book. While launched a summer program for the tem design, to ensure that all stu- I drafted Chapter 6 on the architec- VLSI Systems Area (my new research dents were well-grounded in every tural level of abstraction, Charles department at PARC), recruiting level of abstraction, independent of (Chuck) Seitz at Caltech drafted Steve Trimberger of Caltech and Rob their background upon entering the Chapter 7 on self-timed systems, H. Hon of CMU as research interns. course. I didn’t see it coming at the T. Kung at CMU provided material Trimberger worked with Fairbairn on time, but this work to avoid gaps in on concurrent processing for Chap- design tool development, while Hon student comprehension would have ter 8, and Mead drafted Chapter 9 on organized mask-making and fabri- unforeseen, far-reaching effects. the physics of computation. A full cation of a set of PARC designs as a Jonathan (Jon) Allen was my draft would be ready by summer, multi-project chip (MPC), enhancing faculty host for the course, and just in time for the course [23]. our experience in quick turnaround his student Glen Miranker was my I also got an important idea: If I implementation during the run-up TA. The class included 32 students could compress teaching of the new to the course. and 9 faculty/staff auditors. Staff methods into the first half semes- Building on that experience, Hon researcher Bill Henke built CIFTRAN, ter, students could launch design and Séquin compiled The Guide to a symbolic layout tool for encoding projects during the second half. If LSI Implementation, as a guidebook CIF specifications, while Miranker I could then organize quick-turn- to our innovative clean interface set up a lab where students could around (QTA) implementation of the between chip design and chip fabri- access CIFTRAN via DEC20 termi- student projects – including layout cation and to the logistical details of nals and plot their layouts using HP file merging, mask file formatting implementation. Dick Lyon created a pen plotters. Meanwhile, I kept in and generation, mask-making, wafer library of critically important cells close contact with my team at PARC, fabrication, dicing, packaging and (input pads with ‘lightning arrestors’ using a portable, acoustic-coupled, wire-bonding – I might be able to for electrostatic protection, out- TI printer-terminal to transmit get packaged chips back to students put pads with tri-state drivers, PLA e-mails via the ARPANET. shortly after the course ended. cells, etc.), contributing CIF code and Contrary to my apprehensions, I felt that the unprecedented color plots of the cells to the guide- the students became tremendously opportunity to design your own chip book. Lyon also updated ICARUS to excited by my teaching. They seized would attract very bright students to accept and manipulate oversized CIF the opportunity to learn by doing the course. And their projects would, code files as outlines and produce and ran with the new knowledge. in turn, heavily test the design meth- a merged MPC CIF file. Rick Davies Many ambitious projects got under- ods, design tools, book, course, and and Maureen Stone from other Xerox way and I began holding my breath,

18 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE realizing if things went well, Problems Arise, this could be a huge win. Pushback Begins By now, Alan Bell of BBN Mead and I had contracted had joined my team at PARC. with Addison-Wesley to pub- He and Dick Lyon began lish the book, and in early preparations for the QTA 1979 I began the tedious implementation of the proj- task of coordinating the ects, and everyone pulled copy-editing, hoping to have together at both ends to coor- it ready for courses slated dinate things as the design for that fall. cut-off date approached. Word spread quickly on I sent the final student the ARPANET about the M.I.T. design files to PARC via the course, especially the news ARPANET on December 6, about Steele’s LISP micro- 1978. Lyon and Bell then processor. Many professors merged the 19 projects into asked how to offer similar a multi-project-chip CIF file, courses, and how to lead converted it to Mann PG for- ambitious design projects. In mat, and had masks made by FIGURE 6: Students Jim Cherry and Gerald Roylance and TA Glen response, my group at PARC Micro Mask using their new Miranker study a checkplot, MIT ‘78. began to train instructors in electron beam system. In the new methods of teaching this first phase of an impor- VLSI design. tant collaboration with Pat Castro sensed where it might lead. I had also Doug Fairbairn and Dick Lyon at Hewlett-Packard, wafers were gained real confidence as a research ran an intensive short course for fabricated at her Integrated Circuit team leader, and itched to do more. I PARC researchers during the spring Processing Lab (ICPL) at nearby drove on, rock music blaring on the of 1979, which was videotaped. We HP Research using a 6-micron radio, my head in the clouds, savoring began using those tapes as the basis (mn= m3 ) silicon-gate NMOS pro- the moment. for short, intensive courses at PARC cess. Everything went off without a Something powerful rode along on for university faculty members in hitch, and the packaged chips were that trip – an instructor’s guidebook the summer of 1979. With the help shipped back to M.I.T. on January 18, on how to teach such a course, in the of the PARC tapes, Mead and Ted 1979 (see Fig. 7). form of hundreds of pages of care- Kehl also ran a course at the Univer- Although my students had fully handwritten lecture notes [26] sity of Washington that summer. only primitive EDA tools, and had resorted to hand-checking of design rules, the new methods so simplified the design work that not many errors were made, and the course led to a very exciting group of projects. Jim Cherry, for example, designed a transformational memory system for mirroring and rotating bit-map image data, and his project worked completely correctly. Guy Steele, in an even more ambitious project, designed a complete LISP microprocessor. The processor almost worked on this first try, except for three small wiring errors. As such, it set a high mark for others to follow. After finishing the semester at M.I.T., I took a leisurely route back (a) to California, traveling through the South and Southwest. I knew something profound had happened in the M.I.T. course, but I only vaguely FIGURE 7: Photo of the MIT ‘78 chip set. (Melgar Photography)

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 19 ARPANET Geographic Map, October 1980

MIT44 LINCOLN MIT6 LBL MOFFETT CCA AFGL RCC5 AMES15 AMES16 LLL NYU RCC49 SRI2 CORADCOM DEC RCC71 SRI51 UTAH BBN40 XEROX GWC ANL RADC STANFORD BBN63 TYMSHARE CMU BBN72 NPS SUMEX WPAFB HARVARD DOCB DTI STLA DARCOM ABERDEEN HAWAII ACCAT NOSC UCLA ANDRW NRL AFSD CIT SCOTT DCEC NSA NBS ISI27 AFWL NORSAR USC SDAC RAND ISI52 MITRE YUMA ARPA PENTAGON ISI22 WSMR COLLINS GUNTER BRAGG Satellite Circuit EGLIN ROBINS IMP LONDON TIP TEXAS Pluribus IMP Pluribus TIP C30 (Note: This Map Does Not Show ARPA’S Experimental Satellite Connections) Names Shown are IMP Names, Not (Necessarily) Host Names

FIGURE 8: Map of the Arpanet, circa 1980.

I also organized my M.I.T. lecture edition of Hon & Sequin’s Guide to devoted to such questionable work. notes to create the Instructor’s Guide LSI Implementation, hoping to help They didn’t seem to grasp why the to VLSI System Design and began more instructors implement their freedom to improvise and playfully printing copies for all those inter- students’ projects in the fall 1979 create things was so important when ested in teaching the course [26]. It semester [25]. working in a new medium – whether was these notes, rather than the text- Mead coined the name “foundry” in art or music or engineering – book alone, that for the first time con- for any semiconductor firm that especially when exploring what it is tained the full exposition of the new could ‘print’ externally generated possible to do. design methods – unfolding a teach- designs created using the scalable Some in academe even began to able, accessible, minimalist, covering design rules, and he began popu- wonder if we were nuts. “Who are set of knowledge that enabled stu- larizing the term to lure firms into these people?” they asked. To them, dents to quickly learn how to compe- providing this type of service. Given Mead was a device physicist making tently do VLSI system design. Mead’s high-level business connec- wild pronouncements on computer However, we had a big problem: tions, it wasn’t long before folks design, while Conway seemed some there was no way to implement across the industry were buzzing totally unknown woman tagging design projects from so many uni- about his provocative term, wonder- along as Mead’s ‘assistant.’ Such reac- versities, other than for each to ing what it meant for them. tions to appearances were totally arrange for their own mask and fab. As noise spread about Mead and understandable. Something had We had defined a clean interface Conway, signals of serious resis- to be done to turn things around, between design and fab at the lay- tance began to arise. Experts at but what? out design-file level, but the logis- various levels of abstraction began tics of implementation were far too having allergic reactions: when seen Necessity is the Mother of Invention complex for isolated departments or from the viewpoint of each narrow It began as a daydream that spring design groups to handle. abstraction our stuff looked far too of 1979, as I fantasized about the I felt that unless students could crude and naive to possibly work. impact of large numbers of M.I.T. learn by doing, and make things Trouble also arose within PARC. type VLSI design courses. that worked, they would have My new research department in SSL I could feel the powerful energy merely learned a theory of design. came under increasing attack from out there: the young faculty mem- Attacking this problem head-on, I the leaders of the Computer Sci- bers hoping to stand out and launched work to further simplify ence Lab (CSL), who wondered why get tenure, the students seeking and document the logistics in a new budget and headcount were being careers in a frontier area, the folks

20 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE To ARPANET

(User MSGS, System MSGS, Operator MSGS, System Library Files, User Design Files)

User Message and Design File Processing Subsystem

(Control Info)

Die-Layout Planning File Storage and System Design File Merging Subsystem

(Control Info) Operator Terminal

CIF to MEBES Conversion Subsystem

(Mask, Fab, Packaging (MEBES Mask Specification Files) (Control Info, Bonding Diagrams, Schedules and Constraints) Implementation Documentation)

FIGURE 9: MPC79 implementation system: overview of the software. who wanted to start companies and Suddenly it struck me: What if we cut-off time, reel in the final projects’ make their fortunes. Imagine how positioned an interactive message- design files. It was clear that such a they’d rush to participate in the new handling and file-handling server “VLSI implementation system”, as we courses, get into VLSI and design that orchestrated interactions over called it, could then under operator their own chips! the ARPANET? That would stream- control plan die layouts for multiple Back in reality: My group had line everything, eliminate the need multi-project chips (MPCs), merge maxed out our capability when han- for constant human interactions, the design files into those MPCs, and dling projects from just one school. and bring the needed scalability. generate MEBES (Manufacturing Elec- How on earth could I scale up chip- What I envisioned was an early tron Beam Exposure System) files for prototyping to handle ten or more form of Internet commerce system, mask generation. such courses? where design files could be sent to a When I excitedly revealed this I began doodling on my white- server and packaged chips returned idea to Mead, he went cold and said board, searching for ways to simplify after implementation. From an “Don’t do it.” the implementation process, shorten information management point of Mead worried that the event its turnaround time, and scale it view, it would be analogous to send- would appear to be orchestrated up. Although we’d documented static ing many separate magazine arti- by DARPA and they would “take all technical interfaces in the Guide to cles to a remote server, where they’d the credit”. I understood, for DARPA LSI Implementation, many procedures be coalesced into a printable mosaic had ended up gaining much of the needed to be charted and many ques- and queued for magazine printing. visible credit for Stoner’s M16 rifle tions remained about who should With such a system, we could after simply running field trials and do what, and when. Plus we had no send messages to the chip ‘authors’, promoting the weapon, but so what? means to handle information flow coordinate all activity, do CIF- That’s the way the world worked. and coordinate interactions on such syntax checking and space require- Why let concerns about credit inter- a large scale. ment checking, and then at the design fere with doing something cool?

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 21 Mead also felt that each school the chip implementation service. Pake, Director of PARC. Apparently should connect directly with mask Time was running short and I had to my announcement of MPC79 seemed and fab services on its own, just as make a decision. incomprehensible to the establish- he’d been doing at Caltech, rather With just a tinge of fear, I drafted ment at the time, and the academic’s than fall under the control of a an e-mail, complete with a huge school was among those threatened centralized service. I disagreed, for promise to the many faculty mem- by the perceived infection. His mes- I thought his notion of foundry as bers and many, many students out sage: Conway is “crazy”, the MCP79 yet undeveloped, in that it relied too there: We at PARC would implement project is unsound, and Xerox will much on undocumented personal the chip designs from all Mead- suffer huge embarrassment unless expertise, lacked methods for infor- Conway courses offered that fall, it’s cancelled. mation management, and hence in an ARPANET happening called I could feel the apprehension in lacked scalability. More importantly, “MPC79”. I knew if what I was offer- Bert’s voice as we hurried to Pake’s it could not be widely implemented ing didn’t work, I would have to go office, and I nearly panicked when in time for courses in the fall of into hiding. I hesitated, suspended they told me what happened. We 1979. Uneasy collaborators from the in the moment, then pulled the trig- knew the concerns were truly justi- start, these sharp differences pretty ger and pushed “SEND”. fied. Although the new methods had much ended our interactions. worked at M.I.T. and our computers Fortunately Bert Sutherland MPC79: The Network Adventure provided powers outsiders couldn’t remained enthusiastic, and I forged The summer passed in a rush. imagine, MPC79 was a huge gamble. ahead. We ramped up work on the Alan Bell and Martin Newell However, Bert stood by me and the implementation system, with Alan readied the implementation system cloud lifted. Pake said “Not to worry. Bell and graphics expert Martin software, while Bell, Rob Hon and I Just do it.” Newell developing the software. carefully crafted e-mails to send at The vibrant counter culture Although the software itself was intervals during the fall – establishing within PARC helped brace us conceptually straightforward, the a strict timeline to coordinate activi- against all doubts; it seemed every- space of possible user interactions ties. Hon and Séquin completed the one there was reaching for dreams. was highly complex. It took great second edition Guide to LSI Imple- On the outside people saw a pres- effort to anticipate all such interac- mentation, which included the defi- tigious corporate lab housed in a tions and formulate specially con- nition of CIF2.0 by Bob Sproull and castle-like building, high on a hill strained key-worded messages to Dick Lyon, an expanded set of PLA overlooking Palo Alto. It was a dig- handle them all; Bell began making cells and I/O pads created by Lyon nified image much like that of IBM’s critical innovations in this area. for all designers to use, along with lab at Yorktown Heights, i.e., one As summer approached, it seemed a lot more information about imple- that established folks took very we just might be able to pull it off. By mentation procedures [25]. seriously. How could they possi- now faculty members at many uni- All sort of wild things happened bly imagine what went on within versities were planning to offer the as we went along – some serendipi- PARC’s walls? course, but we hadn’t yet announced tous, some funny, some scary. A This contrast came home to roost young Stanford professor named one weekend evening, as I passed by Jim Clark asked if he could hang a young Rob Hon at his Alto. In T-shirt out at PARC, learn the basics of chip and jeans, feet propped on a chair, INTRODUCTION TO SYSTEMS design and do a project for MPC79. using his Alto to send an important CARVER MEAD • LYNN CONWAY I said sure, and helped him with MPC79 message to the universities: some basic instruction. An expert “If only they knew who’s doing this,” in system architecture and com- he quipped. puter graphics, Clark seemed a per- Primed and bonded by our fect adventurer to launch into VLSI. experiences during the 1978 M.I.T. After taking Fairbairn and Lyon’s course, the team was really on a PARC videocourse, Stanford profes- roll, and an atmosphere of excite- sor Forest Baskett and his Ph.D. stu- ment and fun permeated our work. dent Andreas Bechtolsheim also did Everyone seemed to know what to projects for MPC79; they would later do, no matter how novel the situa- become famous as architects of the tion. Individuals jumped in and out, SUN workstation and more. taking on creative improvisational A crisis then developed. A senior roles as opportunities arose, much academic of impeccable standing as seasoned musicians would in a FIGURE 10: The Mead-Conway text. called an urgent meeting with George fine blues and jazz band.

22 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE MPC79 Flowchart: User Community

~ 100 Designers at: MIT, Caltech, Carnegie-Mellon Univ., Stanford, Univ. of Illinois, U.C. Berkeley, Univ. of Wash., … (Using AIDS/LAP/ICARUS/etc.)

DS 12; 9 PlaCell; (MSGS, Design Files) (5 Items); LNM; BL 4000 W 1000 C 2000, -750; Project Lab Coordinators at Each School Use Local Electronic . . . Mail and File Transfer Facilities to Interact with the Designers L NP; BL 500 W 4000 C 2500. -2000; and Use the ARPANET to Interact with MPC79 DF;

Data Comm. Facility (MSGS, CIF2.0 Design Files)

To: MPC79@PARC-MAXC ARPANET From: REB@MIT-XX (MSG, FTP, TELNET) Subject: IMPLEMENT PROJ.CIF

(MSGS, CIF2.0 Design Files) IMPL Facility

Info. Mgmt System: Xerox PARC/SSL Checking, Planning, Merging of Designs into Starting Frames Meeting of Constraints, Coordination, Logistics

(Constraints, Logistics, (Design Files, Merged Control Info.) into Starting Frames)

“The Foundry”

Maskmaking: Micro Mask, Inc. Data Format: MEBES; ETEC Electron-Beam System

(Masks)

Wafer Fabrication: H-P/ICPL NMOS Silicon Gate Lambda = 2.5 Microns

(Wafers)

Packaging

(Bonding Maps) (Packaged Chips) (Elect. Params) (Plots)

Packaged Chips, Customs Wire-Bonded Per Project, Along with Plots, Wire-Bonding Maps, and Results of Electrical Testing, to Send Back to the Designers for Functional Testing

F I G U R E 11: Flowchart of events for MPC79.

A huge phenomenon unfolded that Carver Mead at Caltech, John Newkirk at University of Washington, Edward fall as our coordinating messages and Rob Mathews at Stanford, Richard Kinnen and Gershon Kedem at Uni- and files surged across the ARPANET. Newton and Carlo Séquin at Berkeley, versity of Rochester, Vance Tyree at Twelve universities participated, with Bob Sproull at CMU, John Murray at UCLA, Fred Rosenberger at Washing- courses given by Jon Allen and Lance University of Colorado, Jacob Abra- ton University, St. Louis, and John Glasser at M.I.T., Chuck Seitz and ham at University of Illinois, Ted Kehl Nelson at USC.

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 23 All courses used the and diced them, mounted new Mead-Conway text die into 40-pin packages (see Fig. 10), published (enough for three per proj- just in time by Addison- ect), and wire-bonded to the Wesley [24], while faculty individual projects within and TAs had access to the each die (see, for example, new Instructors Guidebook Figs. 14, 15, 16). Packaged and the latest edition of chips were shipped, along the Guide to LSI Implemen- with chip photos and docu- tation, which I’d printed- mentation, to students and up in large numbers at researchers at the 12 uni- PARC [25], [26]. versities on Jan. 2, 1980 All courses were syn- [27], [28]. chronized with the MPC79 We’d done the impossi- schedule (see Fig. 11), and FIGURE 12: Alan Bell at PARC, completing the design-file merge for ble: demonstrating that sys- most students completed MPC79. tem designers could work projects for inclusion in directly in VLSI and quickly MPC79. This was remarkable, as mask-making was again done by obtain prototypes at a cost in time many schools were offering the Micro Mask, pipelined with wafer and money equivalent to using off- course for the very first time, fabrication to reduce time to com- the-shelf TTL. and design tools were being pro- pletion. With the support of Merrill The MPC79 chip set contained grammed as they went along. These Brooksby and Pat Castro at HP, fab- 82 design projects from 124 design- events in the fall of 1979 escalated rication was again provided by HP’s ers, spread across 12 die-types on into a giant network adventure that ICPL using a 5-micron (m= 25.m n ) two wafer sets. Astoundingly, turn- climaxed as the design-cutoff time silicon-gate NMOS process. around time from design cutoff to approached, and as the final rush Meanwhile, Dick Lyon, Alan distribution of packaged chips was of design files flowed through the Bell, Martin Newell and I readied only 29 days [27]. ARPANET to PARC. “Implementation Documentation” for Importantly, these weren’t just At 5:00 pm sharp on December 4, designers, including lists of projects, any designs, for many pushed the 1979, Alan Bell closed external inter- die-maps, wire-bonding maps, elec- envelope of system architecture. actions and began die-layout plan- trical process test data, chip photos Jim Clark, for instance, prototyped ning, file merging (see Fig. 12), and by Melgar Photographers and more. the Geometry Engine and went on to MEBES format conversions. E-beam When the wafers arrived, we scribed launch Silicon Graphics Incorporated

FIGURE 13: Lynn Conway, Alan Bell, Martin Newell and Dick Lyon complete the final packaging of MPC79 chips for distribution to designers. FIGURE 14 (a, b): MPC79 wafer, die and packaged chip.

24 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE Design Methodology

Text, Instructors’ Guide, and Other Documents

Courses

Design Environments

Student Design Projects

Implementation Methodology & Systems

FIGURE 15: Photo of MPC79 die type BK, Design Prototypes from Stanford University. (Melgar Photography) FIGURE 17: The evolution of a multi-level system of knowledge: design projects provide feedback for debugging at all levels [28].

all seemed pretty straightforward. Lambda (later known as VLSI Design, Taking the courses for granted, most then Integrated System Design Maga- must have thought “I guess this is zine) soon attracted scores of techni- the way things are done in Silicon cal articles about VLSI architectures, Valley.” They had passed through design tools and implementation a huge paradigm shift [29] with- methods [30]. Those articles, along out even knowing it, never having with the many Melgar chip photo- designed or implemented prototype graphs it featured, made Lambda chips “the old-fashioned way” – and a potent medium for spreading the the entire system of methods had revolution [27], [28]. been proven sound by the success In another exciting move, Fair- of MPC79. bairn left PARC to become a found- FIGURE 16: “Geometry Engine” proto- But what about the rest of the ing member of VLSI Technology, type by Jim Clark of Stanford (a project on world? MPC79 hardly seemed believ- Inc. (VTI), a company that pio- MPC79 die-type BK). (Melgar Photography) able unless you were there. Like the neered VLSI ASIC design. Working Impressionist Movement in France, with Merrill Brooksby (Manager of we needed our own “Salon” – a sepa- Corporate Design Aids at HP and by based on that work (see Fig. 16). rate place for showing our works then a strong advocate of our new Guy Steele, Gerry Sussman, Jack where people could stand back, methods), Fairbairn also organized Holloway and Alan Bell created the grasp the thing in its entirety, and follow-on ‘Scheme’ (a dialect of LISP) see that the new methods stood. microprocessor, another stunning Badly needed, that level of success design. Along with scores of other wasn’t long in coming. innovative projects, these designs Chuck Seitz had organized the signaled that an architectural gold first VLSI Conference at Caltech in rush was underway. January 1979, to provide a forum for the new VLSI systems researchers. In New Media Proclaim Revolution January 1980, a second conference As engineers, our ideas are often was held at M.I.T., quickly bringing tested by primal forces, and in the news of the success of MPC79 to an end what works, works. No matter influential audience. how unknown the designer or how Meanwhile, during the exciting controversial the design, if a bridge summer of 1979, Doug Fairbairn and stands, it stands. Jim Rowson had had the idea of pub- MPC79 stood, and with it, the lishing a magazine for the emerg- design methods, the instructor’s ing community of VLSI designers guide, the book, the implementation and tool builders, and began work- guide, the course, and many innova- ing on it in parallel with our work tive EDA tools and chip designs (see on MPC79. The first issue appeared FIGURE 18: The premiere issue of Lambda, Fig. 17). To most participants it had in January 1980 (see Fig. 18), and the Magazine of VLSI Design (1st Qtr, 1980).

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 25 the videotaping of a short intensive These courses generated vast num- Cohen of USC-ISI (a major DARPA VLSI Design Course. Fairbairn and bers of large check-plots – many software contractor), and arranged Stanford professors Newkirk and appearing in the hallways of EECS a rapid transfer of the PARC MPC Mathews gave the primary lectures, departments around the coun- system technology and methods of with guest lectures given by Mead, try – and these amazing artifacts operation to ISI. Lyon, Rowson, Johannsen, Seitz and attracted even more students to the ISI soon announced the new myself – along with Richard New- new movement. VLSI adventurers “MOSIS” service, and it began oper- ton of U.C. Berkeley, Jack Holloway were the new gang in town, and our ations in early 1981. Prominent of M.I.T and Jim Clark of Stanford. graffiti were on all the walls [28]! Caltech researcher Chuck Seitz later In addition to wide use within HP, As courses spread to major univer- reflected that “MOSIS represented the VTI videotaped courses were sities all around the world, I struggled the first period since the pioneering run at other places to ramp up to supply startup ‘care-packages’ of work of Eckert and Mauchly on the their ASIC business. Meanwhile, Instructor’s Guides, Implementation ENIAC in the late 1940s that universi- Jon Allen ran intensive VLSI design Guides, and Implementation Docu- ties and small companies had access summer courses at M.I.T., impacting mentation from MPC79 and MPC580. to state-of-the-art digital technology.” design practices at DEC and other But a bigger question began to loom: What began in MPC79 as revolu- East-coast high-tech firms. Carlo How to institutionalize the MPC tionary technology to advance the Sequin also began offering inten- implementation service, and keep VLSI design movement became one sive courses in VLSI design, as part it going? of the earliest examples of auto- of the Hellman Associates Tutorial mated internet commerce. Operat- Series, at many locations around The DARPA VLSI Program ing to this day, MOSIS is still housed the country. Robert (Bob) Kahn and Duane Adams at the USC facility in Marina del Rey, Mead also began exploring oppor- at DARPA had provided funding for California [31]. tunities to capitalize on the work. Ivan Sutherland’s Silicon Structures Always a charismatic personality, Project at Caltech, and with Ivan’s The Paradigm Shifts he generated lots of buzz among guidance had closely followed the That same year, Electronics Mag- Silicon Valley venture capitalists. subsequent events. The success of azine awarded their Award for In 1981 Mead, along with Dave the M.I.T. course in the fall of 1978 Achievement jointly to Mead and Johannsen and Ed Cheng, founded convinced them that the new Mead- me. The magazine’s feature article Silicon Compilers Inc. to commer- Conway VLSI methods were sound. about the VLSI methods, the book cialize Johannsen’s work. Mead went The publication of the book and suc- and the successes of M.I.T.’78 and on to start even more companies as cess of MPC79 sealed the deal. MPC79 put the engineering commu- time went by. Kahn and Adams quickly con- nity on high alert that a revolution Perhaps the most powerful vinced DARPA’s leadership to was at hand [32]. medium for spreading the new launch a VLSI Research Program I had now experienced my “Stein- methods, however, was the ARPA- to build on the new methods, and metz moment”, for within two years, NET, as messages told the story of major funding soon flowed into 120 universities around the world MPC79. Before long, many more research on new VLSI architectures were offering Mead-Conway VLSI schools around the country began and EDA tools. Managed initially by courses, with the book translated offering Mead-Conway courses, and Adams in 1980 then by Paul Losle- into Japanese, Italian, French, and design tools and design files rock- ben in 1981 and beyond, the pro- Russian (this last, an “unauthor- eted across the ARPANET into a gram sponsored tens of millions of ized” government edition distrib- growing community of participants, dollars in VLSI research. With this uted among many Soviet engineers). in a huge wave of disruptive technol- level of support, a rush of intellec- Introduction to VLSI Systems eventu- ogy and innovation. tual adventurers jumped into the ally sold around 70,000 copies. Struggling to cope with these movement. To provide further Mead-Conway- fast-moving developments, we compatible books on key topics, planned yet another MPC system DARPA sponsors MOSIS Chuck Seitz and I served as series- run in the spring of 1980. Led by to Institutionalize MPC79 editors of Addison-Wesley’s new VLSI Ted Strollo at PARC, the ‘MPC580’ With DARPA support behind him, Systems Series – one of the first being project implemented 171 VLSI sys- Bert Sutherland then solved another Principles of CMOS VLSI Design by tem design projects from 15 dif- big problem: He found a home for Neil Weste and Kamran Eshraghian. ferent universities and research the MPC79 technology and imple- The design-tool building to sup- organizations. It was another crash- mentation service. In the spring of port early project labs at M.I.T., ing success and a further valida- 1980 Bert, Alan Bell, Ted Strollo and I U.C. Berkeley and Caltech led to tion of our methods and teachings. met with Keith Uncapher and Danny rapid evolution of tools for the

26 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE Mead-Conway methods, on the 801 at IBM—another triggering an explosion pioneering IBM project that in EDA innovations. This was “moth-balled” and only earthquake of innovation, published many years later. where teams across the Similarly, at Stanford, globe built on each other’s John Hennessey, Norm ideas, sharing libraries and Jouppi, Forest Baskett and tools, presaged and helped John Gill developed the RISC- lay groundwork for the based MIPS architecture modern open-source soft- and prototyped VLSI imple- ware revolution. mentations using MOSIS. At In 1979 two M.I.T. gradu- UNC, Henry Fuchs and John ate students, Chris Terman Poulton developed the Pixel- and Clark Baker, developed Planes VLSI raster graph- a pioneering set of tools, ics engine, with assistance including a design rule from Al Paeth and Alan Bell checker, circuit extractor at PARC. and static checker by Baker, Dick Lyon at PARC pio- and a switch-level simula- neered smart VLSI digital tor by Terman. The tools sensors based on lateral inhi- provided direct support bition, inventing the optical for ‘Mead-Conway design’. mouse and implementing They immediately received a VLSI prototype, and then widespread distribution, helped Martin Haeberli and and began to change the Robert Garner design a chip way people thought about for Xerox’s production Xerox doing their design work. In FIGURE 19: Conway and Mead receive the 1981 Electronics optical mouse. Lyon also particular, Baker’s circuit Award for Achievement. demonstrated how to create extractor was the first time VLSI architectural method- anyone had “closed the ologies for special applica- loop,” making sure that the actual in the movement went on to play tions, using digital signal processing circuit layout implemented the key roles in creating field program- as an example. Lyon and Gaetano intended circuit – and circuit extrac- mable gate array (FPGA) technology Borriello went on to create the first tion went on to become a mandatory and tools, such as Steve Trimberger single-chip Ethernet driver-receiver- part of most IC design processes. at Xilinx. encoder-decoder, exploiting Lyon’s During his M.I.T. Ph.D. work in The architectural work of Jim new semi-digital methods. 1979–1980, Randy Bryant originated Clark on the Geometry Engine, and The collaborations between PARC new methods for switch-level simu- of Steele, Sussman, Holloway and and HP, Caltech and Intel, and MIT lation, and he went on to place a Bell on the M.I.T. Scheme micropro- and DEC led to rapid infusions of the much-needed mathematical founda- cessor gained high visibility through Mead-Conway methods into those tion under switch-level design. By Lambda and the VLSI conferences, various firms. VLSI architectural 1983, the MOSSIM-II simulator that triggering a rush of additional bril- research also led to parallel VLSI Bryant and his students developed liant young computer scientists and processors such as the Connection (then at Caltech) was in use at Intel. architects into the movement. Machine by Danny Hillis at M.I.T., At Caltech, Dave Johannsen also After attending Jon Allen’s the Cosmic Cube by Chuck Seitz at pioneered work on “silicon compil- course at M.I.T. in the fall of 1979, Caltech and the WARP Processor ers” which he later commercialized Ron Rivest, Adi Shamir and Leon- by H. T. Kung at CMU. Such research with Mead. John Ousterhout and his ard Adelman implemented their was increasingly funded by DARPA students at U.C. Berkeley developed recently invented “RSA Cipher” in and led to many important startups, IC layout tools CAESAR and MAGIC, VLSI using MPC79. At U.C. Berkeley, including Silicon Graphics, MIPS establishing an architectural foun- Dave Patterson and Carlo Séquin led and Sun. dation for many later EDA software a team that created the RISC-I and MOSIS was initially closed to systems – including those com- RISC-II architectures in VLSI. Carlo those outside the U.S., triggering the mercialized by VLSI Technology, reports that this work was inspired launch of similar systems in other Cadence, Valid Logic, Daisy, Men- in part by a private communication countries. DEC computer architect tor Graphics and Viewlogic. Others with John Cocke, concerning work Craig Mudge returned to his native

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 27 Australia to found the CSIRO of those artifacts (and VLSI program and AUSMPC with them the new knowl- service, and my team at PARC edge) through cleverly aug- assisted in those efforts. mented diffusion channels, Reiner Hartenstein, a profes- and the provision of means sor at Technische Universität for immediate exploita- Kaiserslautern then visit- tion of the knowledge via ing U.C. Berkeley, returned the new QTA implementa- to Germany, began teaching tion service – all leading the course, and spearheaded to more artifacts and thus Germany’s E.I.S. service – ‘gain’ in the knowledge and he and Klaus Wölcken propagation process. also began advocating for a The emerging internet larger European-wide ser- and PC technology enabled vice. Ole Olesen from Den- me to operate in wholly mark and Christer Svensson new ways as an architect of from Sweden formed the disruptive change. Almost Nordic Multi-Project Chip no one at the time could organization and Francois FIGURE 20: Lynn Conway in her office at PARC in 1983. (Photo visualize what I was actu- Anceau founded the Circuits by Margaret Moulton, Palo Alto Weekly) ally doing, thus I needed no Multi-Projets (CMP) service in ‘permission’ to do it and no France, led in later years by one was power-positioned Bernard Courtois. Roger Van Over- and foundry services – triggering to stop it. As a corollary, few folks straeten and Hugo De Man founded the rapid evolution of what is now later understood what had really IMEC in Belgium, which provided called the “fabless/foundry” busi- happened – much less who had done a similar service (The ‘EUROCHIP’ ness model, as a growing fraction of it. Participants simply slid through service, formed in 1989, built upon the semiconductor industry. the resulting paradigm shift, and these earlier efforts.) ran with the results. With many researchers exploit- Some Reflections at the time A concise history of these unfolding MPC79, MPC580 and then MOSIS, Reflecting on all this at the time, I ing events is given in the book Fund- and with hundreds of bright stu- thought back to my years at Columbia ing a Revolution, published by the dents emerging from universities where I had minored and read widely National Academy Press in 1999, and expecting access to silicon as in cultural anthropology – being revealing the impact in academia they had experienced in school, particularly intrigued by processes and industry of the Mead-Conway commercial “foundries” of vari- underlying the diffusion of inno- design methods, the textbook, the ous forms started up to meet the vations. I realized that somewhere VLSI design courses and the MOSIS demand for manufacturing of inde- along the way, having recalled Everitt infrastructure [34]. pendently designed chips. Rogers’ early book on the topic [33], Ivan Sutherland’s challenge had The first was SynMOS, founded I had mounted a meta-level explora- been met, inventive simplifications by Larry Matheny and Bob Smith tion in ‘applied anthropology’ that being the key to success. Along the in September 1980, serving as ran in parallel with and guided my way we’d secured “freedom of the an agent/broker between design design of the VLSI design methods. silicon press,” and great novels were groups and mask and fab firms. In my early VLSI work this involved now being written. Building on the knowledge gener- the deliberate selection, structuring Along with the thrusts in per- ated by MCP79 and MPC580, VTI and encoding of the knowledge so sonal computing at PARC and in soon offered similar services, and as to have a good ‘impedance match’ the Valley beyond, and the vigor- by mid 1982 a special issue of VLSI with the culture of the targeted ous entrepreneurial engineering Design Magazine identified 38 such recipient communities, and with the culture they propagated, these companies; some were fabless firms simplification of that knowledge by collective events within ten years such as SynMOS and VTI, while creation and adoption of unifying spelled doom for the domineering others were front-offices to existing open standards. IBM of old. What a dramatic rever- fab firms. By the time of MPC79, this meta- sal of our mutual fortunes since Everything really took off as ven- level thrust shifted into enhancing that terrible time in 1968 when ture capital firms funded scores of the noticeability of the significance I was fired by IBM – a firing that entrepreneurial startups of VLSI of the new knowledge via dramatic could have shattered my life back design companies, EDA companies visible artifacts, the rapid diffusion in those days.

28 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE On to New Things By 1981, the VLSI work was well on its way. Bert thought it time to move on, and I founded the Knowledge Systems Area at PARC to explore artificial intelligence and collaboration technology. Even so, I was often asked to speak about VLSI. I gave the opening talk at the 2nd Caltech Conference on VLSI in 1981, describing the interactive meta-level research methods I had used to generate, test, validate and propagate the Mead-Conway methods [28], [35], [36]. I also key- FIGURE 21: Mead and Conway receiving the Wetherill Medal at the Franklin Institute in 1985. noted IEEE Compcon Spring 1983 and the ACM/IEEE Design Automa- While at DARPA, I got a call from and pointed him to other project tion Conference in 1984. Although Jim Duderstadt, Dean of Engineer- veterans who might be able to find reported to have given outstanding ing at the University of Michigan, additional documents; in July 1999 talks, as a still somewhat-reserved asking if I’d consider a faculty Mark organized an ACS reunion at person I found these experiences position along with a position in IBM Research, in Yorktown Heights, a bit intimidating, and as the VLSI his office as Associate Dean. I had to encourage this effort (see Fig. 22). revolution went viral I pulled back served on the Engineering College’s I also began posting information on from additional public exposure. National Advisory Committee, and my website to quietly explain my In contrast, Mead was now in his realized that it was a time of excit- long-ago transition to my colleagues, element. Armed with top-level con- ing expansion at the College. The hoping times had changed and some nections and an outgoing personal- Valley had also become so career would understand. ity, he soared toward fame as one and money obsessed I found it hard Michael Hiltzik of the L. A. Times of the “founding fathers” of Silicon to form good relationships there. In had earlier interviewed me while Valley [37]. 1985, I took the job at Michigan and writing Dealers of Lightning, his In 1983, Bob Cooper, Director of “got a life”. definitive book about Xerox PARC. DARPA, asked me to lead the plan- He became eager to report this fur- ning of a new program called Strate- Confronting the Past, ther story, and his article “Through gic Computing. The agency wanted Coming Out, Moving On the Gender Labyrinth” ran on to organize a coordinated research Thirteen years later, in late 1998, I November 19, 2000 [39]. Since then program in artificial intelligence, casually typed the word “supersca- I have interacted with thousands of computer architecture, VLSI design lar” into an internet search and up other gender transitioners via the and QTA prototyping to create a popped: “ACS—The first supersca- internet – expanding my website’s rich technology base for intelligent lar computer?” informational support as time went weapons systems. Reflecting on my Professor Mark Smotherman at along. My website, lynnconway.com, father’s leadership role in the WWII Clemson University had stumbled has served as a beacon of hope for synthetic rubber program, I took the onto information about the old proj- transitioners all around the world, mission, planning to return to PARC ect, and theorized in his website and this work has given further after my tour. My secretive past was that ACS was indeed the first. This meaning to my life. never an issue; I was granted a Top had become a question of historical During the early 2000’s, Smoth- Secret clearance. interest, because of the success of erman compiled a comprehensive I’m proud of the resulting the Intel Pentiums and other super- history of IBM-ACS in his website Strategic Computing Plan, for it scalar microprocessors. Stunned, with the help of many ACS vets [2]. quickly triggered over $100 mil- I realized the story of my involve- In February 2010, the Computer lion in funding for important comment would come out, and that I History Museum in Mountain view, puting research. I imagine it also needed to get out ahead of it. California, hosted a special event discouraged the Soviets, as they I contacted Mark and gradually to honor surviving veterans of the watched brilliant U.S. researchers revealed my role in the project. For- forgotten project. Around that same reach far beyond what they could tunately, I had saved all my ACS doc- time I also received the IEEE Com- hope to achieve behind the Iron umentation including the original puter Society’s Computer Pioneer Curtain [38]. DIS report. I shared these with Mark Award, based in part on my work

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 29 outfits in computing: IBM Advanced Computing Systems in the 1960s and Xerox PARC in the 1970s. Unde- niably cool ideas beamed down to researchers at those places, and creative people pulled together to really make things happen based on those ideas. Along the way, ACS pioneered the superscalar computer architecture so important today, and the PARC/ Caltech collaboration launched the VLSI Revolution. What a thrill it has been to watch our ideas become reality, ideas that have changed the world forever. I’ve also experienced a very special personal closure: The VLSI revolution enabled my DIS invention to finally come to life, to be implemented in silicon – and while I was still around to see it happen. What a ride it’s been!

Acknowledgements Many people named in these reflections played vital roles in the VLSI FIGURE 22: ACS Reunion, July 29, 1999: (L-R) John Cocke, Fran Allen, Herb Schorr, and Lynn design revolution; it was a thrill to Conway. (Photo by Mark Smotherman) join them on this great adventure. I especially want to acknowledge and thank W. R. (Bert) Sutherland [41], [42]. Without Bert’s wisdom and The VLSI Archive guidance, the Mead-Conway revolu- When reflecting on the past with friends and family, we often use tion would never have happened. photo albums to trigger shared memories – memories that bind us together and reveal how we got to where we are. However, what of our careers? Although the final products of our References work may remain, mementos of our adventures along the way are [1] M. Smotherman and D. Spicer, “Historical Reflections: IBM’s Single-Processor often lost in the rush of events. Only too late we realize what we Supercomputer Efforts – Insights on the should have saved. QR Code for the pioneering IBM Stretch and ACS projects”, Communications of the ACM, vol. 53, But it was different for the VLSI revolution. Perhaps it was the “VLSI Archive” no. 12, pp.28–30, December 2010. exciting visual artifacts, or the shared-sense that we were breaking [2] M. Smotherman, “IBM Advanced Computing Systems (ACS) — 1961 – 1969”, historical new ground. Whatever the reasons, many participants saved origi- reconstruction website, Clemson Univer- nal treasures from that era – research notes, chips and chip photos, sity. http://www.cs.clemson.edu/~mark/ acs.html even huge color check plots – storing them away for decades. [3] L. Conway, “IBM-ACS: Reminiscences and During the past few years members of the VLSI research team, Lessons Learned from a 1960’s Super- computer Project”; in: C. B. Jones, J. L. along with colleagues in academia and industry, have gathered up, Lloyd, (Eds.), Dependable and Historic scanned and photographed many of those artifacts and posted them Computing: Essays Dedicated to Brian Randell on the Occasion of his 75th online. A work in progress, the ‘VLSI Archive’ helps bring those QR Code for Lynn Birthday, Springer-Verlag, Berlin, 2011, exciting days back to life [21], [43]. Conway’s website pp.185–224. [4] L. Conway, B. Randell, D. Rozenberg, D. Senzig, “Dynamic Instruction Schedul- ing,” ACS Memorandum, IBM-ACS, Febru- ary 23, 1966. on dynamic instruction scheduling [5] L. Conway, “Lynn Conway’s IBM-ACS Finding Closure Archive”, lynnconway.com. http://ai.eecs. (DIS) [40]. It felt wonderful to see In reviewing my story I am struck by umich.edu/people/conway/ACS/Archive/ that work, done and then lost so my good fortune of having worked ACSarchive.html [6] H. Garfinkel, Studies in Ethnomethodology, long ago, finally acknowledged. at two of the greatest research Prentice Hall, Englewood Cliffs, N.J., 1967.

30 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE [7] L. Conway, “The Computer Design Process: [27] L. Conway, A. Bell and M.E. Newell, “MPC79: After earning her B.S. and M.S.E.E. A Proposed Plan for ACS”, ACS Memoran- The Large-Scale Demonstration of a New from Columbia University’s School dum, IBM-ACS, August 6, 1968. Way to Create Systems in Silicon”, Lambda, [8] B. O. Evans, “The Ill Fated ACS Project”: the Magazine of VLSI Design, vol.1, no. 2, of Engineering and Applied Science pages 27-28 in Evans’ memoir The Genesis pp. 10-19, Second Quarter 1980. in 1962 and 1963, Lynn joined IBM of the Mainframe, Wilhelm G. Spruth, ed., [28] L. Conway, “The MPC Adventures: Experi- University of Leipzig, Department of com- ences with the Generation of VLSI Design Research. There she made founda- puter science, June 2010. and Implementation Methodologies”, tional contributions to computer [9] L. M. Terman, “MOSFET Memory Circuits”, Xerox PARC Technical Report VLSI-81-2, Invited Paper, Proceedings of the IEEE, vol. January 1981. architecture, including the invention 59, no. 7, pp. 1044–1058, July 1971. [29] T. Kuhn, The Structure of Scientific Revo- of multiple-out-of-order dynamic [10] G. E. Moore, “Cramming more components lutions, 2nd Ed., University of Chicago onto integrated circuits”, Electronics, vol. Press, Chicago, 1970. instruction scheduling (DIS). Fired 38, no. 5, pp. 114–117, April 19, 1965. [30] D. Fairbairn and J. Rowson, “From the by IBM as she underwent her gender [11] R.F. Lyon, p.e.c., March 29, 2012. Editors”, Lambda, the Magazine of VLSI [12] B. Hoeneisen and C. Mead, “Fundamen- Design, vol. 1, no. 1, pp. 2–3, First Quar- transition in 1968, Lynn started her tal Limitations in Microelectronics-I. ter, 1980. career over again in a new identity, MOS Technology,” Solid State Electronics, [31] MOSIS, “The MOSIS Service – More than vol. 15, pp. 819–829, 1972. 50,000 designs in over 25 years of opera- soon becoming a computer architect [13] R. Bassett, To the Digital Age: Research tion”, mosis.com. at Memorex Corporation. Labs, Start-up Companies, and the Rise of [32] M. Marshall, L. Waller, and H. Wolff, MOS Technology, Johns Hopkins Univer- “The 1981 Achievement Award: For opti- Joining Xerox’s Palo Alto Research sity Press, Baltimore, 2002. mal VLSI design efforts, Mead and Con- Center in 1973, she invented scal- [14] R. K. Booher, “MOS GP Computer,” Proceed- way have fused device fabrication and ings of the Fall Joint Computer Conference, system-level architecture”, Electronics, able MOS design rules and highly AFIPS ‘68 (Fall, part I), San Francisco, vol. 54, no. 21, pp. 102–105, October 20, simplified methods for silicon chip December 9-11, 1968, pp.877–889. 1981. [15] L. Boysel and J. Murphy, “Four-phase LSI [33] E. M. Rogers, Diffusion of innovations, Free design, conceived of and became logic offers new approach to computer Press, New York, 1962. principal author of the famous Mead- designer”, Computer Design, pp. 141–146, [34] Computer Science and Telecommunica- April, 1970. tions Board, National Research Council, Conway text, and pioneered at M.I.T. [16] F. Faggin, “The Making of the First Funding a Revolution: Government Sup- the intensive university course that Microprocessor”, IEEE Solid-State Circuits port for Computing Research, National Magazine, vol. 1, no. 1, pp. 8–21, Winter Academy Press, Washington, DC, 1999, taught these methods – thereby 2009. pp. 113–122. launching a world-wide revolution in [17] R. Bower and R. Dill, “Insulated gate field [35] M. Stefik and L. Conway, “Towards the effect transistors fabricated using the Principled Engineering of Knowledge”, VLSI system design in the late 1970’s. gate as source-drain mask”, Proceedings AI Magazine, vol. 3:3, pp. 4–16, Summer Lynn also invented the inter- of the Electron Devices Meeting 1966 Inter- 1982. national, Washington, DC, October 26–28, [36] L. Conway, “The Design of VLSI Design net-based, rapid-chip-prototyping 1966, pp. 102–104. Methods”, Proc. of ESSCIRC’82: Eighth infrastructure institutionalized by [18] R. H. Dennard, F. H. Gaensslen, H. N. European Solid-State Circuits Confer- Yu, L. Rideout, E. Bassous and A. R. ence, Brussels, September 22-24, 1982, DARPA as the MOSIS system – sup- LeBlanc, “Design of Ion-Implanted MOS- pp. 106 –117. porting the rapid development of FET’S with Very Small Physical Dimen- [37] M. Cassidy, “Chip inventors getting their sions”, IEEE Journal of Solid-State Circuits, due at Hall of Fame induction”, San Jose thousands of chip designs, and vol. SC-9, no. 5, pp. 256–268, October Mercury, April 30, 2009. leading to many Silicon Valley start- 1974. [38] D. B. Davis, “Assessing the Strategic Com- [19] I. Sutherland, C. Mead and T. E. Everhart, puting Initiative”, High Technology, vol.5, ups in the 1980’s. “Basic Limitations in Microcircuit Fabri- no.4, pp. 41–49, April 1985 After serving as Assistant Direc- cation Technology”, ARPA Report R-1956- [39] M. A. Hiltzik, “Through the Gender Laby- ARPA, Published by Rand Corporation, rinth: How a bright boy with a penchant tor for Strategic Computing at DARPA Santa Monica, CA, November 1976. for tinkering grew up to be one of the top from 1983-85, Lynn joined the Uni- [20] I. Sutherland, “The Problem: How to build women in her high-tech field”, Los Angeles digital electronic circuits from now to Times Magazine (Cover Story), pp. 12–17, versity of Michigan as Professor of 1985”, Letter to W. R. Sutherland describ- Sunday, November 19, 2000. EECS and Associate Dean of Engi- ing the challenges presented by advances [40] IEEE Computer Society, “Lynn Conway, in microelectronics and proposing the 2009 Computer Pioneer Award Recipient,” neering, where she continued her Xerox-PARC/Caltech collaboration, Janu- January, 2010. http://www.computer.org/ distinguished career. Now retired, ary 26, 1976. portal/web/awards/conway [21] L. Conway, Ed., “The VLSI Archive: An online [41] W. R. (Bert) Sutherland, “Management she lives with her engineer husband archive of documents and artifacts from of Industrial Research: Exploring the Charlie on their 23 acre homestead the Mead-Conway VLSI design revolution”, Unknown Technical Future”, Perspective lynnconway.com. http://ai.eecs.umich.edu/ Series 2008-7, Sun Labs, July 2008. in rural Michigan. They’ve been people/conway/VLSI/VLSIarchive.html [42] W. R. (Bert) Sutherland, “Faith, Funds, & together for 25 years. [22] I. Sutherland and C. Mead, “Microelec- Fate: Prerequisites for the development tronics and Computer Science”, Scientific and transfer of new technology”, Pre- An IEEE Fellow, Lynn holds five American, pp. 210-228, November 1977. sentation at the celebration of the 40th U.S. Patents and has received a [23] C. Mead and L. Conway, Introduction to anniversary of USC-ISI, Marina del Rey, VLSI Systems, Xerox PARC, laser-printed California, April 26, 2012. number of professional honors for prepublication versions: Chapters 1–3, [43] L. Conway, “The VLSI Archive”, Electronic her work, including the Electronics October 1977; Chapters 1–5, February Design News, June 3, 2009. http://edagraf- 1978; Chapters 1–9, July 1978. fiti.com/?p=101 Award for Achievement (1981), the [24] C. Mead and L. Conway, Introduction to Pender Award, University of Penn- VLSI Systems, Addison-Wesley, Reading, MA, 1980. sylvania (1984), the Wetherill Medal [25] R. Hon and C. Sequin, A Guide to LSI Imple- of the Franklin Institute (1985), elec- mentation, Xerox PARC Technical Report, About the Author 1st Ed., September 1978; 2nd Ed., January Lynn Conway ([email protected]) is tion to the National Academy of 1980. Professor of Electrical Engineering Engineering (1989), and the Com- [26] L. Conway, The M.I.T.’78 VLSI System Design Course: A Guidebook for the and Computer Science, Emerita, at puter Pioneer Award of the IEEE Instructor of VLSI System Design, Xerox the University of Michigan. Computer Society (2009). PARC, August 12, 1979.

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 31 A Paradigm Shift Was Happening All Around Us hankfully, Ridley Scott’s brilliant Super Bowl ad, proclaiming that 1984 won’t be like 1984, heralded a Golden Age of Electronics instead of George Orwell’s dyspeptic scenario. Apple’s Macintosh debuted, Hewlett-Packard and its new LaserJet printer set record sales and profits for Silicon Valley companies, and T I met Lynn Conway when we both joined the IEEE Spectrum Advisory Board. Although Conway was a bit shy and had held back from the limelight, I already “knew” her. As HP’s Corporate Engineering Director, my job was to “know” the Valley. Operating a prototype Macintosh six months prior to introduction, I’d sparked Tom Whitney’s Sum- merhill Partners’ angel round that was the initial funding for Aldus Corporation and Page- Chuck House maker. I‘d compared views with Xerox PARC’s Warren Teitleman, both a Caltech classmate and a neighbor (with an Alto and then a Dorado by his home swimming pool). Warren and I had both known Carver Mead for 25 years. Mead was my senior advisor, urging me to join HP in 1962. By 1975, Mead and Conway were collaborating at PARC. But I really knew Conway because of “the book” and the subsequent Electronics cover Award of Achievement in October 1981 [1]. Electronics, perhaps the most prestigious trade magazine at that time, had honored Intel’s founders, Bob Noyce and Gordon Moore, in their inaugural award in 1974; they’d singled out my Logic State Analyzers in 1977 (Figure 1) [2]. I’d joked with Mead that this was the first time I’d beaten him; he reminded me that he’d done the calculations for Gordon and even facetiously said the name “Moore’s Law” could

Digital Object Identifier 10.1109/MSSC.2012.2215759 Date of publication: 24 December 2012

32 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE 1943-0582/12/$31.00©2012IEEE have been “Mead’s Law”—he winked My point: circuit design was no that he’d “won twice.” longer an element-by-element issue, The book—Introduction to VLSI but a question of “state flow” at lots Systems [3]—was a landmark. Simplis- of nodes—the sequential “words” of tic histories of Silicon Valley and the registers rather than the voltages of Personal Computer Revolution focus device pins. In effect, it argued that on the hobbyist Homebrew Com- electronic voltages, whether analogic puter Club, the youthful Steves (Jobs or switched, would “lose out” to soft- and Wozniak), with a Gary Kildall ware instructions, and “data states.” vs. Bill Gates footnote. But the para- Systems would be designed and ana- digm shift that enabled Apple’s and lyzed for proper state sequencing Microsoft’s emergence had vital ante- rather than analogic signal distor- cedents that have largely remained tion or digital switching times. obscure. Conway’s role there, while I’d have done fine if I had left crucial, has often seemed “behind the See’s Candy POS terminal exam- the scenes” to outside observers. ple out of the discussion, but I got The second annual IEEE Work- carried away with case studies we shop on Microprocessors (now knew from selling Logic Analyzers FIGURE 1: Electronics 1977 cover, with the called the Asilomar Microcom- that were alien to this sophisticated Award of Achievement for Logic Analyzers. puter Workshop, or AMW) was held assemblage. Four-bit microproces- (Courtesy of Chuck House.) Wednesday–Friday, April 28-30, sors—the Intel 4040, for example— 1976, near Monterey, California were “toys” to this group, and I [4]. Arriving the night before from didn’t know any better. In response I’d already seen the power HP Colorado Springs, I knew few to questions, though, I was able to of pre-publication books. Clare’s of the ninety-four attendees. Espy- describe our dedicated 8080 “per- insightful ASM methodology text, ing Carver Mead, my college senior sonality module” for a forthcoming Designing Logic Systems Using State advisor, across the room in the buf- logic analyzer, just as an HP col- Machines, swept through the HP fet line, I joined him and six other league tried to “shush” me. design community (Figure 2) [7]. ex-students at a dinner table. With a When I finished, Carver was the Stanford’s electrical engineering glazed look, Carver intoned that he first person to the podium, exclaim- department was not so sanguine, recalled each of us. ing, “NOW I REMEMBER YOU.” however, canceling Clare’s course AMW was the most success- He excitedly explained that our in 1974, saying that “it is a little bit ful of four private invitation IEEE concepts of data domain (versus too unconventional” [8]. Stanford design workshops that arose to dis- the traditional time domain or fre- preferred Quine-McCluskey minimi- cuss these presumptuously named quency domain methods taught to zation techniques. Fittingly, Mead’s ‘microcomputer’ integrated circuits. all electronic engineers) fit perfectly Authoring the Electronics May, 1975 with some work he was doing. He article: “Engineering in the Data asked to borrow my transparency Domain Calls for a New Kind of foils, and proceeded to sketch some- Digital Instrument” got me invited thing he called “the tall thin man” to AMW’s 2nd workshop to describe methodology for transistor layout. the philosophy behind HP’s new The room was mesmerized. Logic State Analyzers, which were I’d been lucky at CalTech to be in tools analogous to oscilloscopes to Richard Feynman’s first freshman give digital designers insight for lectures with handwritten notes; this using these complicated chips [5]. scene repeated at AMW2 as people My Wednesday evening talk asked how they could get copies of described tools that enabled a very these new ideas. Mead said that he different design methodology— and Lynn Conway over at Xerox PARC Algorithmic State Machine design were preparing some notes, which he (ASM)—using Lyapunov state-vari- might send electronically. Electroni- able mathematics, and derivative cally? Yes, he said, if you have access techniques pioneered at HP by Chris to an ARPANET node. Some in the Clare and Dave Cochran for the room nodded; others looked quizzi- FIGURE 2: Chris Clare’s book: designing spectacularly successful handheld cal. The electric atmosphere of the logic systems using state machines. scientific calculators (e.g., HP 35) [6]. evening is still etched in memory. (Courtesy of Chuck House.)

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 33 and its attendees as the bowels of Hewlett-Packard, wafers were fab- Silicon Valley...” [11]. ricated at her Integrated Circuit AMW would feature many key Processing Lab (ICPL) at nearby contributors to this new paradigm HP Research using a 6-micron during the first six years. Intel’s (mmn= )3 silicon-gate NMOS pro- Sterling Hou extolled the Intellec 8 cess (Figures 3, 4). Everything went for developing 4004 and 8008 code off without a hitch, and the pack- at AMW1; he shared the stage with aged chips were shipped back to me at AMW2, describing the Intellec M.I.T. on January 18, 1979” [13]. I’ve FIGURE 3: Computer-controlled plasma system at HP’s ICPL. (Courtesy of Hewlett- MDS to assist Intel 8080 microcom- wondered why Conway hadn’t pre- Packard [12].) puter designers. The “toy” Intel 4004 sented the work; colleagues recall had 2,300 transistors and a clock just that AMW “was invite only.” speed less than 1 MHz—its larg- Conway next fashioned an even Caltech colleague Ivan Sutherland est usage by 1976 was in a grocery more ambitious multi-university prepared a Scientific American arti- clerking tool built by MSI Data of program—MPC79. The first session cle (1977) [9] about the challenge Costa Mesa for Alpha Beta Grocery of AMW6 featured her bold initia- microelectronics posed to com- Stores on a whim. tive as “Special Purpose Building puting theory and practice, noting Moore’s Law from 1965 predicted Blocks,” chaired Wednesday April that since most of a chip’s surface a bright future, but in spring 1976, 23, 1980 by Carlo Séquin, described was occupied by “wires” (conduct- this august body was still pro- by Carver Mead, Jim Clark, Glenn ing pathways) rather than “com- foundly skeptical. No one would Krasner and Dick Lyon. The MPC79 ponents” (transistors), decades of have believed that a Pentium 4 chip set contained 82 design proj- minimization theory in logic design chip with a billion transistors and ects from 124 designers at 12 uni- had become irrelevant [10]. a gigahertz clock speed would exist versities, spread across 12 die-types AMW would “make history”—as twenty-five years later, let alone sell on two wafer sets. Astoundingly, industry veteran Ted Laliotis noted for a thousand dollars. turnaround time from design cut- thirty years later: “the intentional An uneventful AMW3 was fol- off to distribution of packaged lack of written proceedings and the lowed by AMW4 in 1978, which chips was only 29 days, again using exclusion of general press represen- featured Charlie Bass, Dave Far- Hewlett-Packard’s Palo Alto research tatives was perhaps the most dis- ber, Gary Kildall, Bernie Peuto, Ken fabrication facility. Conway’s proud tinctive characteristic of AMW that Bowles and Len Shustek among oth- assessment: “We’d done the impos- made it so special and successful. ers. A strong Berkeley contingent sible: demonstrating that system This encouraged the scientists and showed up for AMW5, with Alvin designers could work directly in engineers who were at the cutting Despain as Chair, and Dave Patter- VLSI and quickly obtain prototypes edge of the technology, the movers son, Carlo Séquin and Dave Hodges at a cost in time and money equiva- and shakers that shaped Silicon Val- presenting alongside Nick Tredden- lent to using off-the-shelf TTL” [14]. ley, the designers of the next gen- nick (Motorola 68000), and Intel’s Significant chips were built in the eration microprocessors, to discuss Ted Hoff. MPC79 “run,” including Jim Clark’s and debate freely the various issues The real excitement at AMW5, Geometry Engine that spawned Sili- facing microprocessors. In fact, however, was the last session on con Graphics Corporation. Substan- many features, or lack of, were born Friday, May 25, 1979, entitled “New tial interest surfaced at Caltech, MIT, during the discussions and debates Directions and Architectures.” For- Berkeley, and Stanford—enough at AMW. We often referred to AMW est Baskett, newly arriving at Stan- that Pat Castro and her colleagues at ford from Xerox PARC, reviewed the HP reluctantly had to “pull the plug” extraordinary results of nineteen on opening their facility to universi- projects in Lynn Conway’s MPC78 ties, citing their industrial priority. course at MIT. Conway had written Castro says today: “Jim Gibbons at that: “I sent the final student design Stanford was really offended when files to PARC via the ARPANET on I told him ‘no’.” Gibbons acknowl- December 6, 1978. Lyon and Bell edges that this action stimulated then merged the 19 projects into a his decision to build Stanford’s CIS single multi-project chip CIF file, (Computer Integrated Systems) lab; converted it to Mann PG format and he further states that Lynn Conway, had masks made by Micro Mask…. from his perspective, was the singu- FIGURE 4: Fabrication processing line at In this first phase of an important lar force behind the entire foundry HP’s ICPL. (Courtesy of Pat Castro.) collaboration with Pat Castro at development that emerged.

34 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE Castro, the first woman engineer References [1] Waller, Marshall L., and H. Wolff, “The 1981 hired by Fairchild Semiconductor, Achievement Award: For optimal VLSI design built the world’s first three-inch efforts, Mead and Conway have fused device fabrication and system-level architecture”, wafer fab facility for HP in 1975, pio- Electronics, (54:21), October 20, 1981, cover neering a way to prototype multiple and pp. 102–105. [2] The 1977 Electronics Award of Achievement,” processes and designs. Her supervi- Electronics, (50:22), October 27, 1977. sor, Merrill Brooksby (Figure 5), who [3] Mead, Carver and Lynn Conway, “Introduction to VLSI Systems,” Addison-Wesley, Reading, MA, had built HP’s first IC fabrication 1980. facility in 1967, supported Castro’s [4] Agendas for the first thirty years are at leadership for this shop because of http://www.bswd.com/AMW-35thWorkshop Booklet-SingleSidedVersion.pdf. the breadth of HP’s scientific instru- [5] House, Charles H., “Engineering in the mentation requirements. The dedi- Data Domain calls for a new kind of digital instrument,” Electronics, (48:9), May 1, 1975, cation and willingness of Castro pp. 75–81. (Figure 6) to work with universities [6] On April 14, 2009, the IEEE Milestone in Electrical Engineering award for the HP 35 was vital to produce the resultant was presented by the outgoing president student-designed wire-bonded chips of IEEE, Dr. Lewis Terman. Terman was one in Conway’s MPC program. of Mead’s seven ex-students at the 1976 Asilomar dinner table. The resultant methods would [7] C. Clare, Designing Logic Systems Using convulse an industry—but fame State Machines, McGraw-Hill, NY, 1973. [8] C. House and R. Price, The HP Phenomenon, FIGURE 5: Merrill Brooksby, HP Corporate would accrue to the people who Stanford University Press, 2009, p. 260. Design Aids Center director. (Courtesy of built the products using the chips, [9] Sutherland, Ivan and Carver Mead, Hewlett-Packard [15].) “Microelectronics and Computer Science”, rather than to those who did the Scientific American, November 1977, incredible breakthroughs to cre- pp. 210–228. Clearly a new design paradigm ate the methods and even the chips [10] Conway, Lynn, “IBM-ACS: Reminiscences and Lessons Learned from a 1960’s had emerged—rendering discrete themselves. Supercomputer Project”; in: C. B. Jones, circuit design as irrelevant as Quine- Paradigm shifts seem to be uni- J. L. Lloyd, (Eds.), Dependable and Historic Computing: Essays Dedicated to Brian McCluskey minimization rules. versally resisted—this one was no Randell on the Occasion of his 75th Birthday, Importantly, imaginative support different. Virtually all mainframe Springer-Verlag, Berlin, 2011, pp.185–224. in terms of infrastructure and idea and minicomputer companies [11] T. Laliotis, Commemorative Booklet for the 35th Asilomar Microcomputer dissemination proved as valuable as (ironically, even Intel leadership), Workshop, April 15–17, 2009. the concepts, tools, and chips. “The struggled to comprehend. Hewlett- [12] Hewlett-Packard Journal, June 1981, 32:6, p. 30. electronic book” and the “foundry” Packard’s wildly decentralized [13] Conway, Ibid. were both prescient and necessary, organization allowed some indi- [14] Conway, Ibid. providing momentum and proof viduals—Merrill Brooksby and Pat [15] Hewlett-Packard Journal, Ibid. [16] Hewlett-Packard Reporter, November points. Castro in the IC lab; Chris Clare in 1977, p. 34 calculators; and my team in the logic test business—to chase the new par- About the Author adigm. But even at HP, conventional Chuck House, an IEEE and ACM wisdom prevailed in most divisions. Fellow, Director of InnovaScapes Moreover, Castro’s lab was “taken Institute, was recently Chancellor out of commission” for such indus- of Cogswell College, Sunnyvale, CA, try-university experiments, when and Executive Director of Media X the volume of processing requests @ Stanford University after a long from Stanford, CalTech, and Berke- career at Hewlett-Packard and Intel. ley among others escalated on the Author of The HP Phenomenon, his heels of MPC 79. work has been honored by CNN It took nearly another decade (Top 25 products of past 25 years), before commercialized EDA design Smithsonian (200 Wizards of Com- tools and silicon foundries emerged puting), Electronics Design (Top 50 to support industrial designers products of 20th century), and the in the way that Conway’s MPC79 HP Medal of Defiance. A past vice sponsored. In retrospect, Conway’s president of IEEE, he also was an dedication and insights irrevocably ACM president. altered extant companies while fuel- FIGURE 6: Patricia Castro, HP ICPL director, ing a worldwide digital electronics in 1977. (Courtesy of Hewlett-Packard [16].) cornucopia. We are all beneficiaries.

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 35 Carlo H. Séquin Witnessing the Birth of VLSI Design

have had several lucky breaks in my demonstrated a CCD sensor array with 8 by 8 pixels. career. One of them was the opportu- Since I have been enamored with geometry ever since nity to be immersed in the emergence of high-school, I jumped to the opportunity to design the VLSI technology and its associated design layouts of much larger imaging arrays, first with 128 by I methodology. I got my Ph.D. in Experimen- 128 pixels, and eventually (in 1973) with two interlaced tal Physics from the University of Basel, Switzerland, fields of 256 scan lines, which was compatible with the in 1969. My first job was with Bell Telephone Laborato- American broadcast TV format. The latter device was ries in Murray Hill, New Jersey. Because of my thesis, way larger than any other IC chips of that time: It had ¾ in which I studied the behavior of Interface States in of a million MOS electrodes placed in a rectangle mea- Metal-Oxide-Semiconductor Field-Effect Transistors, I suring ½ inch by 5/8 of an inch (Figure 1). was placed into Lab 225, which was engaged in building The success of this chip brought me a job offer from solid state imaging devices based on the brand new CCD the University of California. In 1976 I went to Berkeley as (Charge-Coupled Device) technology, which had been visiting lecturer, and in 1977 I became a tenured faculty conceived there a few months earlier. When I arrived, member in the Computer Science Division in the EECS the group with Mike Tompsett and Gil Amelio had just department. Although my background was mostly on the EE side, I was hired into the CS Division because there

Digital Object Identifier 10.1109/MSSC.2012.2215758 was an urgent need for expansion. Tom Everhart, then Date of publication: 24 December 2012 chair of EECS, explained to me that this would put me in

36 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE 1943-0582/12/$31.00©2012IEEE graphics-oriented computer stations were readily used by everybody; prototypes of powerful bit-mapped dis- play panels implied a technological revolution just around the corner; lively discussions were taking place all day long in lounge-like settings furnished with bean- bags. Overall it felt like I could obtain a glimpse of what the future would soon bring. But most of all, it was the charisma and enthusiasm of Lynn Conway that drew me into this environment. I was excited by the visionary plan of establishing some simple and logical ground rules for the design of integrated circuits, which could readily be taught to a whole class of smart students. Up to this point, my experience with the design of IC chips was more like a magical art—learned by osmo- sis, slowly transcending from a few old masters to their devoted pupils, who would gradually absorb the mysterious ways in which these devices were brought to life. (I am exaggerating only a little bit.) The new approach was to extend the system of nested abstractions that was already used in the design of binary logic circuits (e.g., using TTL logic gates) upwards and downwards, so that the abstractions would cover the whole range from the architectural systems level down to the layout of the gates of individual transistors. The technology of choice was the rapidly growing n-MOS process that had become stable and well controlled in the early 1970s. The devices were in principle quite simple: a source and a drain region in the silicon layer, separated by a channel that could be a unique and turned on and off by the voltage of a metal gate placed important position. While on top of the thin isolating oxide layer. This geometry I already had several acquaintances and friends could be represented succinctly by a red line (repre- on the EE side, it would be important for my career to senting the gate electrode) crossing a green line (rep- establish close working relations with my CS colleagues. resenting the silicon channel). Suddenly the layout of Having good connections in both Divisions should then an integrated circuit was captured by simple and clean allow me to help meld together those two Divisions, which at that time were not very congenial competitors. Naïvely I accepted this mission to bring those two factions together. Fortunately I got some unexpected help in this audacious task. As soon as I was an official faculty member at Berkeley, and no longer a Bell Labs employee, I was contacted by Lynn Conway at Xerox PARC. She invited me to be a consultant in a project to develop a new methodology for the design of large and complex integrated circuits. After a single visit to Xerox PARC, I enthusi- astically accepted this additional job offer. The decision was made easy FIGURE 1: The first solid-state image sensor compatible with the American broadcast TV by what I saw at that Lab: Interactive format.

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 37 Most of all, though, it was the charisma system architecture onto the surface of a silicon wafer would improve and enthusiasm of Lynn Conway that drew layout density by one or two orders me into this environment. of magnitude, gave ammunition to people who were skeptical of those early efforts. But neither Carver nor geometrical diagrams. This had specify “a linear array of n cells, Lynn let themselves be discouraged tremendous appeal for me! of size s, separated by distance d.” by such negative evaluations. They Of course, the method was a lit- At other times I would engage in responded by decisively moving tle more complicated than outlined brain-storming sessions of how to along the envisioned path, clari- above. To make it useful, quite a few use a computer program to turn fying one issue after another, and details had to be figured out. But the Boolean specifications of a pro- solving problems one at a time as these challenges were exactly of the grammable logic array (PLA) into they arose. nature that had rendered geometry an array of green and red line ele- Carver Mead saw clearly that my favorite subject in high school. ments crossing at right angles, thus Moore’s Law, which predicted a dou- So for the next several years I rou- capturing the basic arrangements bling of chip complexity every 18 tinely spent one day of every week of a compact n-MOS realization of to 24 months, would soon allow us at Xerox PARC; and this was typi- circuitry that would perform the to place systems on a single chip cally the highlight of the week. It specified function. with tens or hundreds of thousands was wonderful to have “one day off,” However, for small PLAs with of individual switching elements; or at least one day that was quite only a handful of inputs and out- those systems could no longer be different from an ordinary “school puts, the generated layouts were not designed, drawn, and checked by day.” I worked with Lynn Conway competitive in compactness with the traditional “manual” methods. and her team to put together con- the beautiful, handcrafted layouts Thus we were rapidly approaching crete guidelines for the new way of done by expert IC layout design- a “complexity barrier” in the design thinking about integrated systems. ers. Therefore many engineers in of integrated circuits. And indeed, it At several occasions during my con- Silicon Valley, as well as some of my was not too long before some com- sulting days at Xerox PARC, I also met colleagues in academia, dismissed puter chips had logic arrays with Carver Mead and often engaged in those early results as “toy exam- several dozens of inputs, on the heated discussions of what it really ples” of no real significance. Also, order of a hundred outputs, and meant “to map the systems architec- the sometimes overly enthusiastic more than 200 min-terms. Now the ture onto the 2-dimensional space statements by Carver Mead, claim- computer generated layouts could of a chip” or how to unambiguously ing that a proper mapping of the produce working solutions that could no longer be obtained with manual layout. I eagerly absorbed those ideas and developments and brought them back to Berkeley. My personal, special graduate course, CS 248, was aimed at Modular MOS LSI Design. This gave me an opportunity to try out emerging new ideas and carry that feedback back to Xerox PARC. By 1978 Lynn Conway had launched a full-blown effort to capture all the new design concepts in a textbook, and she was making available emerging chapters to whoever was willing to teach such a design course. So this was different of the normal model of developing a text book, where notes accumulated over several offerings of a particular course eventually got distilled into a refined text that documented FIGURE 2: The first functional RISC chip, built by graduate students at U.C. Berkeley. all the good ideas that had survived

38 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE this evolutionary process. In this The IC-CAD effort at UC Berkeley was the best one case, ideas developed in brain- storming sessions at Xerox PARC in academia orld-wide; this was brought about were used to define various lectures by a close collaboration of research groups from and set the overall itinerary of my both EE and CS. LSI Design course. In addition the new methods were also applied in joint research with tools and designing computer chips 1977 he joined the faculty in the Dave Patterson. Realizing that the that gained attention and apprecia- EECS Department at Berkeley. He real estate on an IC chip was a lim- tion in Silicon Valley as well as in started out by teaching courses on ited, precious resource, we carefully academia. Very soon there was no the subject of very large-scale inte- evaluated what circuitry and what doubt that the IC-CAD effort at UC grated (VLSI) circuits, thereby try- functions would deliver the most Berkeley was the best one in aca- ing to build a bridge between the CS “bang” per square millimeter for demia world-wide, and that this was division and the EE faculty. In the making a powerful, general-purpose mostly brought about by a close early 1980’s, jointly with D. Patter- microprocessor. We then applied the collaboration of research groups son he introduced the “RISC” concept new structured layout methodology from both EE and CS. Before too to the world of microcomputers. He for n-MOS circuitry. The result was long, other schools, like MIT and was head of the Computer Science the RISC (Reduced Instruction Set Stanford, took notice and started to Division from 1980 till 1983. Dur- Computer) principle, and by 1981 emulate the Berkeley EE+CS collab- ing his tenure at Berkeley Séquin has our students had realized the first orative model. directed the research of 26 Ph.D. stu- working single-chip RISC (Figure 2). In summary, thanks to the out- dents and has supervised 77 gradu- Gradually the LSI chip-building reach of Lynn Conway, thanks to ate students in the completion their activities at Berkeley expanded. For her enthusiasm and support, and Masters Theses. the more ambitious follow-on proj- thanks to the exciting ideas emerg- For the last two decades Séquin’s ects, SOAR (Smalltalk On A RISC) and ing in VLSI Design, I was able to work has been focused on com- SPUR (Symbolic Processing Using start an activity at Berkeley that puter graphics, geometric modeling, RISCs), we needed the help and brought together EE and CS and thus mathematical visualizations, and expertise of our colleagues on the allowed me to make good on the on the development of computer EE side, in particular, David Hodges, mission originally assigned to me aided design (CAD) tools for circuit Alberto Sangiovanni, and Richard by Tom Everhart. By the early 1980s designers, architects, mechanical Newton. We also needed better and the harsh boundaries between the engineers, and more recently also easier-to-use CAD tools to lay out two Divisions had mostly disap- for artists creating abstract geomet- those complicated chips in sym- peared, many interdisciplinary ric art. His collaboration with sculp- bolic sticks format, convert them research groups had formed, and tor Brent Collins of Gower, MO, and into compact layouts without design students were freely transitioning with bronze artist Steve Reinmuth rule violations, and finally verify from one side to the other. As an of Eugene, OR, has resulted in large- the proper logic operation and example, Manolis Katevenis first did scale bronze sculptures that are timing behavior of those circuits. his MS degree under David Sakrison installed in the lobby of Sutardja John Ousterhout in the CS Division on the EE side and then came to CS Dai Hall at U.C. Berkeley and in the played a major role in this domain; Division to do his Ph.D. with me and courtyard of the H&R Block head- he made a personal commitment to Dave Patterson; he became the key quarters building in Kansas City. develop a new IC-CAD tool for every designer of the successful RISC chip. Dr. Séquin is a Fellow of the new computer chip that this EECS- ACM, a Fellow of the IEEE, and has team designed. About the Author been elected to the Swiss Academy This activity attracted a lot of Carlo H. Séquin is a professor of of Engineering Sciences. He has attention and drew in ever bigger Computer Science at the University received the IEEE Technical Achieve- groups of students. Doing IC lay- of California, Berkeley. He received ment Award for contributions to out with a user-friendly CAD tool his Ph.D. degree in experimental the development of computer-aided was a lot of fun (almost like today’s physics from the University of Basel, design tools, the Diane S. McEntyre video games) and it gave the stu- Switzerland, in 1969. From 1970 till Award for Excellence in Teaching, dents a true sense of achievement. 1976 he worked at Bell Telephone and an Outstanding Service Award By the early 1980s seven faculty and Laboratories, Murray Hill, NJ, on the from the University of California for more than 30 students from both design and investigation of Charge- Exceptional Leadership in the Con- EE and CS were working together Coupled Devices for imaging and ception, Design and Realization of to develop new powerful IC CAD signal processing applications. In Soda Hall.

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 39 “Covering”: How we missed the inside-story of the VLSI revolution.

Ken Shepard

’m delighted to comment on Lynn Con- faculty member, as a VLSI educator, as a former IBM way’s outstanding piece “Reminiscences employee (I worked for five years at IBM Research after of the VLSI Revolution: How a series of completing my Ph.D., many years after Lynn left), and as failures triggered a paradigm shift in digi- a gay man. I’d like to provide commentary from each of I tal design.” What we often forget in engi- these perspectives. neering and science is that innovation and technological As an electrical engineering student at Princeton from progress happen because of actions of people, people 1984–1987, I was first influenced by Lynn through the who have personalities, lives, and life stories that influ- famous Mead and Conway text book. I graduated from ence them and are influenced by those around them. Princeton in three years (a deal with my parents—they Lynn’s story provides a case in point. would pay for me to go to Princeton if I worked hard I’m writing this from a “younger” perspective hav- and completed my degree in three years—a good deal, ing known Lynn personally for only about five years indeed) but this left me “skipping” a lot of courses that (but having been influenced by her work for more I knew I could teach myself and signing up for the more than 25 years). Lynn’s story and work have touched me advanced courses. personally on many levels, as a student, as a Columbia This trick worked well for me except when I wanted to sign up for EECS 420 (VLSI Systems) in my senior

Digital Object Identifier 10.1109/MSSC.2012.2215757 year, a new course based on the new Mead and Conway Date of publication: 24 December 2012 textbook. I had skipped the required course in digital

40 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE 1943-0582/12/$31.00©2012IEEE logic because I knew that I could As a former IBM employee, Lynn’s brings. We know about the influ- just teach myself the material over story touches me in two important ence of the “Mead-Conway” book, the summer, and the professor who ways. First, IBM Research was and but no one seemed able to explain taught the course at the time would still is (despite the many changes what had actually happened. not let me in because I did not have at IBM and the industry these last Untold went Lynn’s story as the hid- the prerequisite. I was determined 15 years) an amazing place with den hand that innovated, shaped to learn the material myself, which many amazing people, my husband and guided the VLSI paradigm-shift I did by reading the Mead and Con- among them. The time I spent there through the book, the courses and way text cover-to-cover. I feel a cer- was very influential on my future the MPC79/MOSIS-infrastructure. tain vindication since I now teach career and I still have many pro- It is now becoming clearer why VLSI Circuits at Columbia to over ductive interactions with IBM—it’s this story was missed. Lynn’s 45 students every fall. Wow, that a great place and a great company accomplishments as an engineer was a good book. and I think Lynn would agree. are remarkable, but when placed in As a Columbia faculty mem- That being said, the history of the context of the discrimination ber, I am very proud to count Lynn what IBM did to Lynn in the 1960s and personal struggle she faced as among our great alumnae. Colum- surrounding her gender transition a transgender woman, they are epic bia’s engineering school and elec- is unconscionable. Fortunately, this and inspirational. trical engineering program have a is a different time now and IBM has In a time when gender transition- very influential history and Colum- done a 180-degree turn in recogniz- ers were pathologized, stigmatized, bia’s faculty continue to innovate ing and valuing LGBT persons. For socially ostracized and virtually and train outstanding students. The those who aren’t in the know, this unemployable, Lynn found herself size of our program is small and I often feel that we are really under- appreciated when compared with As a VLSI educator, I sense that few larger schools such as MIT, Stanford, or Cornell. Columbia’s engineering students today recognize the impact of the program also leverages the incred- Mead-Conway text and how it led to the ible strengths of the larger univer- “VLSI revolution.” sity with strong science departments and a culture of out-of-the-box thinking. Columbia provides an intellectual culture to prepare students to stands for “lesbian, gay, bisexual, the innovator at the center of the do great things. There is no greater and transgender” and refers to VLSI revolution. Constantly fearing testament to that than the life and people whose diversity is manifest an “outing,” she worked passion- career of Lynn Conway. through sexual orientation or gen- ately inside the laboratories of Xerox As a VLSI educator, I sense that der identity. PARC to orchestrate events while few students today recognize the IBM adopted a policy of nondis- minimizing external exposures— impact of the Mead-Conway text crimination on the basis of sexual thereby remaining a mystery-person and how it led to the “VLSI revolu- orientation in 1984 and added to those outside. tion.” In my own classes, I always “gender identity and expression” Kenji Yoshino, noted law pro- make sure to mention the impact in 2002. After 40 years, it is finally fessor at NYU, in his book Cover- Mead and Conway had on creat- recognized that companies can- ing: The Hidden Assault on our Civil ing the “culture of circuit design” not afford to do without some of Rights talks about the hidden cost of now embodied in our electrical their best talent in the interests of hiding one’s identity, or “covering,” engineering program, including archaic prejudices. Over 50 major for LGBT persons. As we see from a emphasis on hands-on design companies now have policies of Lynn’s story, this “covering” not projects. Lynn’s contribution to nondiscrimination on gender iden- only consumes tremendous time making this happen, it seems, has tity and expression, including tech and energy, but the actual contribu- not been fully appreciated. From giants like Apple, Hewlett-Packard, tions of such persons can also go that first course in the fall of 1978 Cisco, Intel, and Oracle. unrecognized, hidden away in the that Lynn taught at MIT, things had Last but certainly not least, background. already exploded to 113 universi- from my perspective as a gay man, This year would have been the ties worldwide by 1982 (just four Lynn’s story demonstrates the dis- 100th birthday of another com- short years!). Today, virtually every crimination that LGBT people have puter science pioneer, Alan Tur- electrical program in the world has faced (and continue to face) in ing, who committed suicide at a course in modern VLSI design. this society and the negatives this age 41 after being persecuted for his

IEEE SOLID-STATE CIRCUITS MAGAZINE fall 2012 41 homosexuality. Imagine how many diversity discussion, there is still overt discrimination should serve more contributions he would have a long way to go; meanwhile many as an inspiration to all young engi- made to our field had he lived lon- continue to remain in the closet out neers. We are thankful that she has ger. While Corporate America and of intense fear. shared these memorable reminiscences with us.

Lynn’s amazing story of accomplishment About the Author and personal triumph in the face of personal Kenneth L. Shepard received the B.S.E. degree from Princeton Uni- adversity and overt discrimination should serve versity, New Jersey, in 1987 and as an inspiration to all young engineers. the M.S. and Ph.D. degrees in electrical engineering from Stanford University, California, in 1988 and 1992, respectively. From 1992 to most universities have come a long Lynn’s amazing story of accom- 1997, he was a research staff mem- way in recognizing the important plishment and personal triumph in ber and manager with the VLSI role that LGBT people play in the the face of personal adversity and Design Department, IBM T.J. Watson Research Center, Yorktown Heights, New York, where he was responsi- ble for the design methodology for IBM’s G4 S/390 microprocessors. Since 1997, he has been with Colum- bia University, New York, where he is a professor of electrical engineering and biomedical engineering. He also was chief technology officer of CadMOS Design Technology, San Jose, California, until its acquisi- tion by Cadence Design Systems in 2001. His current research interests include carbon electronics, power electronics, and CMOS mixed-signal design for biological applications. He was technical program chair and general chair for the 2002 and 2003 International Conference on Com- puter Design, respectively. He has served on the Program Committees for ISSCC, VLSI Symposium, ICCAD, DAC, ISCAS, ISQED, GLS-VLSI, TAU, and ICCD. He received the Fannie and John Hertz Foundation Doctoral Thesis Prize in 1992, a National Sci- ence Foundation CAREER Award in 1998, and the 1999 Distinguished Faculty Teaching Award from Colum- bia. He has been an associate editor of IEEE Transactions on Very Large- Scale Integration (VLSI) Systems and is currently an associate editor for IEEE Journal of Solid-State Circuits and IEEE Transactions on Biomedical Circuits and Systems. He is a Fellow of the IEEE.

Columbia’s new Northwest Corner Building, location of Prof. Shepard’s research laboratory.

42 fall 2012 IEEE SOLID-STATE CIRCUITS MAGAZINE