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5V/12V Efuse with Over Voltage Protection and Blocking FET Control Check for Samples: TPS2592AA, TPS2592AL, TPS2592BA, TPS2592BL, TPS2592ZA

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5V/12V Efuse with Over Voltage Protection and Blocking FET Control Check for Samples: TPS2592AA, TPS2592AL, TPS2592BA, TPS2592BL, TPS2592ZA TPS2592AA, TPS2592AL TPS2592BA, TPS2592BL TPS2592ZA www.ti.com SLVSC11B –JUNE 2013–REVISED NOVEMBER 2013 5V/12V eFuse with Over Voltage Protection and Blocking FET Control Check for Samples: TPS2592AA, TPS2592AL, TPS2592BA, TPS2592BL, TPS2592ZA 1FEATURES APPLICATIONS 2• 12 V eFuse – TPS2592Ax • HDD and SSD Drives • 5 V eFuse – TPS2592Bx • Set Top Boxes • 4.5 V – 18 V Protection – TPS2592Zx • Servers / AUX Supplies • Integrated 28mΩ Pass MOSFET • Fan Control • Fixed Over-Voltage Clamp (TPS2592Ax/Bx) • PCI/PCIe Cards • Absolute Maximum Voltage of 20V • Switches/Routers • 2 A to 5 A Adjustable I (±15% Accuracy) LIMIT PRODUCT INFORMATION(1) • Reverse Current Blocking Support FAULT PART NO UV OV CLAMP Status • Programmable OUT Slew Rate, UVLO RESPONSE • Built-in Thermal Shutdown TPS2592AA 4.3 V 15 V Auto Retry Active • UL Recognition Pending TPS2592BA 4.3 V 6.1 V Auto Retry Active TPS2592AL 4.3 V 15 V Latched Active • Safe during Single Point Failure Test TPS2592BL 4.3 V 6.1 V Latched Active (UL60950) TPS2592ZA 4.3 V — Auto-retry Active • Small Foot Print – 10L (3mm x 3mm) VSON TPS2592ZL 4.3 V — Latched Preview (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com DESCRIPTION The TPS2592xx family of eFuses is a highly integrated circuit protection and power management solution in a tiny package. The devices use few external components and provide multiple protection modes. They are a robust defense against overloads, shorts circuits, voltage surges, excessive inrush current, and reverse current. Current limit level can be set with a single external resistor and current limit set has a typical accuracy of ±15%. Over voltage events are limited by internal clamping circuits to a safe fixed maximum, with no external components required. TPS2592Ax devices provide over voltage protection (OVP) for 12V systems and TPS2592Bx devices for 5V systems. In cases with particular voltage ramp requirements, a dV/dT pin is provided that can be programmed with a single capacitor to ensure proper output ramp rates. Many systems, such as SSDs, must not allow holdup capacitance energy to dump back through the FET body diode onto a drooping or shorted input bus. The BFET pin is for such systems. An external NFET can be connected “Back to Back (B2B)” with the TPS2592 output and the gate driven by BFET to prevent current flow from load to source (see Figure 51 ). Application Schematic Transient: Output Short Circuit VIN VIN OUT OUT VIN R1 28m: VOUT COUT EN/UVLO BFET C2 C3 R2 dV/dT ILIM RLIM CdVdT I_OUT GND TPS2592xx C1 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 2013, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. TPS2592AA, TPS2592AL TPS2592BA, TPS2592BL TPS2592ZA SLVSC11B –JUNE 2013–REVISED NOVEMBER 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS over operating temperature range (unless otherwise noted) (1) VALUE(2) UNIT MIN MAX VIN –0.3 20 Supply voltage range(1) V VIN (10ms Transient) 22 OUT –0.3 VIN + 0.3 V Output voltage OUT (Transient < 1 µs) -1.2 V ILIM –0.3 7 V Continuos output current 6.25(3) A EN/UVLO –0.3 7 V dV/dT –0.3 7 V BFET –0.3 30 V Human body model (HBM) ±2000 V Electrostatic discharge Charged-device model (CDM) ±500 V Continuous power dissipation See the Thermal Characteristics (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values, except differential voltages, are with respect to network ground terminal. (3) Device supports high peak current during short circuit conditions until current is internally limited. THERMAL CHARACTERISTICS(1) TPS2592xx THERMAL METRIC UNIT DRC (10) PINS θJA Junction-to-ambient thermal resistance 45.9 θJCtop Junction-to-case (top) thermal resistance 53 θJB Junction-to-board thermal resistance 21.2 °C/W ψJT Junction-to-top characterization parameter 1.2 ψJB Junction-to-board characterization parameter 21.4 θJCbot Junction-to-case (bottom) thermal resistance 5.9 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 2 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS2592AA TPS2592AL TPS2592BA TPS2592BL TPS2592ZA TPS2592AA, TPS2592AL TPS2592BA, TPS2592BL TPS2592ZA www.ti.com SLVSC11B –JUNE 2013–REVISED NOVEMBER 2013 RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) MIN TYP MAX UNIT VIN (TPS2592Ax) 4.5 12 13.8 VIN (TPS2592Bx) 4.5 5 5.5 VIN (TPS2592Zx) 4.5 18(1) Input voltage range V BFET 0 VIN+6 dV/dT, EN/UVLO 0 6 ILIM 0 3.3 Continuos output I 0 5 A current OUT Resistance ILIM 40.2 100 162 kΩ OUT 0.1 1 1000 µF External capacitance dV/dT 1 1000 nF Operating junction temperature range, TJ –40 25 125 °C Operating Ambient temperature range, TA –40 25 85 °C (1) Maximum voltage (including input transients) at VIN pin should not exceed absolute maximum rating as specified in ABSOLUTE MAXIMUM RATINGS. ELECTRICAL CHARACTERISTICS –40°C ≤ TJ ≤ 125°C, VIN = 12V for TPS2592Ax/Zx, VIN = 5V for TPS2592Bx, VEN/UVLO = 2V, RILIM = 100kΩ, CdVdT = OPEN. All voltages referenced to GND (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIN (INPUT SUPPLY) VUVR UVLO threshold, rising 4.15 4.3 4.45 V (1) VUVhyst UVLO hysteresis 5.4% Enabled: EN/UVLO = 2V, TPS2592Ax/Zx 0.2 0.42 0.65 mA IQON Supply current Enabled: EN/UVLO = 2V, TPS2592Bx 0.4 0.62 0.80 mA IQOFF EN/UVLO = 0V 0.1 0.25 mA VIN > 16.5V, IOUT = 10mA, TPS2592Ax/Zx 13.8 15 16.5 TPS2592Bx, VIN > 6.75V, I = 10 mA, Over-voltage clamp OUT 5.5 6.1 6.75 V –40℃ ≤ T ≤ 85℃ V OVC (Not applicable for TPS2592Zx) J TPS2592Bx, VIN > 6.75V, I = 10 mA, OUT 5.25 6.1 6.75 –40℃ ≤ TJ ≤ 125℃ EN/UVLO (ENABLE/UVLO INPUT) VENR EN Threshold voltage, rising 1.37 1.4 1.44 V VENF EN Threshold voltage, falling 1.32 1.35 1.39 V IEN EN Input leakage current 0 V ≤ VEN ≤ 5V –100 0 100 nA (1) TOFFdly Turn Off delay EN↓ to BFET↓, CBFET = 0 0.4 µs dV/dT (OUTPUT RAMP CONTROL) TPS2592Ax/Zx, EN/UVLO → H to OUT = 11.7V, CdVdT = 0 0.7 1 1.3 TPS2592Bx, EN/UVLO → H to OUT = 4.9V, CdVdT = 0 0.28 0.4 0.52 T Output ramp time TPS2592Ax/Zx, EN/UVLO → H to OUT = 11.7V, ms dVdT (1) 12 CdVdT = 1 nF TPS2592Bx, EN/UVLO → H to OUT = 4.9V, (1) 5 CdVdT = 1 nF (1) IdVdT dV/dT Charging current VdVdT = 0 V 220 nA RdVdT_disch dV/dT Discharging resistance EN/UVLO = 0 V, IdVdT = 10 mA sinking 50 73 100 Ω (1) VdVdTmax dV/dT Max capacitor voltage 5.5 V (1) GAINdVdT dV/dT to OUT gain ΔVdVdT 4.85 V/V (1) These parameters are provided for reference only and do not constitute part of TI's published device specifications for purposes of TI's product warranty. Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS2592AA TPS2592AL TPS2592BA TPS2592BL TPS2592ZA TPS2592AA, TPS2592AL TPS2592BA, TPS2592BL TPS2592ZA SLVSC11B –JUNE 2013–REVISED NOVEMBER 2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) –40°C ≤ TJ ≤ 125°C, VIN = 12V for TPS2592Ax/Zx, VIN = 5V for TPS2592Bx, VEN/UVLO = 2V, RILIM = 100kΩ, CdVdT = OPEN. All voltages referenced to GND (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ILIM (CURRENT LIMIT PROGRAMMING) (2) IILIM ILIM Bias current 10 µA RILIM = 45.3 kΩ, VVIN-OUT = 1 V 1.79 2.10 2.42 IOL RILIM = 100 kΩ, VVIN-OUT = 1 V 3.46 3.75 4.03 A RILIM = 150 kΩ, VVIN-OUT = 1 V 4.4 5.2 6 Overload current limit(3) R = 0 Ω, Shorted Resistor Current Limit (Single Point I ILIM 0.7 A OL-R-Short Failure Test: UL60950)(2) R = OPEN, Open Resistor Current Limit (Single Point I ILIM 0.55 A OL-R-Open Failure Test: UL60950)(2) RILIM = 45.3 kΩ, VVIN-OUT = 5 V, TPS2592Bx 1.72 2.05 2.38 RILIM = 45.3 kΩ, VVIN-OUT = 12 V, TPS2592Ax/Zx 1.66 1.98 2.29 R = 100 kΩ, V = 5 V, TPS2592Bx 3.14 3.56 3.98 (3) ILIM VIN-OUT ISCL Short-circuit current limit A RILIM = 100 kΩ, VVIN-OUT = 12 V, TPS2592Ax/Zx 2.90 3.32 3.75 RILIM = 150 kΩ, VVIN-OUT = 5 V, TPS2592Bx 4.12 4.86 5.60 RILIM = 150 kΩ, VVIN-OUT = 12 V, TPS2592Ax/Zx 3.75 4.42 5.10 Fast-Trip comparator level w.r.t. RATIO I : I 160% FASTRIP overload current limit(2) FASTRIP OL (2) TFastOffDly Fast-Trip comparator delay IOUT > IFASTRIP to IOUT= 0 (Switch Off) 3 µs ILIM Open resistor detect V V Rising, R = OPEN 3.1 V OpenILIM threshold(2) ILIM ILIM OUT (PASS FET OUTPUT) (2) TON Turn-on delay EN/UVLO → H to IVIN = 100 mA, 1 A resistive load at OUT 220 µs TJ = 25°C 21 28 33 RDS(on) FET ON resistance mΩ TJ = 125°C 39 46 IOUT-OFF-LKG VEN/UVLO = 0 V, VOUT = 0 V (Sourcing) –5 0 1 OUT Bias current in off state µA IOUT-OFF-SINK VEN/UVLO = 0V, VOUT = 300 mV (Sinking) 10
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