Polymorphic Blocks: Unifying High-Level Specification and Low
Session 8A: Designing and Fabricating UIST '20, October 20–23, 2020, Virtual Event, USA Electronics on Surfaces Polymorphic Blocks: Unifying High-level Specifcation and Low-level Control for Circuit Board Design Richard Lin, Rohit Ramesh, Connie Chi, Nikhil Jain, Ryan Nuqui, Prabal Dutta, Bjrn Hartmann University of California, Berkeley {richard.lin, rkr, conniejchi, nikhil.jain, ryannuqui, prabal, bjoern}@berkeley.edu Reference Subcircuit Library User HDL Model Manual Process v=3.3V class MagicMcu: class Blinky: (community supplied) throughout flow Write i=20mA class Led: mcu = Block(MagicMcu) Solve HDL class Resistor: Write led = Block(Led) Export connect(mcu.io0, Automated Process class ChipResistor HDL led.io) extends Resistor: Elaborate connect(mcu.gnd, footprint(res0603) led.gnd) Chip Datasheets ... Resistor Interactive ChipCorp Idea This Work Refinement Magic MCU Mainstream Circuit Design Flow Mainstream Layout Flow System Architecture Schematic Netlist PCB Part Libraries Draw U1 USB Power U1 magicmcu Schematic R1 res0603 MCUsignal LED D1 Draw D1 led0603 R1 D1 Reference Draw R1 1k Export net R1.1, D1.2 Layout MagicMcu U1 throughout flow MagicMcu ... ... ... Draw Subcircuits Figure 1. In the Polymorphic Blocks approach (purple box), circuit designers start by writing their system architecture in a hardware description language (HDL), which is then elaborated into a hierarchy block graph model and expanded using community libraries. That graph is then refned through interactive choices in a GUI and automatically propagated parameters are checked to ensure system correctness. The result can be exported to a netlist fle, which can then be imported into a board design tool for layout. In contrast, mainstream tools (gray box) generally do not support system architecture level design, so such diagrams are often done with pen and paper.
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