PLL with Fault Current Limiter for Fast Protection of Strong Power System 1 2 C

ISSN 2319-8885 Vol.06,Issue.21 June-2017,

Pages: 4008-4012

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PLL with Fault Current Limiter for Fast Protection of Strong Power System 1 2 C. J. BHAVANA , P. KISHORE 1PG Scholar, Dept of EEE, Priyadarshini College of Engineering and Technology, Nellore, Andhra Pradesh, India. 2Assistant Professor, Dept of EEE, Priyadarshini College of Engineering and Technology, Nellore, Andhra Pradesh, India.

Abstract: The power requirement for large industrial sites is increasing. Often there is also a need to reduce the installation volume of electrical especially in off-shore facilities where every square meter is very expensive. One means of reducing the amount of electrical equipment is to use the generation voltage as the distribution voltage of the site. This often however, results in very high values of short circuit current exceeding both the peak rating and breaking capacity of switchgear. In this project a new method is proposed which can be used to discriminate faults from switching transients. The method is primarily intended for use in systems where fast fault detection and fast fault clearing before the first peak of the fault current are required. An industrial system in which short circuit power is required but where short circuit currents, cannot be tolerated is an example of such a system. A phase locked loop is used to perform the discrimination. Computer simulations have been performed and it has been demonstrated that the output of the PLL is completely different for a fault compared to a switching transients. This difference can be used for discrimination between a fault and a switching transient. To discriminate faults from switching transients a new method is proposed in this paper. Before the first peak of the fault current is required, where fast fault detection and fast clearing for and use is desired .Here we are using this method of phase locked loop(PLL) to perform the discrimination of faults.

Keywords: Phase Locked Loop(PLL), Voltage Controlled Oscillator (VCO), FCLs.

I. INTRODUCTION  To respond properly to any fault magnitude and/or phase It is recommended an industrial system; High short circuit combinations. power is desired without causing where disturbances to  To withstand the fault conditions for a sufficient time. sensitive equipment or process. When designing the  To obtain a high temperature rise endurance. switchgear other components of power system there is likely  To obtain a high reliability and long life. chances of developing high fault current. In these cases,  To maintain fully automated operation and fast recovery Fault Current Limiter installation is an alternative to to normal state after fault removal & to maintain a low rebuilding the switchgear. It is demonstrated that pll can be cost and low volume. used for power system protection purposes as an alternative to other methods.

II. FAULT CURRENT LIMITER The main purpose of the installation of FCL into the distribution system is to suppress the fault current. The FCL is a series element which has very small impedance during a normal operation. If the fault occurs the FCL increases its impedance and prevents over current stress resulting in damaging, degradation, mechanical forces and extra heating of electrical equipment. The prime requirements to the FCLs are:  To withstand distribution and transmission voltage and currents.  To obtain low impedance, low voltage drop and low power loss at normal operation.  To obtain large impedance in fault conditions.  To obtain a very short time recovery and to limit the fault current before the first peak.

C. J. BHAVANA, P. KISHORE III. SUPERCONDUCTING FAULT CURRENT LIMITER negligible. If the fault occurs, the magnetic core is taken out Superconducting fault current limiters exploit the extreme of saturation, the coil attain high inductance and limits the and rapid loss of superconductivity (called "quenching) fault current. The designs differ in the core shape, core bias above a critical combination of temperature, current density, arrangement and magnetic design. and magnetic field. In normal operation, current flows through the superconductor without resistance and negligible Phase-locked loop: A phase-locked loop (PLL) is an impedance. electronic circuit with a voltage or voltage-driven oscillator that constantly adjusts to match the frequency of an input signal. PLLs are used to generate, stabilize, modulate, demodulate, filter or recover a signal from a "noisy" communications channel where data has been interrupted.

If a fault develops, the superconductor quenches, its D. Fundamental Phase Locked Loop Architecture resistance rises sharply, and current is diverted to a parallel A phase-locked loop is a feedback system combining a circuit with the desired higher impedance. Superconducting voltage controlled oscillator (VCO) and a phase comparator fault current limiters are described as being in one of the two so connected that the oscillator maintains a constant phase major categories: resistive or inductive. angle relative to a reference signal. Phase-locked loops can be used, for example, to generate stable output high A. Resistive frequency signals from a fixed low-frequency signal. Figure In a resistive FCL, the current passes directly through the shows the basic model for a PLL. The PLL can be analyzed superconductor. When it quenches, the sharp rise in as a negative feedback system using Laplace Transform resistance reduces the fault current from what it would theory with a forward gain term, G(s), and a feedback term, otherwise it would be (the prospective fault current). A H(s), as shown in Figure. The usual equations for a negative resistive FCL can be either DC or AC. If it is AC, then there feedback system apply. The basic blocks of the PLL are the will be steady power dissipation from AC losses (super- Error Detector (composed of a phase frequency detector and conducting hysteresis losses) which must be removed by a charge pump), Loop Filter, VCO, and a Feedback Divider. the cryogenic system. An AC FCL is usually made from wire Negative feedback forces the error signal, e(s), to approach wound non-inductively; otherwise the inductance of the zero at which point the feedback divider output and the device would create an extra constant power loss on the reference frequency are in phase and frequency lock, and system. FO= NFREF.

B. Inductive Inductive FCLs come in many variants, but the basic concept is a transformer with a resistive FCL as the secondary. In un-faulted operation, there is no resistance in the secondary and hence the inductance of the device is low. A fault current quenches the superconductor, the secondary becomes resistive and the inductance of the whole device E. Basic model of PLL rises. The advantage of this design is that there is no heat Discrimination of pll which is suitable for the ingress through current leads into the superconductor, and so Discrimination Between fault and switching transients. the cryogenic power load may be lower. However, the large amount of iron required signifies that inductive FCLs are much bigger and heavier than resistive FCLs.

C. Non-superconducting FCL The different types FCLs have been designed: Saturable core FCLs –The non-lineal characteristics of ferromagnetic materials to realize a high inductance. In normal case, the core is saturated by a bias current; the coil inductance is

International Journal of Scientific Engineering and Technology Research Volume.06, IssueNo.21, June-2017, Pages: 4008-4012 PLL with Fault Current Limiter for Fast Protection of Strong Power System F. Usage of PLL can be seen as follows PLLs are used in telecommunications, computers, radio and other electronic applications. They are frequently used in wireless communication, primarily on frequency modulation (FM) or phase modulation (PM) transmissions. Phase-locked loops are more commonly used for digital data transmission than for analog transmission and are more commonly manufactured as integrated circuits, although discrete circuits are used for microwave signal processing.

G. Applications for PLLs PLL circuits can be set up as frequency multipliers or dividers, tracking generators, clock recovery circuits or Fig2b. Three phase current Iabc. demodulators. Phase locked loops can be found in computers, radio, telecommunications and other electronic applications. PLLs can be used in order to recover a signal from a noisy communication channel, for frequency synthesis or to distribute clock timing pulses in digital logic designs. PLLs are also used for synchronization: in space communications for demodulation, bit synchronization and symbol synchronization. Other applications include demodulation of AM and FM signals, DTMF decoders, modems, remote controls and telecommunications.

IV. SIMULATION AND RESULTS Case 1: Three phase fault Fig2c. Error signal due to three phase fault.

Case 2: double phase fault

Fig1. Simulink Model. Fig3. Simulink Model.

Fig2a. Three phase voltage vabc Fig4a. Phase voltages due to phase to phase fault. International Journal of Scientific Engineering and Technology Research Volume.06, IssueNo.21, June-2017, Pages: 4008-4012

C. J. BHAVANA, P. KISHORE

Fig4b. Phase currents due to phase to phase faults. Fig6b. Phase current due to transformer energization.

Fig6c. Error signal due to transformer energization. Fig4c. Error signal due to phase to phase fault.

Case 4: Capacitor energization Case3: Transformer energization

Fig5. Simulink Model. Fig7. Simulink Model.

Fig6a. Phase voltages due to transformer energization. Fig8a. phase voltage due to capacitor energization. International Journal of Scientific Engineering and Technology Research Volume.06, IssueNo.21, June-2017, Pages: 4008-4012 PLL with Fault Current Limiter for Fast Protection of Strong Power System [5] Magnus Ohrstrom and Lennart Soder, Member, IEEE, “ Fast Protection of Strong Power Systems With Fault Current Limiters and PLLAided Fault Detection”,IEEE Transaction on Power Delivery Volume.26,NO.3,July 2011. [6] M.Stemmle, C.Neumann, F. Merschel, U. Schwing, K-H. Weck,M.Noe, F.Breuer, and S.Elscher, "Analysis of unsymmetrical faults in high voltage power systems with superconducting fault current limiters, " IEEE Trans. Appl. Superconduct. Vol. 17, no. 2, pp. 2347-2350, jun.2007. [7] K. Yasuda, A. Ichinose, A. Kimura, K. Inoue, H. Moire, Fig8b. Phase current due to capacitor energization. Y. tikunag, S. Torii, T. Yazawa, S. Hahakura, K. Shimohata and H. Kubota, "Research and development of superconducting fault current limiter in Japan," IEEE Trans. Appl. Super conduct,vol.15, no.2, pp. 1978-1981, jun.2005. [8] H-S. Choice, S-H. Lim and D-C. Chung, " Discharge and current limiting characteristic of a superconducting fuse, " IEEE Trans. Appl. Super conducts. Vol. 15, no.2, pp. 2360- 2363,jun.2005.

Fig8c. Error signal.

V. CONCLUSION AND FUTURE SCOPE It has been demonstrated that a PLL can be used to determine whether a current transient is due to fault in the system or due to a switching transient. Transformer and capacitor switching have been specifically studied due to large occurrence of these switching transients in the power system. The focus has been on discrimination between switching transients and low impedance faults. Simulation have been performed using a test system where faults and switching transients is have been simulated. For all these events, a large is difference is observed in the error signal of the PLL when a fault or a switching transient is applied. This difference can be used to discriminate faults from switching transients.

The work presented in this paper is based on simulations and theoretical investigations. The focus has been on discrimination between switching transients and low impedence faults. For future work, high impendence faults must also be considered. Futhermore, the method could be tested in a real-time digital simulator with actual recording of faults and switching transients and eventually implemented in a real protection system.

VI. REFERENCES [1]Roland E.Best, Phase Locked Loops, 5th Edition, McGraw-Hill, 2003, ISBN0071412018. [2] Floyd M. Gardner, Phaselock Techniques, 2nd Edition, John Wiley, 1979, ISBN: 0471042943. [3]Dean Banerjee,PLL Performance, Simulation and Design, 3rdEdition,DeanBanerjeePublications,2003,ISBN:09708207 12. [4] Adrian Fox, "Ask The Applications Engineer-30 (Discussion of PLLs)," Analog Dialogue, 36-3, 2002.

International Journal of Scientific Engineering and Technology Research Volume.06, IssueNo.21, June-2017, Pages: 4008-4012