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Fundamentals of Microelectronics
CH1 Why Microelectronics? CH2 Basic Physics of Semiconductors CH3 Diode Circuits CH4 Physics of Bipolar Transistors CH5 Bipolar Amplifiers CH6 Physics of MOS Transistors CH7 CMOS Amplifiers CH8 Operational Amplifier As A Black Box
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Chapter 5 Bipolar Amplifiers
5.1 General Considerations
5.2 Operating Point Analysis and Design
5.3 Bipolar Amplifier Topologies
5.4 Summary and Additional Examples
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Bipolar Amplifiers
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Voltage Amplifier
In an ideal voltage amplifier, the input impedance is infinite and the output impedance zero. But in reality, input or output impedances depart from their ideal values. CH5 Bipolar Amplifiers 4
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Input/Output Impedances
Vx Rx = ix
The figure above shows the techniques of measuring input and output impedances.
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Input Impedance Example I
v x = rπ i x
When calculating input/output impedance, small-signal analysis is assumed.
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Impedance at a Node
When calculating I/O impedances at a port, we usually ground one terminal while applying the test source to the other terminal of interest.
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Impedance at Collector
Rout =ro
With Early effect, the impedance seen at the collector is equal to the intrinsic output impedance of the transistor (if emitter is grounded).
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Impedance at Emitter
v 1 x = 1 ix gm + rπ 1 Rout ≈ gm
(VA =∞)
The impedance seen at the emitter of a transistor is approximately equal to one over its transconductance (if the base is grounded).
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Three Master Rules of Transistor Impedances
Rule # 1: looking into the base, the impedance is r πππ if emitter is (ac) grounded. Rule # 2: looking into the collector, the impedance is ro if emitter is (ac) grounded. Rule # 3: looking into the emitter, the impedance is 1/gm if base is (ac) grounded and Early effect is neglected. CH5 Bipolar Amplifiers 10
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Biasing of BJT
Transistors and circuits must be biased because (1) transistors must operate in the active region, (2) their small- signal parameters depend on the bias conditions.
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DC Analysis vs. Small-Signal Analysis
First, DC analysis is performed to determine operating point and obtain small-signal parameters. Second, sources are set to zero and small-signal model is used.
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Notation Simplification
Hereafter, the battery that supplies power to the circuit is replaced by a horizontal bar labeled Vcc, and input signal is simplified as one node called Vin.
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Example of Bad Biasing
The microphone is connected to the amplifier in an attempt to amplify the small output signal of the microphone. Unfortunately, there’s no DC bias current running thru the transistor to set the transconductance.
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Another Example of Bad Biasing
The base of the amplifier is connected to Vcc, trying to establish a DC bias. Unfortunately, the output signal produced by the microphone is shorted to the power supply.
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Biasing with Base Resistor
VCC −VBE VCC −VBE IB = ,IC =β RB RB
Assuming a constant value for VBE, one can solve for both IB and IC and determine the terminal voltages of the transistor. However, bias point is sensitive to βββ variations.
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Improved Biasing: Resistive Divider
R 2 V X = VCC R1 + R 2
R 2 VCC I C = I S exp( ) R1 + R 2 VT
Using resistor divider to set VBE, it is possible to produce an IC that is relatively independent of βββ if base current is small.
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Accounting for Base Current
V − I R Thev B Thev I C = I S exp VT
With proper ratio of R 1 and R 2, I C can be insensitive to βββ; however, its exponential dependence on resistor deviations makes it less useful.
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Emitter Degeneration Biasing
The presence of R E helps to absorb the error in V X so V BE stays relatively constant.
This bias technique is less sensitive to βββ (I 1 >> I B) and VBE variations.
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Design Procedure
Choose an I C to provide the necessary small signal parameters, g m, r πππ, etc.
Considering the variations of R 1, R 2, and V BE , choose a value for V RE.
With V RE chosen, and V BE calculated, V x can be determined.
Select R 1 and R 2 to provide V x.
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Self-Biasing Technique
This bias technique utilizes the collector voltage to provide the necessary V x and I B. One important characteristic of this technique is that collector has a higher potential than the base, thus guaranteeing active operation of the transistor. CH5 Bipolar Amplifiers 21
Self-Biasing Design Guidelines
R R >> B (1) C β
2( ) ∆VBE << VCC −VBE
(1) provides insensitivity to βββ .
(2) provides insensitivity to variation in V BE .
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Summary of Biasing Techniques
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PNP Biasing Techniques
Same principles that apply to NPN biasing also apply to PNP biasing with only polarity modifications.
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Possible Bipolar Amplifier Topologies
Three possible ways to apply an input to an amplifier and three possible ways to sense its output. However, in reality only three of six input/output combinations are useful. CH5 Bipolar Amplifiers 25
Study of Common-Emitter Topology
Analysis of CE Core Inclusion of Early Effect Emitter Degeneration Inclusion of Early Effect CE Stage with Biasing
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Common-Emitter Topology
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Small Signal of CE Amplifier
vout Av = vin Current vout − = gmvπ = gmvin RC
Av = −gm RC CH5 Bipolar Amplifiers 28
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Limitation on CE Voltage Gain
ICRC VRC VCC −VBE Av = Av = Av < VT VT VT
Since g m can be written as I C/V T, the CE voltage gain can be written as the ratio of V RC and V T. VRC is the potential difference between V CC and V CE , and VCE cannot go below V BE in order for the transistor to be in active region.
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Tradeoff between Voltage Gain and Headroom
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I/O Impedances of CE Stage
v v X X Rout = = RC Rin = = rπ iX iX
When measuring output impedance, the input port has to be grounded so that V in = 0.
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CE Stage Trade-offs
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Inclusion of Early Effect
Av =−gm(RC || rO)
Rout =RC || rO
Early effect will lower the gain of the CE amplifier, as it appears in parallel with R C.
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Intrinsic Gain
Av = − g m rO
V A Av = VT
As R C goes to infinity, the voltage gain reaches the product of g m and r O, which represents the maximum voltage gain the amplifier can have. The intrinsic gain is independent of the bias current.
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Current Gain
iout AI = iin
AI CE = β
Another parameter of the amplifier is the current gain, which is defined as the ratio of current delivered to the load to the current flowing into the input. For a CE stage, it is equal to βββ.
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Emitter Degeneration
By inserting a resistor in series with the emitter, we “degenerate” the CE stage. This topology will decrease the gain of the amplifier but improve other aspects, such as linearity, and input impedance.
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Small-Signal Model
g m RC Av = − 1+ g m RE R A = − C v 1 + RE g m
Interestingly, this gain is equal to the total load resistance to ground divided by 1/g m plus the total resistance placed in series with the emitter.
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Emitter Degeneration Example I
R A =− C v 1 +RE || rπ2 gm1
The input impedance of Q 2 can be combined in parallel with RE to yield an equivalent impedance that degenerates Q1.
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Emitter Degeneration Example II
R || r A = − C π 2 v 1 + RE g m1
In this example, the input impedance of Q 2 can be combined in parallel with R C to yield an equivalent collector impedance to ground.
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Input Impedance of Degenerated CE Stage
VA = ∞
vX = π ir X + RE 1( +β)iX
vX Rin = = rπ +(β + )1 RE iX
With emitter degeneration, the input impedance is
increased from r πππ to rπππ + ( βββ+1)R E; a desirable effect.
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Output Impedance of Degenerated CE Stage
VA = ∞ v π ⇒ vin = 0 = vπ + + gmvπ RE vπ = 0 rπ
vX Rout = = RC iX
Emitter degeneration does not alter the output impedance in this case. (More on this later.)
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Capacitor at Emitter
At DC the capacitor is open and the current source biases the amplifier. For ac signals, the capacitor is short and the amplifier is degenerated by R E.
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Example: Design CE Stage with Degeneration as a Black Box
VA = ∞
vin iout = g m −1 1+ (rπ + g m )RE
iout g m Gm = ≈ vin 1+ g m RE
If g mRE is much greater than unity, G m is more linear.
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Degenerated CE Stage with Base Resistance
V A = ∞ v v v out = A . out vin vin v A v − βR out = C vin rπ + (β + )1 RE + RB
− RC Av ≈ 1 RB + RE + CH5 Bipolar Amplifiers g m β +1 44
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Input/Output Impedances
VA = ∞
Rin 1 = rπ + (β + )1 RE
Rin 2 = RB + rπ 2 + (β + )1 RE
Rout = RC
Rin1 is more important in practice as R B is often the output impedance of the previous stage.
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Emitter Degeneration Example III
−(RC || R1) Av = 1 RB + R2 + gm β +1
Rin =rπ +(β + )1 R2
Rout = RC || R1
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Output Impedance of Degenerated Stage with V A< ∞
Rout = [1+ g m (RE || rπ )]rO + RE || rπ
Rout = rO + (gm rO + )(1 RE || rπ )
Rout ≈ rO []1+ gm (RE || rπ ) Emitter degeneration boosts the output impedance by a factor of 1+g m(R E||r πππ). This improves the gain of the amplifier and makes the circuit a better current source.
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Two Special Cases
1) RE >> rπ
Rout ≈ rO 1( + g m rπ ) ≈ βrO
)2 RE << rπ
Rout ≈ 1( + gm RE )rO
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Analysis by Inspection
Rout = R1 || Rout 1 Rout 1 = [1+ g m (R2 || rπ )]rO Rout = [1+ g m (R2 || rπ )]rO || R1
This seemingly complicated circuit can be greatly simplified by first recognizing that the capacitor creates an AC short to ground, and gradually transforming the circuit to a known topology.
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Example: Degeneration by Another Transistor
Rout =[1+ gm1(rO2 || rπ1)]rO1
Called a “cascode”, the circuit offers many advantages that are described later in the book.
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Study of Common-Emitter Topology
Analysis of CE Core Inclusion of Early Effect Emitter Degeneration Inclusion of Early Effect CE Stage with Biasing
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Bad Input Connection
Since the microphone has a very low resistance that connects from the base of Q 1 to ground, it attenuates the base voltage and renders Q 1 without a bias current.
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Use of Coupling Capacitor
Capacitor isolates the bias network from the microphone at DC but shorts the microphone to the amplifier at higher frequencies.
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DC and AC Analysis
Av = −gm (RC || rO )
Rin = rπ || RB
Rout = RC || rO
Coupling capacitor is open for DC calculations and shorted for AC calculations.
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Bad Output Connection
Since the speaker has an inductor, connecting it directly to the amplifier would short the collector at DC and therefore push the transistor into deep saturation.
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Still No Gain!!!
In this example, the AC coupling indeed allows correct biasing. However, due to the speaker’s small input impedance, the overall gain drops considerably.
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CE Stage with Biasing
Av = −gm (RC || rO )
Rin = rπ || R1 || R2
Rout = RC || rO
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CE Stage with Robust Biasing
VA = ∞
−R A = C v 1 +RE gm
Rin =[]rπ +(β + )1 RE || R1 || R2
Rout = RC CH5 Bipolar Amplifiers 58
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Removal of Degeneration for Signals at AC
Av = − g m R C
R in = rπ || R1 || R 2
R out = R C
Capacitor shorts out R E at higher frequencies and removes degeneration.
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Complete CE Stage
Thevenin model of the input
RThev = Rs || R1 || R2
vThev
− R || R R || R A = C L 1 2 v 1 R || R || R s 1 2 R1 || R2 + Rs + RE + 14243 g β +1 v / v 1m4444 24444 3 Thev in vout /vThev CH5 Bipolar Amplifiers 60
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Summary of CE Concepts
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Common Base (CB) Amplifier
In common base topology, where the base terminal is biased with a fixed voltage, emitter is fed with a signal, and collector is the output.
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CB Core
Av = g m R C
The voltage gain of CB stage is g mRC, which is identical to that of CE stage in magnitude and opposite in phase.
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Tradeoff between Gain and Headroom
I C Av = .RC VT V −V = CC BE VT
To maintain the transistor out of saturation, the maximum voltage drop across R C cannot exceed V CC -VBE.
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Simple CB Example
Av = gm RC =17 .2
R1 = 22 3. KΩ
R2 = 67 7. KΩ
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Input Impedance of CB
1 Rin = gm
The input impedance of CB stage is much smaller than that of the CE stage.
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Practical Application of CB Stage
To avoid “reflections”, need impedance matching. CB stage’s low input impedance can be used to create a match with 50 ΩΩΩ. CH5 Bipolar Amplifiers 67
Output Impedance of CB Stage
Rout = rO || RC
The output impedance of CB stage is similar to that of CE stage.
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CB Stage with Source Resistance
R A = C v 1 +RS gm
With an inclusion of a source resistor, the input signal is attenuated before it reaches the emitter of the amplifier; therefore, we see a lower voltage gain. This is similar to CE stage emitter degeneration; only the phase is reversed.
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Practical Example of CB Stage
An antenna usually has low output impedance; therefore, a correspondingly low input impedance is required for the following stage. CH5 Bipolar Amplifiers 70
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