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On Scheduling Input Queued Cell Switches New Jersey Institute of Technology Digital Commons @ NJIT Dissertations Electronic Theses and Dissertations Spring 5-31-1999 On scheduling input queued cell switches Shizhao Li New Jersey Institute of Technology Follow this and additional works at: https://digitalcommons.njit.edu/dissertations Part of the Electrical and Electronics Commons Recommended Citation Li, Shizhao, "On scheduling input queued cell switches" (1999). Dissertations. 986. https://digitalcommons.njit.edu/dissertations/986 This Dissertation is brought to you for free and open access by the Electronic Theses and Dissertations at Digital Commons @ NJIT. It has been accepted for inclusion in Dissertations by an authorized administrator of Digital Commons @ NJIT. For more information, please contact [email protected]. Copyright Warning & Restrictions The copyright law of the United States (Title 17, United States Code) governs the making of photocopies or other reproductions of copyrighted material. Under certain conditions specified in the law, libraries and archives are authorized to furnish a photocopy or other reproduction. One of these specified conditions is that the photocopy or reproduction is not to be “used for any purpose other than private study, scholarship, or research.” If a, user makes a request for, or later uses, a photocopy or reproduction for purposes in excess of “fair use” that user may be liable for copyright infringement, This institution reserves the right to refuse to accept a copying order if, in its judgment, fulfillment of the order would involve violation of copyright law. Please Note: The author retains the copyright while the New Jersey Institute of Technology reserves the right to distribute this thesis or dissertation Printing note: If you do not wish to print this page, then select “Pages from: first page # to: last page #” on the print dialog screen The Van Houten library has removed some of the personal information and all signatures from the approval page and biographical sketches of theses and dissertations in order to protect the identity of NJIT graduates and faculty. ABSTRACT ON SCHEDULING INPUT QUEUED CELL SWITCHES by Shizhao Li Output-queued switching, though is able to offer high throughput, guaranteed delay and fairness, lacks scalability owing to the speed up problem. Input-queued switching, on the other hand, is scalable, and is thus becoming an attractive alter- native. This dissertation presents three approaches toward resolving the major problem encountered in input-queued switching that has prohibited the provision of quality of service guarantees. First, we proposed a maximum size matching based algorithm, referred to as min-max fair input queueing (MFIQ), which minimizes the additional delay caused by back pressure, and at the same time provides fair service among competing sessions. Like any maximum size matching algorithm, MFIQ performs well for uniform traffic, in which the destinations of the incoming cells are uniformly distributed over all the outputs, but is not stable for non-uniform traffic. Subse- quently, we proposed two maximum weight matching based algorithms, longest normalized queue first (LNQF) and earliest due date first matching (EDDFM), which are stable for both uniform and non-uniform traffic. LNQF provides fairer service than longest queue first (LQF) and better traffic shaping than oldest cell first (OCF), and EDDFM has lower probability of delay overdue than LQF, LNQF, and OCF. Our third approach, referred to as store-sort-and-forward (SSF), is a frame based scheduling algorithm. SSF is proved to be able to achieve strict sense 100% throughput, and provide bounded delay and delay jitter for input-queued switches if the traffic conforms to the (r, model. O SCEUIG IU QUEUE CE SWICES b Shzh A rttn Sbttd t th lt f r Inttt f hnl n rtl lfllnt f th rnt fr th r f tr f hlph prtnt f Eltrl nd Cptr Ennrn M 1999 Cprht © 1999 b Shzh A IGS ESEE AOA AGE O SCEUIG IU QUEUE CE SWICES Shzh Dr. Nirwan Ansari, Dissertation Advisor Date Professor of Electrical and Computer Engineering, NJIT Dr. John Carpinelli, Committee Member Date Associate Professor of Electrical and Computer Engineering, NJIT Dr. Xiaoqiang Chen, Committee Member Date Member of Technical Staff, Bell Labs, Lucent Technologies, Holmdel, NJ Dr. Shin Tekinay, Committee Member Date Assistant Professor of Electrical and Computer Engineering, NJIT Dr. Bulent Yener, Committee Member Date Assistant Professor of Computer and Information Science, NJIT IOGAICA SKEC Athr Shzh r tr f hlph t M 1999 Undrrdt nd Grdt Edtn • tr f hlph n Eltrl Ennrn r Inttt f hnl r 1999 • Mtr f Sn n Eltrl Ennrn jn Unvrt f t nd lntn jn Chn 199 • hlr f Sn n Eltrl Ennrn Shndn Unvrt nn Shndn Chn 1991 Mjr Eltrl Ennrn rnttn nd bltn • S G Chn nd Anr "r n fr npt-bffrd AM th" ICAM9 rn pp 5-59 n 199 • ntrn S Chn CS hvndr nd Anr "Enhnd C rn hn fr ltpnt t ltpnt - ntn" ICCC9 ftt n pp -11 Ot 199 • S nd Anr "Shdln npt-d th th QS ftr" ICCC9 ftt n pp 17-11 Ot 199 • S nd Anr "rvnn QS ftr fr npt-d th" EE Eltrn ttr vl 3 n 19 pp 1-17 Spt 17 • S nd Anr "Inpt d thn th QS rnt" IOCOM99 Yr Yr pp 115-1159 Mr 1999 • S nd Anr "Erlt t rt Mthn fr Inpt-Qrd Cll Sth" CISS99 ltr M Mr 1999 v h r ddtd t fl ACKNOWLEDGMENT I would like to thank my advisor Dr. Nirwan Ansari for his continuous guidance, support and encouragement throughout my graduate study at NJIT. I greatly appreciate the knowledge and insightful comments he has been providing to me. I feel fortunate that I had a chance to conduct research under such an excellent advisor. Dr. Xiaoqiang Chen gave me so much help when I worked at Lucent Technologies as a summer intern, and he continues to give me advice. I am honored to express my gratitude to him. I would also like to thank Dr. John Carpinelli, Dr. Sirin Tekinay, and Dr. Bulent Yener for serving on my dissertation committee. I would also like to thank Dr. Jianguo Chen for all the helpful discussions. Dr. R. Venkateswaran helped me understand many problems when I worked with him at Lucent Technologies. I thank Dr. Xueming Lin and Dr. Huaping Liu for helping me familiarize with the working environment when I first came to the Center for Communications and Signal Processing. vi AE O COES Chptr Page 1 IOUCIO 1 11 ffrn Sh nd t Efft n th n f rff Shdln 1 1 n Crtr fr rff Shdlr 4 13 rff Shdln n Inpt-Qd Sth 5 131 Mx Sz Mthn d Alrth 6 13 Mx Wht Mthn d Alrth 9 1 rff Shdln n Otpt-Qd Sth 11 11 prnttv Wr-nrvn Shdlr 11 1 prnttv n-r-nrvn Shdlr 1 15 rff Shdln n Cbnd Inpt Otpt Qd Sth 17 151 Alrth rptn 1 1 Cntrbtn f th rttn 20 2 MI-MA AI IU QUEUEIG (MIQ 3 1 Qn Anl 24 2.2 Mn-x r Inpt Qn Alrth 28 3 Sltn lt nd rfrn Cprn 31 3 MAIMUM WEIG MACIG 35 31 Sth nd rff Mdl 3 3 nt rlzd Q rt (Q Alrth 3 31 Alrth rptn 3 3 Anl f Stblt 40 33 Erlt t rt Mthn (EM Alrth 46 3 rfrn Cprn f rpd Alrth 7 4 SOE-SO-A-OWA (SS 5 v Chptr Page 4.1 h Str-Srt-nd-rrd Alrth 5 11 rn Strt nd Cll Adn l 5 1 h Srtn Alrth 5 4.2 Alrth Anl 59 1 Grntd QS 59 4.2.2 Cplxt I 3 5 COIUIOS O AM MUICASIG 7 51 Sltn t th Sndr Idntftn rbl 7 511 Mhn tht rvnt Cll Intrlvn 73 51 Mhn tht Spprt AM Cll Intrlvn 7 5 Cprn btn C-Mr nd -Mr 7 51 Sltn Std 77 5 Sr f th lt 80 53 Iprvd C-Mr Mhn 80 531 Mltpl C-r Mhn 1 53 Sltn lt 5 5 Cnln 88 6 SUMMAY A UUE ESEAC 9 v IS O AES bl Page 11 Cprn f rprnttv r-nrvn hdlr fr tpt- d th i th x pt z f n i Lx th x pt z n ll th n R th trnn rt f th th nd σ i th bt dpth f n 15 1 rfrn f rprnttv nn-r-nrvn hdlr fr tpt- d th T th fr z nd 0 th ntnt dl btn n rrvn fr nd t rrpndn dprtn fr 1 1 Sttt f th ltn rlt d i th dl f n nd ri th rt f n Fs th ntntn frn f th lrth Dx th x ddtnl dl d b ntntn hl Lagx th x nrlzd rv l f th lrth 33 31 Sttt f th ltn rlt d j th vr dl f th jth n n OQ (1 48 x LIST OF FIGURES Figure Page 1.1 Output buffering architecture 2 1.2 Input buffering architecture 3 1.3 Virtual output queueing and input/output contentions 6 1.4 An example of a bipartite graph 7 1.5 Two possible matches of a bipartite graph 8 1.6 One iteration of the Iterative Round Robin Scheduling algorithm . 9 1.7 A bipartite graph matching example:(a) the request graph, (b) a maximum weight match, and (c) a maximum size match. 10 2.1 Virtual output queueing 25 2.2 The discrete time Markov chain for the total queue length of one queue group 26 2.3 Mean queue length of a queue group with ideal throughput 27 2.4 Mean queue length of a queue group simulation results 28 2.5 The pseudo-code of the min-max fair input queueing algorithm 30 2.6 Comparison of normalized service time received by the three sessions: (a) MFIQ, and (b) reference scheduler 31 2.7 Instantaneous fairness: MFIQ versus reference scheduler 32 2.8 Maximum normalized service lag: MFIQ versus reference scheduler .
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