Explicit Network Scheduling

Explicit Network Scheduling Richard John Black Churchill College University of Cambridge A dissertation submitted for the degree of Do ctor of Philosophy December Abstract This dissertation considers various problems asso ciated with the scheduling and network IO organisation found in conventional op erating systems for eective supp ort for multimedia applications which require Quality of Service A solution for these problems is prop osed in a microkernel structure The pivotal features of the prop osed design are that the pro cessing of device interrupts is p erformed by userspace pro cesses which are scheduled by the system like any other that events are used for b oth inter and intra pro cess synchronisation and the use of a sp ecially develop ed high p erformance IO buer management system An evaluation of an exp erimental implementation is included In addition to solv ing the scheduling and networking problems addressed the prototyp e is shown to outp erform the Wanda system a lo cally develop ed microkernel on the same platform This dissertation concludes that it is p ossible to construct an op erating system where the kernel provides only the fundamental job of ne grain sharing of the CPU b etween pro cesses and hence synchronisation b etween those pro cesses This enables pro cesses to p erform task sp ecic optimisations as a result system per formance is enhanced b oth with resp ect to throughput and the meeting of soft realtime guarantees To my parents John and Marcella Preface Except where otherwise stated in the text this dissertation is the result of my own work and is not the outcome of work done in collab oration This dissertation is not substantially the same as any I have submitted for a degree or diploma or any other qualication at any other university No part of this dissertation has already b een or is b eing currently submitted for any such degree diploma or other qualication This dissertation do es not exceed sixty thousand words including tables fo ot notes and bibliography c Copyright Richard Black All rights reserved Trademarks Alpha AXP DECstation TURBOchannel Ultrix and VAX are trademarks of Digital Equipment Corp oration Archimedes is a trademark of Acorn Computers Ltd ARM is a trademark of Advanced RISC Machines Ethernet is a trademark of the Xerox Corp oration MIPS is a trademark of MIPS Technologies Inc TAXI is a trademark of Advanced Micro Devices Inc unix is a trademark of ATT Windows NT is a trademark of Microsoft Corp oration Xilinx is a trademark of Xilinx Inc Other trademarks whichmay b e used are also acknowledged i Acknowledgements Iwould like to thank my sup ervisor Derek McAuley for his encouragement and advice during my time at the Computer Lab oratory I would also like to thank Roger Needham Head of the Lab oratory for his supp ort and for encouraging me to sp end one summer getting a new p ersp ective on research by working as an intern at DEC Systems Research Center in Palo Alto I am grateful for the help and friendship of the memb ers of the Systems Research Group who havealways proved ready to engage in useful discussions Jo e Dixon Mark Hayter Ian Leslie and Eoin Hyden deserve a sp ecial mention I am indebted to Paul Barham Mark Hayter Eoin Hyden Ian Leslie Derek McAuley and Cosmos Nicolaou who read and commented on various drafts of this dissertation Iwould also liketothankPaul Barham for artistic advice and Robin Fairbairns for typ ographical guidance The world famous Tro jan Ro om coee machine deserves a mention to o for its stimulating input over the years Iwould liketotake this opp ortunity to congratulate Martyn Johnson and his sta on the exceptionally high quality of the systems administration at the Computer Lab and in particular to thank him for the cheerful and indeed encouraging way he has reacted to my allto ofrequent requests to do p eculiar things to his system This work was supp orted by an XNI studentship from the Department of Edu cation for Northern Ireland ii Contents List of Figures vii List of Tables viii Glossary of Terms ix Intro duction Context Outline Background Networking Technology Asynchronous Transfer Mo de Fairisle Op erating System Research Wanda The xkernel Pegasus Nemo Related Scheduling Work Sumo MetaLevel Scheduler Summary Pro cess Scheduling Priority Priority in the Internet PriorityinWanda Prioritybetween Applications Priority within Applications Priority in Devices iii Perio dicity Earliest Deadline First Summary Sharing the CPU Interpro cess scheduling in Nemo Interpro cess scheduling in Nemesis Interpro cess scheduling in Fawn Inter Pro cess Communication Virtual Pro cessor Interface Activations Events Time Interrupts IntraPro cess Scheduling Event counts and sequencers Concurrency primitives using events SRC threads Posix threads Wanda threads Priority Summary InterPro cess Communication Language Shared Libraries IPC Mo del Trust Migrating mo del Switching mo del IPC Op eration Architecture Calling conventions IPC Low Level IPC Stubs Binding Service Management Trading Name Spaces Restriction of Name Space iv Bo otstrapping Binder Trading Other communication Summary Input Output Previous Schemes Unix Wanda Fbufs Application Data Unit Supp ort Requirements Considering Device Hardware Proto col Software Application Software Scheduling Streaming Memory The Adopted Solution Op eration Usage Longer channels Complex channels Out of band control Summary Exp erimental Work Exp erimental Platform System Conguration Measurement Details Interpro cess scheduling Interrupt Latency Jubilee Startup Costs Same machine RPC Intrapro cess scheduling Comparative p erformance Eects of Sharing Fairisle Throughput Fairisle Host Interface Performance v Transmit Receive Summary Further Work Op erating System Development Event value overow Virtual Address System Resource Recovery and Higher Level Issues Heuristic Event Hints Proto col Supp ort .

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