North American Company Profiles 8X8
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When Is a Microprocessor Not a Microprocessor? the Industrial Construction of Semiconductor Innovation I
Ross Bassett When is a Microprocessor not a Microprocessor? The Industrial Construction of Semiconductor Innovation I In the early 1990s an integrated circuit first made in 1969 and thus ante dating by two years the chip typically seen as the first microprocessor (Intel's 4004), became a microprocessor for the first time. The stimulus for this piece ofindustrial alchemy was a patent fight. A microprocessor patent had been issued to Texas Instruments, and companies faced with patent infringement lawsuits were looking for prior art with which to challenge it. 2 This old integrated circuit, but new microprocessor, was the ALl, designed by Lee Boysel and used in computers built by his start-up, Four-Phase Systems, established in 1968. In its 1990s reincarnation a demonstration system was built showing that the ALI could have oper ated according to the classic microprocessor model, with ROM (Read Only Memory), RAM (Random Access Memory), and I/O (Input/ Output) forming a basic computer. The operative words here are could have, for it was never used in that configuration during its normal life time. Instead it was used as one-third of a 24-bit CPU (Central Processing Unit) for a series ofcomputers built by Four-Phase.3 Examining the ALl through the lenses of the history of technology and business history puts Intel's microprocessor work into a different per spective. The differences between Four-Phase's and Intel's work were industrially constructed; they owed much to the different industries each saw itselfin.4 While putting a substantial part ofa central processing unit on a chip was not a discrete invention for Four-Phase or the computer industry, it was in the semiconductor industry. -
Outline ECE473 Computer Architecture and Organization • Technology Trends • Introduction to Computer Technology Trends Architecture
Outline ECE473 Computer Architecture and Organization • Technology Trends • Introduction to Computer Technology Trends Architecture Lecturer: Prof. Yifeng Zhu Fall, 2009 Portions of these slides are derived from: ECE473 Lec 1.1 ECE473 Lec 1.2 Dave Patterson © UCB Birth of the Revolution -- What If Your Salary? The Intel 4004 • Parameters – $16 base First Microprocessor in 1971 – 59% growth/year – 40 years • Intel 4004 • 2300 transistors • Initially $16 Æ buy book • Barely a processor • 3rd year’s $64 Æ buy computer game • Could access 300 bytes • 16th year’s $27 ,000 Æ buy cacar of memory • 22nd year’s $430,000 Æ buy house th @intel • 40 year’s > billion dollars Æ buy a lot Introduced November 15, 1971 You have to find fundamental new ways to spend money! 108 KHz, 50 KIPs, 2300 10μ transistors ECE473 Lec 1.3 ECE473 Lec 1.4 2002 - Intel Itanium 2 Processor for Servers 2002 – Pentium® 4 Processor • 64-bit processors Branch Unit Floating Point Unit • .18μm bulk, 6 layer Al process IA32 Pipeline Control November 14, 2002 L1I • 8 stage, fully stalled in- cache ALAT Integer Multi- Int order pipeline L1D Medi Datapath RF @3.06 GHz, 533 MT/s bus cache a • Symmetric six integer- CLK unit issue design HPW DTLB 1099 SPECint_base2000* • IA32 execution engine 1077 SPECfp_base2000* integrated 21.6 mm L2D Array and Control L3 Tag • 3 levels of cache on-die totaling 3.3MB 55 Million 130 nm process • 221 Million transistors Bus Logic • 130W @1GHz, 1.5V • 421 mm2 die @intel • 142 mm2 CPU core L3 Cache ECE473 Lec 1.5 ECE473 19.5mm Lec 1.6 Source: http://www.specbench.org/cpu2000/results/ @intel 2006 - Intel Core Duo Processors for Desktop 2008 - Intel Core i7 64-bit x86-64 PERFORMANCE • Successor to the Intel Core 2 family 40% • Max CPU clock: 2.66 GHz to 3.33 GHz • Cores :4(: 4 (physical)8(), 8 (logical) • 45 nm CMOS process • Adding GPU into the processor POWER 40% …relative to Intel® Pentium® D 960 When compared to the Intel® Pentium® D processor 960. -
THINC: a Virtual and Remote Display Architecture for Desktop Computing and Mobile Devices
THINC: A Virtual and Remote Display Architecture for Desktop Computing and Mobile Devices Ricardo A. Baratto Submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy in the Graduate School of Arts and Sciences COLUMBIA UNIVERSITY 2011 c 2011 Ricardo A. Baratto This work may be used in accordance with Creative Commons, Attribution-NonCommercial-NoDerivs License. For more information about that license, see http://creativecommons.org/licenses/by-nc-nd/3.0/. For other uses, please contact the author. ABSTRACT THINC: A Virtual and Remote Display Architecture for Desktop Computing and Mobile Devices Ricardo A. Baratto THINC is a new virtual and remote display architecture for desktop computing. It has been designed to address the limitations and performance shortcomings of existing remote display technology, and to provide a building block around which novel desktop architectures can be built. THINC is architected around the notion of a virtual display device driver, a software-only component that behaves like a traditional device driver, but instead of managing specific hardware, enables desktop input and output to be intercepted, manipulated, and redirected at will. On top of this architecture, THINC introduces a simple, low-level, device-independent representation of display changes, and a number of novel optimizations and techniques to perform efficient interception and redirection of display output. This dissertation presents the design and implementation of THINC. It also intro- duces a number of novel systems which build upon THINC's architecture to provide new and improved desktop computing services. The contributions of this dissertation are as follows: • A high performance remote display system for LAN and WAN environments. -
Learning the Superior Techniques of the Barbarians China’S Pursuit of Semiconductor Independence
JANUARY 2019 Learning the Superior Techniques of the Barbarians China’s Pursuit of Semiconductor Independence AUTHOR James A. Lewis A joint project of the CSIS TECHNOLOGY POLICY PROGRAM and the CSIS FREEMAN CHAIR IN CHINA STUDIES China Innovation Policy Series JANUARY 2019 Learning the Superior Techniques of the Barbarians China’s Pursuit of Semiconductor Independence AUTHOR James A. Lewis A joint project of the CSIS Technology Policy Program and the CSIS Freeman Chair in China Studies About CSIS Established in Washington, D.C., over 50 years ago, the Center for Strategic and International Studies (CSIS) is a bipartisan, nonprofit policy research organization dedicated to providing strategic insights and policy solutions to help decisionmakers chart a course toward a better world. In late 2015, Thomas J. Pritzker was named chairman of the CSIS Board of Trustees. Mr. Pritzker succeeded former U.S. senator Sam Nunn (D-GA), who chaired the CSIS Board of Trustees from 1999 to 2015. CSIS is led by John J. Hamre, who has served as president and chief executive officer since 2000. Founded in 1962 by David M. Abshire and Admiral Arleigh Burke, CSIS is one of the world’s preeminent international policy in¬stitutions focused on defense and security; regional study; and transnational challenges ranging from energy and trade to global development and economic integration. For the past seven years consecutively, CSIS has been named the world’s number one think tank for international security by the University of Pennsylvania’s “Go To Think Tank Index.” The Center’s over 220 full-time staff and large network of affiliated scholars conduct research and analysis and develop policy initiatives that look to the future and anticipate change. -
Neal Notes - Home
WEBINARS WHITEPAPERS SOLUTION CENTERS JOBS BOARD WHAT'S NEW EDUCATION NEWS MAGAZINES JOURNALS CONFERENCES SUBMISSIONS ABOUT HOME CLOUD BIG DATA MOBILE NETWORKING SECURITY SOFTWARE INSIGHTSINSIGHTS HOT TOPICS Neal Notes - Home Latest Posts Israeli Semiconductor Industry Continues to Thrive, but Some Clouds May Be on Horizon Neal Leavitt MAY 30, 2014 14:58 PM A- A A+ Back in 1974, Dov Frohman, one of Intel’s first employees and the inventor of EPROM, erasable programmable read only memory, decided to leave Silicon Valley and return to Israel, his adopted home since 1949. Frohman was charged with helping Intel establish a small chip design center in Haifa, which at the time, was Intel’s first outside the U.S. The rest, as the cliché goes, is history. In a little over a generation, the Israeli semiconductor industry has grown to now employ more than 20,000; annual revenues are about US $5 billion. Intel, for instance, now has about 9,900 employees in Israel and is planning to invest almost $6 billion in upgrading its Kiryat Gat fab facility. In fact, since 1974, Intel has invested about $10.8 billion in the Israeli semiconductor industry. “We’ve exported goods worth $35 billion most from our production centers in Kiryat Gat and Jerusalem,” said Intel VP and Intel Israel CEO Maxine Fassberg. Sol Gradman is editor of TapeOut, a publication covering the semiconductor industry, and also chairs ChipEx, the country’s largest annual semiconductor/microelectronics conference. Gradman said Israel’s semiconductor industry today comprises three types of companies – fabless, multinational design centers, and fabs. -
Qualcomm-Snapdragon-Integrated
QUALCOMM® SNAPDRAGON™ INTEGRATED FABLESS MANUFACTURING 2 Executive Summary Assembly and Test Services (OSATS) companies as well. The new mobile age has brought with it a new approach to solve the performance and power effi- Although QTI is fabless, it is still invested in ciency problems of modern processors. As a leader advancing manufacturing technology. QTI helps in the mobile industry, Qualcomm Technologies, drive and influence semiconductor innovations Inc. (QTI) implemented the Integrated Fabless through alliances and cooperation with industry Manufacturing (IFM) model to address the changes organizations. In 2013, QTI became a core member in the evolving mobile ecosystem to deliver the of the CMOS Program at the global semiconduc- best user experiences. IFM allows Qualcomm tor research program, IMEC, to extend the group’s Technologies to work closely with selected found- collaboration into advance CMOS process tech- ries, test and assembly vendors to provide nologies. Prior to QTI’s core membership, the two cutting edge solutions that can be manufactured organizations collaborated for several years on 3D in high volume while also meeting the perfor- stacking technologies. Also in 2010, QTI became mance, power, size, and cost requirements of the the first integrated, fabless chip manufactures to mobile industry. join SEMATECH, also with the intent to advance CMOS scaling and collaborate on new technologies. Technical Engagement Flexible Foundries The QTI IFM builds tight technical interfaces among all parties in the semiconductor develop- IFM uniquely positions QTI to adjust demand ment cycle. As a technology leader in the mobile across foundries and select the most cost effective ecosystem, QTI collaborates closely with the process nodes for the various components of a foundries and other services, on virtually every mobile system chipset. -
EPIC Consortium Members Directory:198 Members
EPIC Consortium Members Directory: 198 members This directory is updated every month. Latest revision: 20 February 2015 Acal BFi is a European leader in advanced technology solutions, providing marketing, engineering, design, manufacturing and custom services and the only such provider with an infrastructure to deliver a broad complementary range of specialist products and bespoke solutions across Europe. Acal BFi Photonics business unit is one of the eight technology business units in the company and operates across Europe including the UK, Germany, France, Benelux, Italy, Spain and the Nordic region. It supplies a range of products that address the Photonics market including: lasers & laser diode modules, scanning technologies and marking heads, optical components & filters, spectrometers and spectrophotometers/colorimeters, laser beam diagnostic and detection modules. Acal BFi Photonics has the capability to supply stand alone units as well as OEM components or sub- modules to meet specific customer needs. Proof of concept & demonstrations, training, installations, repair and calibrations are also part of the custom services Acal BFi offers. www.acalbfi.com Acreo Swedish ICT provides cutting edge resources and technologies within Sensors and Actuators, Power Electronics, Digital Communication and Life Science. Expertise areas include fiber optics, nanoelectronics, broadband technologies, printed electronics and sensor systems. Acreo Swedish ICT has 145 employees in Kista, Gothenburg, Norrköping and Hudiksvall. Acreo is a part of Swedish -
INTEL CORPORATION (Exact Name of Registrant As Specified in Its Charter) Delaware 94-1672743 State Or Other Jurisdiction of (I.R.S
UNITED STATES SECURITIES AND EXCHANGE COMMISSION Washington, D.C. 20549 FORM 10-K (Mark One) x ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934 For the fiscal year ended December 31, 2016. or ¨ TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934 For the transition period from to . Commission File Number 000-06217 INTEL CORPORATION (Exact name of registrant as specified in its charter) Delaware 94-1672743 State or other jurisdiction of (I.R.S. Employer incorporation or organization Identification No.) 2200 Mission College Boulevard, Santa Clara, California 95054-1549 (Address of principal executive offices) (Zip Code) Registrant’s telephone number, including area code (408) 765-8080 Securities registered pursuant to Section 12(b) of the Act: Title of each class Name of each exchange on which registered Common stock, $0.001 par value The NASDAQ Global Select Market* Securities registered pursuant to Section 12(g) of the Act: None Indicate by check mark if the registrant is a well-known seasoned issuer, as defined in Rule 405 of the Securities Act. Yes x No ¨ Indicate by check mark if the registrant is not required to file reports pursuant to Section 13 or Section 15(d) of the Act. Yes ¨ No x Indicate by check mark whether the registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. -
Computer Architectures
Computer Architectures Motorola 68000, 683xx a ColdFire – CISC CPU Principles Demonstrated Czech Technical University in Prague, Faculty of Electrical Engineering AE0B36APO Computer Architectures Ver.1.10 1 Original Desktop/Workstation 680X0 Feature 68000 'EC000 68010 68020 68030 68040 68060 Data bus 16 8/16 16 8/16/32 8/16/32 32 32 Addr bus 23 23 23 32 32 32 32 Misaligned Addr - - - Yes Yes Yes Yes Virtual memory - - Yes Yes Yes Yes Yes Instruct Cache - - 3 256 256 4096 8192 Data Cache - - - - 256 4096 8192 Memory manager 68451 or 68851 68851 Yes Yes Yes ATC entries - - - - 22 64/64 64/64 FPU interface - - - 68881 or 68882 Internal FPU built-in FPU - - - - - Yes Yes Burst Memory - - - - Yes Yes Yes Bus Cycle type asynchronous both synchronous Data Bus Sizing - - - Yes Yes use 68150 Power (watts) 1.2 0.13-0.26 0.13 1.75 2.6 4-6 3.9-4.9 at frequency of 8.0 8-16 8 16-25 16-50 25-40 50-66 MIPS/kDhryst. 1.2/2.1 2.5/4.3 6.5/11 14/23 35/60 100/300 Transistors 68k 84k 190k 273k 1,170k 2,500k Introduction 1979 1982 1984 1987 1991 1994 AE0B36APO Computer Architectures 2 M68xxx/CPU32/ColdFire – Basic Registers Set 31 16 15 8 7 0 User programming D0 D1 model registers D2 D3 DATA REGISTERS D4 D5 D6 D7 16 15 0 A0 A1 A2 A3 ADDRESS REGISTERS A4 A5 A6 16 15 0 A7 (USP) USER STACK POINTER 0 PC PROGRAM COUNTER 15 8 7 0 0 CCR CONDITION CODE REGISTER 31 16 15 0 A7# (SSP) SUPERVISOR STACK Supervisor/system POINTER 15 8 7 0 programing model (CCR) SR STATUS REGISTER 31 0 basic registers VBR VECTOR BASE REGISTER 31 3 2 0 SFC ALTERNATE FUNCTION DFC CODE REGISTERS AE0B36APO Computer Architectures 3 Status Register – Conditional Code Part USER BYTE SYSTEM BYTE (CONDITION CODE REGISTER) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 T1 T0 S 0 0 I2 I1 I0 0 0 0 X N Z V C TRACE INTERRUPT EXTEND ENABLE PRIORITY MASK NEGATIVE SUPERVISOR/USER ZERO STATE OVERFLOW CARRY ● N – negative .. -
North American Company Profiles 8X8
North American Company Profiles 8x8 8X8 8x8, Inc. 2445 Mission College Boulevard Santa Clara, California 95054 Telephone: (408) 727-1885 Fax: (408) 980-0432 Web Site: www.8x8.com Email: [email protected] Fabless IC Supplier Regional Headquarters/Representative Locations Europe: 8x8, Inc. • Bucks, England U.K. Telephone: (44) (1628) 402800 • Fax: (44) (1628) 402829 Financial History ($M), Fiscal Year Ends March 31 1992 1993 1994 1995 1996 1997 1998 Sales 36 31 34 20 29 19 50 Net Income 5 (1) (0.3) (6) (3) (14) 4 R&D Expenditures 7 7 7 8 8 11 12 Capital Expenditures — — — — 1 1 1 Employees 114 100 105 110 81 100 100 Ownership: Publicly held. NASDAQ: EGHT. Company Overview and Strategy 8x8, Inc. is a worldwide leader in the development, manufacture and deployment of an advanced Visual Information Architecture (VIA) encompassing A/V compression/decompression silicon, software, subsystems, and consumer appliances for video telephony, videoconferencing, and video multimedia applications. 8x8, Inc. was founded in 1987. The “8x8” refers to the company’s core technology, which is based upon Discrete Cosine Transform (DCT) image compression and decompression. In DCT, 8-pixel by 8-pixel blocks of image data form the fundamental processing unit. 2-1 8x8 North American Company Profiles Management Paul Voois Chairman and Chief Executive Officer Keith Barraclough President and Chief Operating Officer Bryan Martin Vice President, Engineering and Chief Technical Officer Sandra Abbott Vice President, Finance and Chief Financial Officer Chris McNiffe Vice President, Marketing and Sales Chris Peters Vice President, Sales Michael Noonen Vice President, Business Development Samuel Wang Vice President, Process Technology David Harper Vice President, European Operations Brett Byers Vice President, General Counsel and Investor Relations Products and Processes 8x8 has developed a Video Information Architecture (VIA) incorporating programmable integrated circuits (ICs) and compression/decompression algorithms (codecs) for audio/video communications. -
Wearable Mixed Reality System in Less Than 1 Pound
Eurographics Symposium on Virtual Environments (2006) Roger Hubbold and Ming Lin (Editors) Wearable Mixed Reality System In Less Than 1 Pound Achille Peternier,1 Frédéric Vexo1 and Daniel Thalmann1 1Virtual Reality Laboratory (VRLab), École Polytechnique Fédérale de Lausanne (EPFL), 1015 Lausanne, Switzerland Abstract We have designed a wearable Mixed Reality (MR) framework which allows to real-time render game-like 3D scenes on see-through head-mounted displays (see through HMDs) and to localize the user position within a known internet wireless area. Our equipment weights less than 1 Pound (0.45 Kilos). The information visualized on the mobile device could be sent on-demand from a remote server and realtime rendered onboard. We present our PDA-based platform as a valid alternative to use in wearable MR contexts under less mobility and encumbering constraints: our approach eliminates the typical backpack with a laptop, a GPS antenna and a heavy HMD usually required in this cases. A discussion about our results and user experiences with our approach using a handheld for 3D rendering is presented as well. 1. Introduction also few minutes to put on or remove the whole system. Ad- ditionally, a second person is required to help him/her in- The goal of wearable Mixed Reality is to give more infor- stalling the framework for the first time. Gleue and Daehne mation to users by mixing it with the real world in the less pointed the encumbering, even if limited, of their platform invasive way. Users need to move freely and comfortably and the need of a skilled technician for the maintenance of when wear such systems, in order to improve their expe- their system [GD01]. -
Award Recipients with Citations
IEEE JACK A. MORTON AWARD RECIPIENTS Beginning with the year 2000 presentation, the Jack A. Morton Award will be renamed the IEEE Andrew S. Grove Award. 1999 - CHARLES H. HENRY "For fundamental contributions to the Lucent Technologies, Bell Laboratories understanding of the optical properties of Murray Hill, NJ quantum wells and semiconductor lasers." 1998 - ISAMU AKASAKI “For contributions in the field of Meijo University group-III nitride materials and devices.” Nagoya, Japan and SHUJI NAKAMURA Nichia Chemical Industries, Ltd. Tokushima, Japan 1997 - CHENMING HU "For outstanding contributions to the physics and University of California modeling of MOS device reliability." Berkeley, CA 1996 - ROBERT W. DUTTON "For seminal contributions to semiconductor Stanford University process and device modeling." Stanford, CA 1995 - YOSHIO NISHI "For contributions to the basic understanding and Hewlett-Packard Company innovative development of MOS device Palo Alto, CA technology." 1994 - ROBERT E. KERWIN "For pioneering work and the basic patent on the AT&T self-aligned silicon-gate process, a key element Warren, NJ in fabrication of very large scale integrated and DONALD L. KLEIN circuits." IBM Corporation Hopewell Junction, NY and JOHN C. SARACE Rockwell International Anaheim, CA 1993 - TOSHIHISA TSUKADA "For contributions to the discovery and Hitachi, Ltd. development of Buried Heterostructure (BH) Tokyo, Japan semiconductor lasers." 1992 - TAKUO SUGANO "For contributions to Metal-Insulator- University of Tokyo Semiconductor Devices and Technology." Tokyo, Japan 1991 - TAK H. NING "For contributions to the development of HWA N. YU advanced bipolar and MOS devices." IBM Corporation Yorktown Height, NY 1 of 3 IEEE JACK A. MORTON AWARD RECIPIENTS Beginning with the year 2000 presentation, the Jack A.