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Khronos Group SYCL 2020 Provisional Specification

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Khronos Group SYCL 2020 Provisional Specification SYCL™ Specification Generic heterogeneous computing for modern C++ Version 2020 provisional Document Revision: 1 Revision Date: June 30, 2020 Git revision: tags/SYCL-2020/provisional-rev1-0-gfaaae8e88 Khronos® SYCL™ Working Group Editors: Ronan Keryell, Maria Rovatsou & Lee Howes Copyright 2011-2020 The Khronos® Group, Inc. All Rights Reserved SYCL 2020 provisional Copyright© 2011-2020 The Khronos® Group, Inc. All Rights Reserved. This specification is protected by copyright laws and contains material proprietary to the Khronos® Group, Inc. It or any components may not be reproduced, republished, distributed, transmitted, displayed, broadcast, or other- wise exploited in any manner without the express prior written permission of Khronos® Group. You may use this specification for implementing the functionality therein, without altering or removing any trademark, copyright or other notice from the specification, but the receipt or possession of this specification does not convey any rights to reproduce, disclose, or distribute its contents, or to manufacture, use, or sell anything that it may describe, in whole or in part. Khronos® Group grants express permission to any current Promoter, Contributor or Adopter member of Khronos® to copy and redistribute UNMODIFIED versions of this specification in any fashion, provided that NO CHARGE is made for the specification and the latest available update of the specification for any version of the API is used whenever possible. Such distributed specification may be reformatted AS LONG AS the contents of the specification are not changed in any way. The specification may be incorporated into a product that is sold as long as such product includes significant independent work developed by the seller. A link to the current ver- sion of this specification on the Khronos® Group website should be included whenever possible with specification distributions. Khronos® Group makes no, and expressly disclaims any, representations or warranties, express or implied, re- garding this specification, including, without limitation, any implied warranties of merchantability or fitness for a particular purpose or non-infringement of any intellectual property. Khronos® Group makes no, and expressly disclaims any, warranties, express or implied, regarding the correctness, accuracy, completeness, timeliness, and reliability of the specification. Under no circumstances will the Khronos® Group, or any of its Promoters, Con- tributors or Members or their respective partners, officers, directors, employees, agents, or representatives be liable for any damages, whether direct, indirect, special or consequential damages for lost revenues, lost profits, or otherwise, arising from or in connection with these materials. Khronos® is a registered trademark and SYCL™, SPIR™, WebGL™, EGL™, COLLADA™, StreamInput™, OpenVX™, OpenKCam™, glTF™, OpenKODE™, OpenVG™, OpenWF™, OpenSL ES™, OpenMAX™, OpenMAX AL™, OpenMAX IL™ and OpenMAX DL™ and WebCL™ are trademarks of the Khronos® Group Inc. OpenCL™ is a trademark of Apple Inc. and OpenGL® and OpenML® are registered trademarks and the OpenGL ES™ and OpenGL SC™ logos are trademarks of Silicon Graphics International used under license by Khronos®. All other product names, trademarks, and/or company names are used solely for identification and belong to their respective owners. 2 Contents 1 Acknowledgements 25 2 Introduction 27 3 SYCL architecture 29 3.1 Overview . 29 3.2 Anatomy of a SYCL application . 30 3.3 Normative references . 31 3.4 The SYCL platform model . 31 3.5 The SYCL backendmodel ...................................... 32 3.5.1 Platform mixed version support . 33 3.6 SYCL execution model . 33 3.6.1 SYCL application execution model . 34 3.6.1.1 SYCL backend resources managed by the SYCL application . 34 3.6.1.2 SYCL command groups and execution order . 35 3.6.2 SYCL kernel execution model . 36 3.7 Memory model . 37 3.7.1 SYCL application memory model . 37 3.7.2 SYCL device memory model . 40 3.7.2.1 Access to memory . 41 3.7.2.2 Memory consistency inside SYCL kernels . 41 3.7.2.3 Atomic operations . 43 3.8 The SYCL programming model . 43 3.8.1 Minimum version of C++ . 43 3.8.2 Alignment with future versions of C++ . 43 3.8.3 Basic data parallel kernels . 43 3.8.4 Work-group data parallel kernels . 44 3.8.5 Hierarchical data parallel kernels . 44 3.8.6 Kernels that are not launched over parallel instances . 45 3.8.7 Pre-defined kernels . 45 3.8.8 Synchronization . 45 3.8.8.1 Synchronization in the SYCL application . 45 3.8.8.2 Synchronization in SYCL kernels . 46 3.8.9 Error handling . 46 3.8.10 Fallback mechanism . 46 3.8.11 Scheduling of kernels and data movement . 47 3.8.12 Managing object lifetimes . 47 3.8.13 Device discovery and selection . 48 3.8.14 Interfacing with SYCL backend API............................. 48 3.9 Memory objects . 48 3.10 SYCL device compiler . 49 3.10.1 Building a SYCL program . 49 3.10.2 Naming of kernels . 50 3 CONTENTS SYCL 2020 provisional 3.11 Language restrictions in kernels . 50 3.11.1 SYCL linker . 51 3.11.2 Functions and data types available in kernels . 51 3.12 Endianness support . 51 3.13 Example SYCL application . 51 4 SYCL programming interface 55 4.1 Backends . 55 4.1.1 Backend macros . 55 4.2 Generic vs non-generic SYCL . 55 4.3 Header files and namespaces . 56 4.4 Class availability . 56 4.5 Common interface . 57 4.5.1 Param traits class . 57 4.5.2 Backend interoperability . 57 4.5.2.1 Type traits backend_traits ............................ 57 4.5.2.2 Template function get_native .......................... 58 4.5.2.3 Template functions make_* ............................ 58 4.5.3 Common reference semantics . 60 4.5.4 Common by-value semantics . 62 4.5.5 Properties . 64 4.5.5.1 Properties interface . 64 4.6 SYCL runtime classes . 66 4.6.1 Device selection . 66 4.6.1.1 Device selector . 66 4.6.2 Platform class . 68 4.6.2.1 Platform interface . 69 4.6.2.2 Platform information descriptors . 71 4.6.3 Context class . 72 4.6.3.1 Context interface . 72 4.6.3.2 Context information descriptors . 74 4.6.3.3 Context properties . 75 4.6.4 Device class . 75 4.6.4.1 Device interface . 76 4.6.4.2 Device information descriptors . 79 4.6.4.3 Device aspects . 91 4.6.5 Queue class . 94 4.6.5.1 Queue interface . 95 4.6.5.2 Queue information descriptors . 103 4.6.5.3 Queue properties . 103 4.6.5.4 Queue error handling . 104 4.6.6 Event class . 105 4.6.6.1 Event information and profiling descriptors . 108 4.7 Data access and storage in SYCL . 109 4.7.1 Host allocation . 109 4.7.1.1 Default allocators . 109 4.7.2 Buffers . ..
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