DOCSLIB.ORG

Changed to Autotrax Design Express (DEX) in the Last 12 Months

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Changed to Autotrax Design Express (DEX) in the Last 12 Months Changed to AutoTRAX Design Express (DEX) In the last 12 Months Saturday 4 February, 2017 Fix for missing duplicate terminals in part replacement dialog. Added color coding to in part replacement dialog. Improved terminal name matching. If not exact, then color coded gray - gray area. Friday 3 February, 2017. Added ability to replace a part by dragging the part from the library onto the symbol for the part to be replaced in a project schematic. Electrical connectivity can be maintained. This will not replace multi-symbol parts. Thursday 19 January, 2017 Added Twitter button to menu. Added optional speck prompt to text capture from PDFs etc. Add option hiding of the application during to text capture from PDFs etc. Saturday 14 January, 2017 New description attributes for parts. Now short and full description. Full description now has a full text editor with fonts, tables, colors etc. Tuesday 10 January, 2017 Improved text capture for PDF in symbol builder. Monday 9 January, 2017 Housekeeping – moved DexDesign.dll to Python.dll. Sunday 8 January, 2017 Fix for copper pours with transformed PCB border. Saturday 7 January, 2017 Removed Set Pad panel – functionality contained elseware. Friday 6 January, 2017 Enable all add symbol terminals buttons even if no symbol terminal magnet present. Sunday 1 January, 2017 Improved Prepare for manufacturing add a ReadMe.txt file. This contains NC drill details. Thursday 22 December, 2016 Improved PCB track optimizer. Hidden tracks no longer selected. Wednesday 21 December, 2016 Fix for polarity band on axial devices. Tuesday 20 December, 2016 Fix for false Electra pin limit for demo software. Fix for Electra ‘.rte’ file key word change from ‘Net’ to ‘net’. Monday 19 December, 2016 Fix for copy symbol not copying footprint. It is now possible to rotate footprint/tracks together. Sunday 18 December, 2016 Interwire properties editor now shows if name overridden by wire. Friday 16 December, 2016 DEX now searched for Electra: o User defined location o C:\Program Files (x86)\ELECTRA o C:\Program Files\ELECTRA o Distribution demo Wednesday 14 December, 2016 You can now added pre-routed designs to the library. When you drag the design onto a project, after you place the schematic, you will be shown the PCB and you can place the pre-routed circuit. Library diodes now have polarity bang. Refresh part in the parametric footprint builder now sets symbol terminal correctly. Sunday 11 December, 2016 Added an option in File Settings popup to set a common base directory to save ALL archives/auto- backup file to. If this is not set then they are saved to the same directory as the project/part. Saturday 10 December, 2016 Added option to File Settings for AutoArchive - automatically save to archive every N changes. If this is set to 1, then every change you make is automatically saved. If set to 2 or more then changes may be not saved. Only the Nth will be saved. e.g. if you set it to 5 then 4 changes will not be saved and the 5th one will be saved. Every time you open a project the first change is always saved. This feature allows you to save on archive storage space. Thursday 8 December, 2016 Improved copy and paste. Now works with sub-picked items. How it works: Copy something using pick or sub-pick. This will put the data on the clipboard. You can close and restart DEX and it will paste! You can also start up another version and paste. When pasting, o if an entity container is selected, e.g. a footprint, symbol or group the pasting adding the pasted objects inside the entity container o else it pastes as normal. Monday 28 November, 2016 Electra 5.60 usage improved. Sunday 27 November, 2016 Improved 2D package visuals for SOIC and Quad parts. Updated to Electra 5.60 Saturday 26 November, 2016 Yellow circle around SMT circular pads. DXF output now has units option. Added button to Panels menu to view the first top level schematic. Fix to vertical inner and outer settings for quad packages wrong values when changed. Add J-lead option to SOIC and Quad packages. Add straight lead option to SOIC and Quad packages. Improved gull-wing leads on SOIC and Quad packages. Monday 14 November, 2016 Improved 3D for resistors. Spherical ends. Added polarity band to axial devices not banded. Sunday 6 November, 2016 New location for DEX support services. Wednesday 2 November, 2016 Added option to hide all nets (unrouted tracks) when moving footprints. It’s in Settings->Application->PCB and is off by default. Tuesday 1 November, 2016 Improved installer. Monday 31 October, 2016 Option to optimize STL output for 3D printing. Saturday 29 October, 2016 Added 3D export to Wavefront OBJ files. Autodesk’s Inventor and 3DStudio MAX will import these. You can the animate and/or create 3D manufacturing assemblies. Friday 28 October, 2016 Fix for incorrect display on copper plated holes. Wednesday 26 October, 2016 Update web links in help file. Fix for search panel not showing result if the panel is too short. Vertical scrollbar now works OK. Fix for Open Project dialog not previewing projects if the name is clicked. Monday 24 October, 2016 Fix for via hole clearance on inner signal planes. Wednesday 19 October, 2016 Fix for snap to grid when manually routing and segment is snapped horizontally/vertically to a terminating pad X,Y coordinate. Footprint tooltip now displays value. Locked object now show tooltips. Tuesday 18 October, 2016 Restored in-application problem reporter. Monday 17 October, 2016 Fixed – pressing backspace during manual routing would lose 45 degree snap. Thursday 6 October, 2016 Fixed - Trace disappear while block moving – Mantis 8 Fixed - Part value text cannot be set to invisible – Mantis 10 Fixed - Value for "Maximum Size" field is not used for export to png (with predefined dpi) – Mantis 4 Fixed - PNG files exported from Dex have an unnecessary border – Mantis 5 Fixed - Remove www.kov.com from DEX UNO Sample project – Mantis 9 Fixed - Duplicates desktop icon - Mantis 3 Fixed - Please add Mantis Bug numbers to Whats new Document - Mantis 12 Fixed – L ist of fixed bugs for Build from Wednesday 5 October, 2016 is incomplete – Mantis 13 Wednesday 5 October, 2016 Fixed - slow startup with library panel open. – Mantis 2, Tuesday 4 October, 2016 Added option to grid settings popdown to have the grid display to metric or imperial units. Monday 3 October, 2016 New Mantis bug reporter. Saturday 1 October, 2016 Fix for STL output units. Update installer does not add desktop icon if it is not there. Added user forum button to Help->Support Saturday 25 September, 2016 Version 9. New free non-commercial license. Fix for place footprints net temp drawing error. Fix for package layers turning on selecting footprints in the Navigator panel. Friday 23 September, 2016 Place all footprints around border is faster. Interactive layout improved. Double click to end added. Thursday 15 September, 2016 Web site changed to DexPCB.com Monday 5 September, 2016 Fix for polyline optimizer sometimes removing last segment on non-closed polylines. Saturday 3 September, 2016 Fix to prevent setting thickness of copper on the top/bottom too thick. Sunday 28 August, 2016 Dragging part onto schematic now sets focus to the viewport so pressing delete will work on the viewport not the library panel. Dragged part remains selected in the library panel. Deleting in the parts panel display what’s deleted and beep. Added restore button for files/directories deleted in the parts panel. Shortcut = Ctrl+Z. Can restore more than 1 delete. You can now set parts as read only. Stops delete. Saturday 27 August, 2016 New track editing moving vertical/horizontal track segments keeps segment the same length. Bug fixes. Saturday 13 August, 2016 Check to hide unrouted track segments in nets that are not selected when routing. This will provide a clearer view when routing. Automatic breaking of unwanted PCB track loops when manually routing a PCB. Backtracking. PCB Orthoginal Routing and Corner Beveling. Friday 12 August, 2016 Changed visibility of unrouted tracks when manually routing. Thursday 11 August, 2016 Improved net connections to pads on footprints as they are moved. Fix for copy and paste PCB cutouts and holes. Wednesday 10 August, 2016 Added option to manual router settings to automatically optimize all unrouted tracks in selected net when manually routing. This is on by default. Monday 8 August, 2016 Improved net reconnections when manual routing. Added command to optimize all un-routed tracks. Route->Tracks->Optimize Un-routed. Sunday 7 August, 2016 Updated manual. Bug fixes. Added option to allow ‘splitting’ of net routing. See router settings menu. Saturday 6 August, 2016 Improved editing of polylines by double clicking on them. Adds vertices from closed vertex to double click point. Like manual routing. Friday 5 August, 2016 Fix for copying symbol that’s connected. Thursday 4 August, 2016 Fix for moving drill holes. Improved symbol terminal editing by double click on them. Wednesday 3 August, 2016 Bug fixes. Tuesday 2 August, 2016 Bug fixes. Fix for routing under SMT pads. Improved drill pilot holes for plots. Monday 1 August, 2016 Added option to set maximum pilot hole size for plotting in the CAM settings. Sunday 31 July, 2016 Nets now truly draw on top. Friday 29 July, 2016 Fix for Unicode characters in Pick & Place output file. New Arduino demo. Fix for bug with drill holes drawn in wrong position (sometimes) when only bottom layer visible. Gerber output OK. Thursday 28 July, 2016 Unrouted tracks (yellow nets) draw above silkscreen and package layer.
Load more

Recommended publications
  • Date Created Size MB . تماس بگیر ید 09353344788
    Name Software ( Search List Ctrl+F ) Date created Size MB برای سفارش هر یک از نرم افزارها با شماره 09123125449 - 09353344788 تماس بگ ریید . \1\ Simulia Abaqus 6.6.3 2013-06-10 435.07 Files: 1 Size: 456,200,192 Bytes (435.07 MB) \2\ Simulia Abaqus 6.7 EF 2013-06-10 1451.76 Files: 1 Size: 1,522,278,400 Bytes (1451.76 MB) \3\ Simulia Abaqus 6.7.1 2013-06-10 584.92 Files: 1 Size: 613,330,944 Bytes (584.92 MB) \4\ Simulia Abaqus 6.8.1 2013-06-10 3732.38 Files: 1 Size: 3,913,689,088 Bytes (3732.38 MB) \5\ Simulia Abaqus 6.9 EF1 2017-09-28 3411.59 Files: 1 Size: 3,577,307,136 Bytes (3411.59 MB) \6\ Simulia Abaqus 6.9 2013-06-10 2462.25 Simulia Abaqus Doc 6.9 2013-06-10 1853.34 Files: 2 Size: 4,525,230,080 Bytes (4315.60 MB) \7\ Simulia Abaqus 6.9.3 DVD 1 2013-06-11 2463.45 Simulia Abaqus 6.9.3 DVD 2 2013-06-11 1852.51 Files: 2 Size: 4,525,611,008 Bytes (4315.96 MB) \8\ Simulia Abaqus 6.10.1 With Documation 2017-09-28 3310.64 Files: 1 Size: 3,471,454,208 Bytes (3310.64 MB) \9\ Simulia Abaqus 6.10.1.5 2013-06-13 2197.95 Files: 1 Size: 2,304,712,704 Bytes (2197.95 MB) \10\ Simulia Abaqus 6.11 32BIT 2013-06-18 1162.57 Files: 1 Size: 1,219,045,376 Bytes (1162.57 MB) \11\ Simulia Abaqus 6.11 For CATIA V5-6R2012 2013-06-09 759.02 Files: 1 Size: 795,893,760 Bytes (759.02 MB) \12\ Simulia Abaqus 6.11.1 PR3 32-64BIT 2013-06-10 3514.38 Files: 1 Size: 3,685,099,520 Bytes (3514.38 MB) \13\ Simulia Abaqus 6.11.3 2013-06-09 3529.41 Files: 1 Size: 3,700,856,832 Bytes (3529.41 MB) \14\ Simulia Abaqus 6.12.1 2013-06-10 3166.30 Files: 1 Size: 3,320,102,912 Bytes
    [Show full text]
  • Information Required for Quotation
    INFORMATION REQUIRED FOR QUOTATION GENERAL INFORMATION Date of Request: Quote Due Date: Requested By: Company: Address: Telephone: FAX: e-mail: Contacts: Purchasing: Telephone: e-mail: Technical: Telephone: e-mail: Quotation Type: Assembly: Consignment Partial Turnkey Turnkey Test Type: Flying Prober Gen-Rad Functional Thermal Testing X-Ray Box Build: Consignment Partial Turnkey Turnkey Quality Requirement (IPC-A-610 Class II is default standard): Quotation Quantities: Turn-time Desired: PRODUCT INFORMATION Electronic Data Preferred – See Attachments A and B All Quotes BOM w/part numbers, descriptions, quantities, reference designators, part types (SMT, Through-hole) Assembly Drawing Circuit Board Drawing (including panelization, when applicable) Special instructions Additional Information for Partial Turnkey/Turnkey Quotes AVL w/approved manufacturers, manufacturer’s part numbers, preferred sources Additional Information for All Test Quotes CAD database Schematics Circuit Board (sample assembled board preferred) Additional Information for Functional Test Quotes Test procedure (with time required) Specifications and space required for test equipment to be provided Specifications for test equipment to be purchased Additional Information for Box Build Quotes Mechanical drawings of fabricated parts INFORMATION REQUIRED FOR MANUFACTURING Contacts Documentation: Telephone: e-mail: Engineering: Telephone: e-mail: Purchasing: Telephone: e-mail: Quality: Telephone: e-mail: Assembly 1. BOM w/part numbers, descriptions, quantities, reference designators 2. AVL w/approved manufacturers, manufacturer’s part numbers, preferred sources (Turnkey parts only) 3. Spares (unpopulated locations) List 4. Assembly Drawings w/pin 1 indicated for polarized parts (5 sets, if electronic data not provided) 5. Circuit Board Drawing 6. Special Instructions and visual aids (pictures, etc) 7. Solder sample (rejected bare circuit board) 8.
    [Show full text]
  • Release Notes: Desktop Edition
    Release Notes: Desktop Edition AutoVue 19.2c2: November 30, 2007 Installation • Please make sure you have AutoVue 19.2c1 installed before upgrading to AutoVue 19.2c2. Note: If you have an older version of AutoVue installed (e.g. AutoVue 19.2), please uninstall it before installing AutoVue 19.2c1 and upgrading to AutoVue 19.2c2. MCAD Formats • Added font substitution for missing native fonts: • CATIA 4 and CATIA 5 • Pro/ENGINEER • Unigraphics • Added support for Unigraphics NX5. • Performed bugs fixes for Unigraphics and CATIA 5. EDA Formats • Added font substitution for missing native fonts: • Altium Protel • OrCAD Layout • Cadence Allegro Layout • Cadence Allegro IPF • Cadence Allegro Extract • Mentor Board Station • Mentor PADS • Zuken CADSTAR • P-CAD • PDIF AEC Formats • Added font substitution for missing native fonts: • AutoCAD • MicroStation 7 and MicroStation 8 • Performed bug fixes for AutoCAD. Release Notes - AutoVue Desktop Edition - 1 - November 30, 2007 AutoVue 19.2c1: September 30, 2007 Packaging and Licensing • Introduced separate installers for the following product packages: • AutoVue Office • AutoVue 2D, AutoVue 2D Professional • AutoVue 3D Professional-SME, AutoVue 3D Advanced, AutoVue 3D Professional Advanced • AutoVue EDA Professional • AutoVue Electro-Mechanical Professional • AutoVue DEMO • Customers are no longer required to enter license keys to install and run the product. • To install 19.2c1, users are required to first uninstall 19.2. MCAD Formats • General bug fixes for CATIA 5 EDA Formats • Performed maintenance and bug fixes for Allegro files. General • Enabled interface for customized resource resolution DLL to give integrators more flexibility on how to locate external resources. Sample source code and DLL is located in the integrat\VisualC\reslocate directory.
    [Show full text]
  • Installation and Administration Manual Oracle Autovue 20.0.0, Desktop Version Copyright © 1989, 2010, Oracle And/Or Its Affiliates
    Installation and Administration Manual Oracle AutoVue 20.0.0, Desktop Version Copyright © 1989, 2010, Oracle and/or its affiliates. All rights reserved. Portions of this software Copyright 1996-2007 Glyph & Cog, LLC. Portions of this software Copyright Unisearch Ltd, Australia. Portions of this software are owned by Siemens PLM © 1986-2008. All rights reserved. This software uses ACIS® software by Spatial Technology Inc. ACIS® Copyright © 1994-1999 Spatial Technology Inc. All rights reserved. Oracle is a registered trademark of Oracle Corporation and/or its affiliates. Other names may be trademarks of their respective owners. This software and related documentation are provided under a license agreement containing restrictions on use and disclosure and are protected by intellectual property laws. Except as expressly permitted in your license agreement or allowed by law, you may not use, copy, reproduce, translate, broadcast, modify, license, transmit, distribute, exhibit, perform, publish or display any part, in any form, or by any means. Reverse engineering, disassembly, or decompilation of this software, unless required by law for interoperability, is prohibited. The information contained herein is subject to change without notice and is not warranted to be error-free. If you find any errors, please report them to us in writing. If this software or related documentation is delivered to the U.S. Government or anyone licensing it on behalf of the U.S. Govern- ment, the following notice is applicable: U.S. GOVERNMENT RIGHTS Programs, software, databases, and related documentation and technical data delivered to U.S. Government customers are "com- mercial computer software" or "commercial technical data" pursuant to the applicable Federal Acquisition Regulation and agency- specific supplemental regulations.
    [Show full text]
  • Release Notes: Web Edition
    Release Notes: Web Edition AutoVue 19.2c2: November 30, 2007 Installation • Please make sure you have AutoVue 19.2c1 installed before upgrading to AutoVue 19.2c2. Note: If you have an older version of AutoVue installed (e.g. AutoVue 19.2), please uninstall it before installing AutoVue 19.2c1 and upgrading to AutoVue 19.2c2. MCAD Formats • Added font substitution for missing native fonts: • CATIA 4 and CATIA 5 • Pro/ENGINEER • Unigraphics • Added support for Unigraphics NX5. • Performed bugs fixes for Unigraphics and CATIA 5. EDA Formats • Added font substitution for missing native fonts: • Altium Protel • OrCAD Layout • Cadence Allegro Layout • Cadence Allegro IPF • Cadence Allegro Extract • Mentor Board Station • Mentor PADS • Zuken CADSTAR • P-CAD • PDIF AEC Formats • Added font substitution for missing native fonts: • AutoCAD • MicroStation 7 and MicroStation 8 • Performed bug fixes for AutoCAD. Release Notes - AutoVue Web Edition - 1 - November 30, 2007 AutoVue 19.2c1: September 30, 2007 Packaging and Licensing • Introduced separate installers for the following product packages: • AutoVue Office • AutoVue 2D, AutoVue 2D Professional • AutoVue 3D Professional-SME, AutoVue3D Advanced, AutoVue 3D Professional Advanced • AutoVue EDA Professional • AutoVue Electro-Mechanical Professional • Customers are no longer required to enter license keys to install and run AutoVue Web Edition and AutoVue VueLinks. • To install 19.2c1, users are required to first uninstall 19.2. MCAD Formats • General bug fixes for CATIA 5 EDA Formats • Performed maintenance and bug fixes for Allegro files. AEC Formats • General bug fixes of metafiles for AutoCAD files. General • Added a checkbox, Resolve Local Resources, under the General section in the Options > Configuration dialog to enable/disable resource resolution on client side.
    [Show full text]
  • Printed Circuit Board
    Jurnal Teknik Elektro Vol. 10 No. 1 P-ISSN 1411 - 0059 Januari - Juni 2018 E-ISSN 2549 - 1571 Analisis Karakteristik Elektrik Bentuk Geometri Jalur Printed Circuit Board Menggunakan Pendekatan Finite Element Putut Son Maria1 dan Elva Susianti2 1Jurusan Teknik Elektro, Fakultas Sains dan Teknologi, Universitas Islam Negeri Sultan Syarif Kasim Riau 2Jurusan Teknik Elektronika, Politeknik Caltex Riau [email protected], [email protected] Abstract— Some Electronics Computer Aided Design (ECAD) softwares have provided several track shapes to design a Printed Circuit Board (PCB), such as right angle, rounded and trapezoidal. However, it is quite difficult to find scientific literature that can be used as a guide which explains and compiles directly about each character of the geometry. This study aims to analyze and to observe the electrical characteristics of the geometry shape on the Printed Circuit Board (PCB) path by using the finite element method. Each PCB path shape is modeled according to its geometry and physical properties, then calculated for its electrical quantity and be observed for its performance at given current. Simulation and numerical calculations showed that the shape of trapezoidal and rounded geometry have lower resistance and planar inductance of 6.8% and 7.39% respectively than the right angle shape. Keywords— ECAD, PCB, geometric shape, Finite Element Analysis Abstrak— Beberapa perangkat lunak yang termasuk kategori Electronics Computer Aided Design (ECAD) telah menyediakan beberapa pilihan bentuk jalur Printed Circuit Board (PCB) seperti right angle, rounded dan trapezoidal. Tidak banyak ditemukan literatur ilmiah yang dapat dijadikan pedoman yang menjelaskan dan mengkomparasikan secara langsung tentang masing-masing karakter dari bentuk geometri tersebut.
    [Show full text]
  • Altium Limited ASX Announcement
    `Altium Limited ASX Announcement Date: 15 June 2021 ALTIUM LIMITED ACN 009 568 772 Level 6, Tower B Announcement authorised by: The Zenith Samuel Weiss 821 Pacific Highway Chatswood NSW 2067 Chairman Australia Altium Limited Investor Relations Contact Details: Kim Besharati Chief of Staff (US based) Phone: +1 858 864 1513 Mobile: +1 760 828 3567 Altium to Host Investor Call to Present its Vision for Industry Transformation and Strategy for Value Creation Sydney, Australia - 15 June 2021 - Electronics design software company Altium Limited (ASX:ALU) will host an investor call at 9.30am AEST on Friday 18th June to share details of the Company vision and strategy to unify and to transform the electronics industry. Altium CEO Aram Mirkazemi, Chairman Sam Weiss and CFO Martin Ive will host the investor call and demonstrate why Altium is uniquely positioned within the global electronics manufacturing industry and how its cloud platform Altium 365 and industry partners platform Nexar connect the electronics value chain from beginning to end. Altium management will reiterate their commitment to achieving Altium’s aspirational 2025 financial goals of US$500 million and 100,000 subscribers and demonstrate why the Altium Board of Directors recently rejected an unsolicited acquisition offer by Autodesk Inc. Investor Call Details Date: Altium Investor Call, Friday 18 June 9.30am AEST Host: CEO Aram Mirkazemi, Chairman Sam Weiss and CFO Martin Ive Participants can pre-register for the investor call using the following link to receive dial in details: https://apac.directeventreg.com/registration/event/7187104 Contact Details: Kim Besharati - Chief of Staff (US based) Samuel Weiss - Chairman Mobile: +1 760 828 3567 Mobile: +61 404 892 221 ENDS Page 1 of 2 About Altium Altium (ASX:ALU) is a multinational software corporation headquartered in San Diego, California, that focuses on electronics design systems for 3D PCB design and embedded system development.
    [Show full text]
  • Altium Limited ASX Announcement
    `Altium Limited ASX Announcement 14 July 2020 ALTIUM LIMITED ACN 009 568 772 Level 6, Tower B Announcement authorised by: The Zenith Samuel Weiss 821 Pacific Highway Chatswood NSW 2067 Chairman Australia Altium Limited Investor Relations Contact Details: Kim Besharati VP Investor Relations & Corporate Affairs Phone: +1 858 864 1513 Mobile: +1 760 828 3567 Unaudited Sales and Revenue for the Full Year Ending 30 June 2020 Altium Achieves 10% Revenue Growth and Exceeds 50,000 Subscriber Target Sydney, Australia - 14 July 2020 - Electronic design software company Altium Limited (ASX:ALU) updates the market on its unaudited sales and revenue for the full year ended 30 June 2020. Altium achieved revenue growth of 10% to US $189 million with solid performances delivered in core business units and key regions during the challenging COVID-19 environment. Altium delivered record growth in new Altium Designer seats and subscriptions to exceed its 50,000 subscriber target. Other highlights include: ● Strong increase of 14% in new Altium Designer seats sold. ● Record growth of 17% in the subscription base to well over 50,000 subscribers. ● Cash balance of over US $90 million. Unaudited Sales and Revenue Performance for the Year Ended 30 June 2020 FY20 FY19 Change (US$ million) (US$ million) % Worldwide Revenue 189 172 10% Worldwide Sales 194 177 10% Comments from Altium’s CEO Mr Aram Mirkazemi: Altium CEO, Mr Aram Mirkazemi commented: “Altium’s strategy of providing attractive pricing and extended payment terms to support our customers during COVID-19 and to drive volume to support our pursuit of market dominance has been rewarded.
    [Show full text]
  • COMPARISON REPORT ALTIUM DESIGNER 13 Vs
    COMPARISON REPORT ALTIUM DESIGNER 13 vs. ALTIUM DESIGNER 16 The world is changing, and electronics are leading the charge towards the future. At the core of our evolutionary pursuit for progress are engineers and companies like yours driving humanity forward. But do you have the design technology needed to deliver the connected, intelligent and autonomous devices of the future? Invest in your future with Altium Subscription. Invest in Invest in Invest in Your Skills Your Company’s Success Your Tools Maintain your competitive edge Deliver the best products to market first Equip yourself to design the with access to the newest design at the lowest possible cost and continue to technologies of the future with the latest methodologies and resources. drive your industry forward. EDA innovations in Altium Designer. VERSION FEATURE COMPARISON Altium Altium Feature Name What it Does How It Benefits You Designer 13 Designer 16 Enhance the readability of components Customize pin names, designator Customizable Schematic Pins placed on your design with customizable in positions, font properties, and colors. properties. Have complete control over your compo- Select alternative part choices for nent selection process and include pin Alternative Part Choice System - obsolete or unavailable components. compatible backup part choices directly in your BOM. Automatically detect and setup con- Design accurate high-speed board layouts Technology-Aware xSignals Wizard straints for common with automatic configuration for DDR3/4 - high-speed technologies. and USB 3.0 class and match length rules. Precisely measure your board layout in Measure all board objects while Precise 3D Measurements Native 3D PCB™ and clearly communicate - in 3D view.
    [Show full text]
  • Installation and Administration Manual Copyright © 1989, 2008, Oracle And/Or Its Affiliates
    AutoVue Desktop Version 19.3.1 Installation and Administration Manual Copyright © 1989, 2008, Oracle and/or its affiliates. All rights reserved. Portions of this software Copyright 1996-2007 Glyph & Cog, LLC. Portions of this software Copyright Unisearch Ltd, Australia. Portions of this software are owned by Siemens PLM © 1986-2008. All rights reserved. This software uses ACIS® software by Spatial Technology Inc. ACIS® Copyright © 1994-1999 Spatial Technology Inc. All rights reserved. Oracle is a registered trademark of Oracle Corporation and/or its affiliates. Other names may be trademarks of their respective owners. This software and related documentation are provided under a license agreement containing restrictions on use and disclosure and are protected by intellectual property laws. Except as expressly permitted in your license agreement or allowed by law, you may not use, copy, reproduce, translate, broadcast, modify, license, transmit, distribute, exhibit, perform, publish or display any part, in any form, or by any means. Reverse engineering, disassembly, or decompilation of this software, unless required by law for interoperability, is prohibited. The information contained herein is subject to change without notice and is not warranted to be error-free. If you find any errors, please report them to us in writing. If this software or related documentation is delivered to the U.S. Government or anyone licensing it on behalf of the U.S. Govern- ment, the following notice is applicable: U.S. GOVERNMENT RIGHTS Programs, software, databases, and related documentation and technical data delivered to U.S. Government customers are "com- mercial computer software" or "commercial technical data" pursuant to the applicable Federal Acquisition Regulation and agency- specific supplemental regulations.
    [Show full text]
  • JEDMICS Defined File Types This Table Lists the JEDMICS Defined File Types
    JEDMICS Defined File Types This table lists the JEDMICS defined file types. You may have additional site defined file types (i.e., File Type number > 50,000). File Type Extension Src Flavor Dst Flavor Content Format Comments 0 --- ALL ALL ALL ALL REPRESENT ALL FILE TYPES 1 C4 C4 C4 RSTR JEDMICS CCITT4 2 IGS IGES V3 VCTR IGES-2D v3 3 CGM CGM T1 CGM CGM Type 1 4 SGM SGML SGML SGML 5 TXT TEXT ASCI Text File 6 OFF OFFL OFFL Offline / Unknown 7 NIF NIFF RSTR NIRS/NIFF File 8 CAL CALS RSTR CALS Type 1 9 UNK UNKN BIN Unknown file format 20 TIF TIFF G6 RSTR TIFF Group 6 21 PCX PCX ALL NATIVE RSTR PCX 23 EPS EPS RSTR Encapsulated Postscript 25 RST UNKN RSTR Unknown Raster 26 EXT EXT Off-line - restricted 27 CT2 CALS2 ALL NATIVE RSTR CALS Type 2 28 NOF NIOF NIOF NIOF Off-line - not scanned 29 PDF PDF V2.1 NATIVE DOC PDF v2.1 30 DWG ACAD R9 NATIVE CAD ACAD R9 NATIVE 31 DWG ACAD R10 NATIVE CAD ACAD R10 NATIVE 32 DWG ACAD R11 NATIVE CAD ACAD R11 NATIVE 33 DWG ACAD R12 NATIVE CAD ACAD R12 NATIVE 34 DWG ACAD R13 NATIVE CAD ACAD R13 NATIVE 35 DWG ACAD R14 NATIVE CAD ACAD R14 NATIVE 36 ZIP ACAD R9 ZIP CAD ACAD R9 ZIP 37 ZIP ACAD R10 ZIP CAD ACAD R10 ZIP 38 ZIP ACAD R11 ZIP CAD ACAD R11 ZIP 39 ZIP ACAD R12 ZIP CAD ACAD R12 ZIP 40 ZIP ACAD R13 ZIP CAD ACAD R13 ZIP 41 DWG ACAD R14 ZIP CAD ACAD R14 ZIP 42 DWG ACAD3D R13 NATIVE CAD ACAD3D R13 NATIVE 43 ZIP ACAD3D R13 ZIP CAD ACAD3D R13 ZIP 44 DXF DXF ALL NATIVE VCTR ACAD DXF 45 DGN ALLEGR V6 NATIVE CAD CADENCE v6 NATIVE 46 DGN ALLEGR V7 NATIVE CAD CADENCE v7 NATIVE 47 DGN ALLEGR V8 NATIVE CAD CADENCE v8 NATIVE
    [Show full text]
  • Aperture Information This Is a Text File Describing the Size and Shape of Eachelement on the Board. Also Known As a D:Codelist
    Aperture Information This is a text file describing the size and shape of eachelement on the board. Also known as a D:codelist. This report is not necessaryif your files are saved as Extended Gerber with embedded Apertures(RS274X). ApertureList/ApertureTable A list of the shapes and sizes for describing the pads andtracks used to create a layer of a circuit board.Assembly File: A drawingdescribing the locations of components on a PCB. AOI (Automated Optical Inspection): Automatic laser/videoinspection of traces and pads on the surface of inner layer cores or outerlayer panels. The machine uses cam data to verify copper feature positioning, size and shape. Instrumental in locating"open" traces, missing features or "shorts". AQL (Acceptance Quality Level): The maximum number of defectiveslikely to exist within a population (lot)that can be considered to becontractually tolerable, normally associated with statistically derived sampling plans. Array A group of elements or circuits arranged in rows and columnson a base material. Artwork Master The photographic image of the PCB pattern on film used toproduce the circuit board, usually on a 1:1 scale. Aspect Ratio The ratio of the PCB thickness to the diameter of thesmallest hole. The ratio of the board thickness to the smallest drilledhole. (Ex. 0.062ö thick board 0.0135ö drill = aspect ratio of 4.59:1). Designertip: Minimizing the aspect ratio of the holes improves through hole plating and minimizes the chance of via failures Artwork Artwork for printed circuit design is photoplotted film (ormerely the Gerber files used to drive the photoplotter), NC Drill file anddocumentation which are all used by a board house to manufacture a bare printed circuit board.
    [Show full text]