Software Defined Radio

Home , Demodulation

GNU Radio and the USRP

Overview

 What is Software Defined Radio?

 Advantages of Software Defined Radio

 Traditional versus SDR Receivers

 SDR and the USRP

 Using GNU Radio

Introduction

 What is Software Defined Radio (SDR)?  Getting code as close to the antenna as possible  Replacing hardware with software for modulation/demodulation  Advantages:  Makes communications systems reconfigurable (adapting to new standards)  Flexible (universal software device - not special purpose)  Filters/Other Hardware  Cognitive Radio

1 Traditional Receiver

|fLO-fc| fc f +f RF x LO c IF Demod- Amplifier Amplifier ulator fLO Local 10 KHz 10 KHz f (KHz) Oscillator 5 10 KHz f (KHz) f (KHz) 455 530 980 1700 f (KHz) 10 KHz 455

fLO=1435 KHz

f (KHz) 530 980 1700

Traditional vs. SDR Receiver

Receiver Front End

Traditional RF x IF Demod- / Hardware Amplifier Amplifier ulator Receiver Local Oscillator

Current SDR Receiver Front End ADC Software Receiver

Future SDR ADC Software Receiver ? 5

SDR Receiver Using the USRP

Daughterboard Motherboard

Receiver ADC FPGA USB PC Front End Controller

Decimation, similar to traditional GNU Radio MUX, + software front end with fIF = 0 Interface to PC

USRP: Universal Software Radio Peripheral

2 Quadrature Signal Representation

The received signal, S(t), may be represented as follows:

16 KHz S(t) = I(t)cos(2 fct) + Q(t)sin(2 fct)

fc = carrier frequency 446 f (MHz) I(t) = in-phase component Contain amplitude and phase Q(t) = quadrature component information of baseband signal •GNU Radio software uses I and Q components to demodulate signals •USRP front end translates the signal to zero frequency and extracts I and Q 7

Extracting I(t) from S

S(t) = I(t)cos(2! fct) + Q(t)sin(2! fct)

Multiplying both sides by cos(2πfct):

2 S(t)cos(2! fct) = I(t)cos (2! fct) + Q(t)sin(2! fct)cos(2! fct) I(t) Q(t) = 1+ cos(4! f t) + sin(4! f t) + sin(0) 2 [ c ] 2 [ c ] 1 1 1 = I(t) + I(t)cos(4! f t) + + Q(t)sin(4! f t) 2 2 c 2 c Applying this signal to a low pass filter, the output will be: 1 I(t) 2 8

Extracting Q(t) from S

S(t) = I(t)cos(2! fct) + Q(t)sin(2! fct)

Multiplying both sides by sin(2πfct):

2 S(t)sin(2! fct) = I(t)cos(2! fct)sin(2! fct) + Q(t)sin (2! fct) I(t) Q(t) = sin(4! f t) " sin(0) + 1" cos(4! f t) 2 [ c ] 2 [ c ] 1 1 1 = I(t)sin(4! f t) + Q(t) " Q(t)cos(4! f t) 2 c 2 2 c Applying this signal to a low pass filter, the output will be: 1 Q(t) 2 9

a USRP Receiver Front End

x LPF I

fc RF LO Amplifier 90°

x LPF Q

Analog to Digital Converter (ADC)

 12 bit A/D Converter (212 levels)  2 volt peak-peak maximum input  64 Msamp/second ∆t

ADC

Sampling Interval: Quantization Levels: 1 2 !t = 6 = 0.0156µS !v = 12 = 0.488mV 64 " 10 2 11

Decimation

 Original sampling rate is 64Msamp/sec

 Converts a portion of spectrum 32 MHz wide

 Generally we are interested is a narrower portion of the spectrum requiring a lower sampling rate

 USB cannot handle that high data rate

 Occurs in the FPGA of the USRP

Downsample LPF divide by 128 f f f 32MHz 250KHz 250KHz fs = 64Msamp/sec fs = 64Msamp/sec fs = 500Ksamp/sec

64M = 128 500K 12

a SDR Receiver with USRP

Daughterboard Motherboard

I FPGA USB (Decimator, ADC MUX, etc.) Controller PC

GNU Radio Software

USRP - Motherboard/Daughterboard

GNU Radio Software

 Community-based project started in 1998  GNU Radio application consists of sources (inputs), sinks (outputs) and transform blocks  Transform blocks: math, filtering, modulation/demodulation, coding, etc.  Sources: USRP, audio input, file input, signal generator, …  Sinks: USRP, audio output, file output, FFT, oscilloscope, …  Blocks written in C++  Python scripts used to connect blocks and form application

5 Design of a Receiver

USRP GNU Radio Application

 USRP: Set frequency of local oscillator (receive frequency), gain of amplifier, decimation factor

 GNU Radio application: use Python to specify and connect blocks that perform demodulation and decoding

Example: 400 - 500 MHz NBFM Receiver

 Problem: Receive an audio signal (up to 4 KHz) transmitted at 446 MHz using narrowband FM (NBFM) with a 16 KHz transmission bandwidth

USRP GNU Radio Application 16 KHz

f (MHz) f 400 446 500 4KHz

Design Procedure

1. Plan the block diagram of system components 2. Determine block parameters 3. Determine decimation rates 4. Write Python script to specify the blocks and connect them together

a NBFM Receiver: Block Diagram/Parameters

16 KHz 16 KHz 16 KHz FM f (MHz) f (MHz) f (KHz) 400 446 500 -32 32 -? -8 8 ?

USRP PC

Channel Filter FM Daughterboard ADC FPGA cutoff = 8KHz Demodulator f = 446 MHz 64 Msamp/sec Dec. factor = ? c Dec. factor = ? Dec. factor = ?

16 KHz 16 KHz Audio

f (KHz) f (MHz) f (MHz) -? ? -4 4

Determining the Decimation Factors

16 KHz Audio FPGA Channel Filter FM Dec. factor = cutoff = 8KHz Demodulator Dec. factor = Dec. factor = f (KHz) D1 -4 4 -32 32 f (MHz) D2 D3

Total Decimation factor = 8000 = D1D2D3

64Msamp/sec 8Ksamp/sec

FPGA Decimation Factor, D1

16 KHz Audio FPGA Channel Filter FM Dec. factor = cutoff = 8KHz Demodulator Dec. factor = Dec. factor = f (KHz) D1 -4 4 -32 32 f (MHz) D2 D3

•Total Decimation factor = 8000 = D1D2D3 •Maximize the decimation in FPGA •Maximum decimation factor in FPGA = 256

•Select D1 = 250 (factor of 8000) •Output sample rate = 64Ms/s / 250 = 256Ks/s 21

a Channel Filter Specification

16 KHz Audio FPGA Channel Filter FM Dec. factor = cutoff = 8KHz Demodulator Dec. factor = Dec. factor = f (KHz) 250 -4 4 -32 32 f (MHz) D2 D3

64Ms/s 16 KHz Channel Filter f (KHz) H (dB) -128 128 0 256Ks/s -0.1 -60 f (KHz) -16 -9 -8 8 9 16

•Maximum frequency = 16 KHz Reduce sample rate to 32 Ks/s

•256Ks/s / 32Ks/s D2 = 8 22

FM Demodulator 16 KHz

FM f (KHz) -16 -8 8 16 32Ks/s 16 KHz Audio FPGA Channel Filter FM Dec. factor = cutoff = 8KHz Demodulator Dec. factor = 8 Dec. factor = f (KHz) 250 -4 4 -32 32 f (MHz) D3

64Ms/s 16 KHz

f (KHz) -128 128 256Ks/s •Maximum frequency = 4 KHz Reduce sample rate to 8 Ks/s

•32Ks/s / 8Ks/s D3 = 4 •FM Demodulator block “extracts” audio signal from FM waveform by operating on I and Q 23

Complete Application Design

16 KHz

FM f (KHz) -16 -8 8 16 32Ks/s 16 KHz Audio FPGA Channel Filter FM Dec. factor = cutoff = 8KHz Demodulator Dec. factor = 8 Dec. factor = 4 f (KHz) 250 -4 4 -32 32 f (MHz) 8Ks/s 64Ms/s 16 KHz

f (KHz) -128 128 256Ks/s •Total decimation ratio = 250*8*4 = 8000 •Problem: The audio card requires an input sample rate ≥ 44.1 Ks/s

•Solution: Use a Resampler to increase the output sample rate 24

a Final Application Design

64Ms/s 256Ks/s 32Ks/s 32Ks/s

FPGA Channel Filter FM Resampler Dec. factor = cutoff = 8KHz Demodulator mult by 3 48Ks/s 250 Dec. factor = 8 Dec. factor = 1 div by 2

•Audio Card requires a sample rate ≥ 44.1 Ks/sec. Use 48 Ks/sec. •Modify FM Demodulator to have a decimation factor of 1 (no change) •Increase the sample rate to 48 Ks/sec with Resampler (x 3/2)

Implementing the Design

 Create a Python script to specify and connect the various GNU radio blocks  Blocks are already written in C++  USRP parameters are set within Python script  # indicates that the line is a comment  Refer to nbfm.py script

Setting the USRP Parameters

 The following code sets the USRP Parameters:

a Channel Filter Design

 The following code specifies the channel filter and computes the coefficients H (dB) 0 -0.1 -60 f (KHz) -16 -9 -8 8 9 16

Channel Filter Creation

 The following code creates the channel filter using the coefficients computed:

FM Demodulator

 The following code creates the FM demodulator.  The demodulator block also includes a low pass filter.

a Resampler

 The following code creates the resampler.  The resampler decimates and/or interpolates the data to adjust the sample rate.

Connecting the Blocks

 The following code connects the blocks:

Or, a single connect statement:

Final Thoughts

 Demonstration  Storing/creating data  Transmitters  Installing GNU radio  Questions  Where do we go from here?