N-Series Intel® Pentium® Processors and Intel® Celeron® Processors
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N-series Intel® Pentium® Processors and Intel® Celeron® Processors Datasheet – Volume 1 of 3 February 2016 Document Number: 332092-002 YouL may not use or facilitate the use of this document in connection with any infringement or other legal analysis concerning Intel products described herein. You agree to grant Intel a non-exclusive, royalty-free license to any patent claim thereafter drafted which includes subject matter disclosed herein. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document. Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Learn more at Intel.com, or from the OEM or retailer. No computer system can be absolutely secure. Intel does not assume any liability for lost or stolen data or systems or any damages resulting from such losses. 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Copies of documents which have an order number and are referenced in this document may be obtained by calling 1-800-548-4725 or visit www.intel.com/design/literature.htm. I2C is a two-wire communications bus/protocol developed by NXP. SMBus is a subset of the I2C bus/protocol and was developed by Intel. Implementations of the I2C bus/protocol may require licenses from various entities, including NXP Semiconductors N.V. Intel® 64 architecture requires a system with a 64-bit enabled processor, chipset, BIOS and software. Performance will vary depending on the specifichardware and software you use. Consult your PC manufacturer for more information. For more information, visit http://www.intel.com/content/ www/us/en/architecture-and-technology/microarchitecture/intel-64-architecture-general.html. Intel® Virtualization Technology (Intel® VT) requires a computer system with an enabled Intel® processor, BIOS, and virtual machine monitor (VMM).Functionality, performance or other benefits will vary depending on hardware and software configurations. Software applications may not becompatible with all operating systems. Consult your PC manufacturer. For more information, visit http://www.intel.com/go/virtualization. The original equipment manufacturer must provide TPM functionality, which requires a TPM-supported BIOS. TPM functionality must be initialized andmay not be available in all countries. For Enhanced Intel SpeedStep® Technology, see the Processor Spec Finder at http://ark.intel.com/ or contact your Intel representative for moreinformation. Intel® AES-NI requires a computer system with an AES-NI enabled processor, as well as non-Intel software to execute the instructions in the correctsequence. AES-NI is available on select Intel® processors. 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Intel, Celeron, Pentium, Intel® Seamless Display Refresh Rate Switching Technology (Intel® SDRRS Technology), Intel® Display Power Saving Technology (Intel® DPST), Intel® Trusted Execution Engine (Intel® TXE), Intel® Virtualization Technology (Intel® VT), Intel® Virtualization Technology (Intel® VT) for IA-32, Intel® 64 and Intel® Architecture (Intel® VT-x), Enhanced Intel SpeedStep® Technology, Intel® Display Power Saving Technology (Intel® DPST), Intel® Automatic Display Brightness, Intel® High Definition Audio (Intel® HD Audio), Intel® Performance Primitives, Intel® Advanced Vector Extensions (Intel® AVX), Intel® Rapid Memory Power Management (Intel® RMPM), and the Intel logo are trademarks of Intel Corporation in the U.S. and other countries. *Other names and brands may be claimed as the property of others. Copyright © 2015-2016, Intel Corporation 2 Datasheet, Volume 1 of 3 Contents 1 Introduction ............................................................................................................. 17 1.1 Document Structure and Scope ......................................................................... 19 1.2 Terminology ................................................................................................... 20 1.3 Feature Overview ............................................................................................ 22 1.4 Related Documents.......................................................................................... 26 2 Physical Interfaces ................................................................................................... 27 2.1 Platform Power Rails ........................................................................................ 27 2.2 SoC Physical Signal Per Interface....................................................................... 29 2.2.1 System Memory Controller Interface Signals (DDR3L) .............................. 29 2.2.2 USB 2.0 Controller Interface Signals ...................................................... 30 2.2.3 USB 3.0 Interface Signals..................................................................... 31 2.2.4 Integrated Clock Interface Signals ......................................................... 31 2.2.5 Display—Digital Display Interface (DDI) Signals....................................... 32 2.2.6 MIPI*-CSI (Camera Serial Interface) and ISP Interface Signals..................33 2.2.7 Storage Controller Interface Signals....................................................... 33 2.2.8 High Speed UART Interface Signals........................................................ 34 2.2.9 I2C Interface Signals............................................................................ 35 2.3 SIO—Serial Peripheral Interface (SPI) Signals ..................................................... 35 2.3.1 PCU—Fast Serial Peripheral Interface (SPI) Signals .................................. 36 2.3.2 PCU—Real Time Clock (RTC) Interface Signals......................................... 36 2.3.3 PCU—Low Pin Count (LPC) Bridge Interface Signals.................................. 36 2.3.4 JTAG Interface Signals ......................................................................... 37 2.3.5 PCI Express* (PCIe*) Signals................................................................ 37 2.3.6 SATA Signals ...................................................................................... 38 2.3.7 SMBus Signals .................................................................................... 38 2.3.8 Intel® High Definition Audio (Intel® HD Audio) Signals ............................. 38 2.3.9 Power Management Unit (PMU) Signals .................................................. 39 2.3.10 Speaker Signals .................................................................................. 39 2.3.11 Miscellaneous Signals........................................................................... 40 2.4 Hardware Straps ............................................................................................. 40 2.5 GPIO Multiplexing ............................................................................................ 42 3 Processor Core.......................................................................................................... 49 3.1 SoC Transaction Router .................................................................................... 49 3.2 Intel® Virtualization Technology (Intel® VT)........................................................ 49 3.2.1 Intel® VT-x Objectives ......................................................................... 49 3.2.2 Intel® VT-x Features ........................................................................... 50 3.3 Security and Cryptography Technologies............................................................. 50 3.3.1 PCLMULQDQ Instruction ....................................................................... 50 3.3.2 Digital Random Number Generator ........................................................ 51 3.3.3 Power Aware Interrupt Routing ............................................................. 51 3.4 Platform Identification and CPUID ...................................................................... 51 3.5 References ..................................................................................................... 51 4 Integrated Clock ....................................................................................................... 53 5 Thermal Management ............................................................................................... 55 5.1 Overview........................................................................................................ 55 5.2 Digital Thermal Sensors.................................................................................... 55 5.2.1 DTS Timing