Bass Guitar Effects Bank

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Bass Guitar Effects Bank Bass Guitar Effects Bank 6.101 Final Project Report ­ Spring 2016 Yuechen (Mark) Yang and Israel Ridgley Abstract Nowadays many musicians turn to digital signal processing, however software processing requires large digital overhead such as an operating system, incurs a large power cost, and reduces quality due to digitization. Therefore, in many circumstances analog audio processing is still preferred. In our project, we have created a customizable and modular analog effects bank for the bass guitar, which will focus on the freedom of the user to choose how to modulate their sound. Our system includes a variety of interconnectable and adjustable modules that the user can select and combine to achieve their desired overall effect. As a demonstration of our intrinsically modular design, we successfully integrated a bonus module into the system, further increasing user control. 1 Table of Contents Overview 3 Modules ● Bitcrusher 4 ● Flanger 7 ● Overdrive 11 ● Fuzzface 13 ● Pre­amplifier 14 ● Phaser 17 ● Auto­Wah 18 System Testing and Lessons learned 22 Conclusion 23 Appendix 23 2 Overview (Mark and Israel) In today’s world of abundant computation, musicians have many options when they wish to produce effects or alter the sound of their instruments; however, digital signal processing requires large overhead and the audio signal must be sampled and converted into digital form which can degrade quality and add unwanted distortions. The features of analog signal processing, namely lower power consumption and cost, minimal perceptible delay, and preservation of fidelity, make it a clearly preferable alternative to the digital route for the highest quality. The modules chosen for the effects bank showcase a wide breadth of analog engineering, with everything from sample and hold digitization circuits to amplification with minimal harmonic distortion. The breadth of audio processing achieved required knowledge of various oscillator implementations, passive and active filtering, rectification, transistor amplifier topologies, and a large variety of operational amplifier topologies. The effect designs drew inspiration from old design classics, but sometimes the implementation used modern parts and design paradigms. The result is a robust and effective product with a distinctly recognizable sound. The effects bank consists of a pre­amplification stage containing a 3 channel equalizer, 6 audio effects modules (including the bonus fuzz face), and a commercial guitar amplifier depicted in the figure below. All of the effects stages are buffered and have a max output of 5Vp­p in order to ensure ample room for processing with ±15V rails and high signal to noise ratio given the large amount of parasitics on the bread boards. With this design paradigm, the modules can be placed in any order and any combination the user desires without any consideration other than what sound will be produced. 3 Figure 1. A block diagram showing a setup consisting of most of the modules. Bitcrusher(Mark) A relatively modern effect, the bitcrusher produces a distinctive sound that is iconic of early video game sound scapes. The bitcrusher is typically a low fidelity digital effect, but our module attempts to mimic its sound by using a circuit consisting of discrete components and operational amplifiers. The artificially low fidelity is achieved through sample rate reduction and resolution reduction, both of which are illustrated below. A continuous audio signal possessing an infinite sampling rate requires a sample and hold (SH) stage in order to reduce the sampling frequency. Then, the sampled waveform is passed through ​ an analog to digital converter (ADC), which produces an output signal with a discrete set of amplitude values. Figure 3. A standard sample and hold topology 4 Shown above is the SH stage. The input audio signal is buffered by U1. The 2N7000 NMOS is used as a switching MOSFET; when the CLK is high, the NMOS’s source and drain are shorted, and the output of the buffer appears on the capacitor C1. Later, the CLK goes low, and the value in C1 remains the same until the next clock cycle. In this way the CLK frequency determines the sampling rate. Next, the timing circuit that produces the CLK signal is examined. Figure 4. The timing circuitry for the SH stage, note the VCCS from lab 6 The left portion of the above schematic is a voltage controlled current source identical to that from lab 6. U13 has negative feedback, forcing the output of U13 to drive Q1 in a manner that ensures both of U13’s input terminals have the same voltage. Due to U13’s configuration, the emitter voltage of Q1 can be set by adjusting the 1k ohm potentiometer (FREQ_ADJ_POT). Consequently, the FREQ_ADJ_POT controls the current through R17 and thus the collector current as well as the rate at which C2 charges. If M2 is switched on and off at a fixed rate, C2 is repeatedly shorted and recharged which produces a sawtooth waveform across C2 with a frequency corresponding to the switching rate of M2. M2 is made to switch with a comparator composed of R18, R19, and U11. R18 and R19 also set the threshold voltage at which the U11 output will go from high to low, or vice versa. Note that this reference is not connected directly to ground, but instead draws a DC offset from a voltage divider. The reason for this is the signal being compared has a DC offset due to component restraints. C2 cannot drain completely during the short time M2 is conducting, thus the sawtooth waveform contains a DC offset. To remove the offset, the waveform is simply buffered by U9 and then high pass filtered. The resultant signal is then compared to ground by U12, which produces a low duty cycle squarewave ­ a 5 suitable CLK signal. This clock circuit completes the SH stage, whose final output is sent to the ADC. In order to simplify the circuitry and avoid using purpose built ICs, a direct conversion or “flash” ADC topology is used. The flash ADC topology, shown below in figure 5, utilizes a parallel bank of comparators each having a reference voltage from the same linear voltage ladder. All of the non­inverting input terminals are connected to the input signal, in this case the sampled audio waveform. The resistor chain divides the maximum input amplitude of 5 volts evenly for each comparator; this sets a strict output voltage for each range of input voltages. The op amps are powered by +15V and ­ 15V bench voltage supply. As the input signal’s amplitude increases, the op amps’ outputs reach as close to +15V as they can, one by one. The opposite happens when the input signal decreases in amplitude; the topmost op amp, U2, will output as close to ­15V as it can, and so on. Since the rails of the op amps are not very uniform, reverse biased zener diodes are added to the output terminals in. The 1N750 zener diodes provide a relatively uniform 4.7V output when the op amp output is high, and about ­0.6V output when the op amp’s output is low. This discrete set of voltages are then summed together with an op amp adder, and then high pass and low pass filtered before the output buffer. This module represents a truly analog alternative to digital signal processing, and it is able produces its own worthwhile effect. The main challenge for this module is the lack of online reference, since many bit crushers are digital in nature. It was difficult yet rewarding to complete a working and good sounding module starting with only a rough idea of how different stages should be built. ` Figure 5. The flash ADC ladder used in the bitcrusher, note the use of the zener diodes to achieve a uniform output voltage Please see the appendix for the full schematic. 6 Flanger(Mark) The flanger’s iconic jet plane like “woosh” effect is instantly recognizable by hardcore rock fans. At the circuit level, the flanger functions effectively like a self sweeping comb filter. The filter is achieved by feeding back a varying time delayed version of the input signal and mixing it with the original signal. The flanger is a famous effect, and many schematics are available online; however, most designs are too complicated for the timeline and require extensive use of purpose built ICs such as the phase­locked­loop (PLL). Therefore, I chose the simplest flanger schematic available, and substituted the PLL in the clock circuit with a low frequency oscillator (LFO) controlling a voltage controlled oscillator (VCO). It is important to explain how analog delay is achieved in this module. Without digital memory, the only practical choice is the bucket brigade IC (BBD). Figure 6. The MN3207 BBD device used to replace the MN3007 from the reference design As shown above, the BBD can be thought of as a long chain of sample and hold stages ­ the sampled signal is passed down the delay line every clock cycle. The topology in figure 6 is the exact schematic of the MN3207 IC, which is the delay element in this module. This type of BBD is known as having “Complementary Output Topology”, meaning the two source follower ​ transistors, which connect to the last two consecutive capacitors, have two distinct outputs that can be summed with an op amp adder to produce a delayed version of the input with minimal distortions. 7 CP1 and CP2 are the two clock inputs for the BBD, and they are opposite of one another. The clock frequency determines the length of the delay ­ a slower clock will result in a longer delay, and vice versa. Of course, since the flanger requires only 2­10 ms of delay, the clock frequency is kept between 100 kHz and 200 kHz as specified for this delay time.
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