Rad Tolerant CMOS Image Sensor Based on Hole Collection 4T Pixel Pinned Photodiode

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To link to this article: DOI: 10.1109/TNS.2012.2223486 URL: http://dx.doi.org/10.1109/TNS.2012.2223486

To cite this version: Place, Sébastien and Carrere, Jean-Pierre and Allegret, Stephane and Magnan, Pierre and Goiffon, Vincent and Roy, François Rad Tolerant CMOS Image Sensor Based on Hole Collection 4T Pixel Pinned Photodiode. (2012) IEEE Transactions on Nuclear Science, vol. 59 (n° 6). pp. 2888-2893. ISSN 0018-9499

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Rad Tolerant CMOS Image Sensor Based on Hole Collection 4T Pixel Pinned Photodiode Sébastien Place, Student Member, IEEE, Jean-Pierre Carrere, Stephane Allegret, Pierre Magnan, Member, IEEE, Vincent Goiffon, Member, IEEE, and Francois Roy

Abstract— pixel pitch CMOS Image sensors based on hole collection pinned photodiode (HPD) have been irradiated with source. The HPD sensors exhibit much lower dark current degradation than equivalent commercial sensors using an Electron collection Pinned Photodiode (EPD). This hardness improvement is mainly attributed to carrier accumulation near the interfaces induced by the generated positive charges in dielectrics. The pre-eminence of this image sensor based on hole collection pinned photodiode architectures in ionizing environments is demonstrated. Index Terms—Active pixel sensors, APS, CIS, CMOS 4T image sensor, CMOS image sensors, dark current, hole collection pinned photodiode, hole-based detector, pinned photodiode.

Fig. 1. Schematic representation of 4T CMOS pixel based on electrons detec- I. INTRODUCTION tion (EPD).

HE use of commercial image sensors is considered in T many harsh environments, especially for the medical, sci- (TID) is proposed all along this paper. A comparative analysis entific or spatial imaging applications [1]. This implies new of the degradation on both sensors is then used to demonstrate requirements for imagers designed for such applications, in- the benefit of HPD sensors in ionizing environment. cluding that the CMOS image sensors (CIS) should become ionizing radiation tolerant. Four transistors (4T) pinned photodiode II. DESCRIPTION OF 4T EPD AND HPD PIXEL ARCHITECTURES pixel [2]–[5] has been established as the standard architecture for high volume imaging applications. Up to now, some studies Nowadays, most of the CMOS image sensors are based on 4T focused on hardening-by-design pinned photodiode pixels have pinned photodiode organization [3], [10]–[12]. The specificity been disclosed [6], [7]. The improvement brought by these tech- of this pixel architecture resides in the photodiode itself. It is niques has been demonstrated experimentally. Moreover, the called a pinned photodiode, which consists, in a shallow buried drawbacks coming from these proposed design rules for ion- N-type photodiode pinched by two opposite doping layers rep- izing radiation hardening could be photodiode area reduction or resented in Fig. 1. To allow charge transfer in a readout node charge to voltage conversion gain degradation. called the sense node (SN), a charge transfer gate (TG) tran- Considering hole devices advantages over electron ones sistor is used to manage the signal charge pass through. This demonstrated for common application [8], [9], it is proposed EPD device uses electrons as signal charges and embeds NMOS in this paper to go further by investigating how hole collection transistors. This means that an in-pixel charge to voltage conver- based on 4T pixel pinned photodiode architecture could be sion is used and associated to an in-pixel source follower (SF) a promising candidate for ionizing radiation tolerant image MOSFET. The readout is selectively done all along the matrix sensor. with a line access transistor, the readout transistor (RD). The As dark current has been highlighted as the limitation factor, reset cycle of the sense node is done by another transistor called dark current evolution of electron pinned photodiode (EPD) and reset transistor (RST). hole pinned photodiode (HPD) pixels with total ionizing dose Hole charge collection pinned photodiode coupled to dedicated PMOS transistors is also worth considering to achieve image sensor. Such pixel has been called PMOS pixel or HPD, and has been introduced in [8], [9] for its promising perfor- mances in dark current, cross-talk and temporal noise. In HPD architecture, as described in Fig. 2, all doping types have to be inverted in the pixel. For example, pinned photodiode doping species have to be switched from P to N-type for pinning surface layer all along the Si/SiO interfaces, and from NtoP-type for photodiode charge storage zone. The transfer gate works as PMOS transistor with P type doped sensing node. Fig. 3. Cross-sections of PMDfets realized with (a) NMOS and (b) PMOS pixels processes.

Fig. 2. Schematic representation of 4T CMOS pixel based on holes detection (HPD).

In the same way, in —pixel MOS transistors type has been switched from N-type to P-type by playing with implantation species. The HPD pixel architecture can be declined as a process option without any pixel design modiﬁcations. Contrary to standard EPD sensors, transistor gate in HPD ma- trices have to be biased with high voltages to switch off and low voltages to switch on. However, timing diagram remains unchanged.

III. IONIZING IRRADIATION CONDITIONS Fig. 4. PMOS-type PMDfets characteristics with TID. The tested sensors and evaluation devices (described in each corresponding section) have been exposed to gamma ray source at the Université Catholique de Louvain (UCL). The dose rate used was . For practical reasons, each device was exposed grounded and at room temperature to ﬁve different TID: 3, 10, 30, 100, and .Theinﬂuence of pixel operating condition has not been taken into account in this study.

IV. ESTIMATION OF HPD PIXEL INTEREST FOR IONIZING RADIATION HARDENING A preliminary study is proposed through elementary test structures to point out the different advantages under irradiation of hole collection pinned photodiodes. TID degradations in CMOS integrated circuits are known to be located in the sensor Fig. 5. NMOS-type PMDfets characteristics with TID. dielectrics [13]. Considering our pixel, two major dielectrics have been identified: the pre metal dielectric (PMD) located directly on the top of the photodiode and the deep trench isolation irradiation, the devices were grounded since the PMD stack (DTI) used to isolate physically the neighboring pixels [14]. above the pinned photodiode is not biased in an operated 4T Several studies ([15], [16]) make use of dedicated structures to CIS pixel (Pinned photodiode (PPD) electric field lines do characterize these material properties under irradiation. To do not penetrate the PMD thanks to the pinning layer). Results so, thick dielectrics such as PMD can be used as gate oxide on are presented for PMOS and NMOS-type PMDFETs in linear specific transistors, called PMDFETs and described for NMOS regime in Figs. 4 and 5. and PMOS processes in Fig. 3. Figs. 4 and 5 show that variations on threshold voltages can Such evaluation structures were designed with large be clearly seen on both devices. The subthreshold slopes are also aspect ratio to compensate the low degraded but the variations are more difficult to notice directly values because of the important thickness of Pre Metal on these plots. Dielectrics (PMD). Each transistor was irradiated according to Oxide traps and interface traps densities ( and the same conditions of doses specified in part III. During the ) can be extracted from these variations thanks to TABLE I TABLE II SUMMARY OF TRAP DENSITIES DEGRADATION WITH TID SUMMARY OF PIXEL PHYSICAL DESCRIPTION

well-known methodologies [17]. and are given for NMOS/PMOS transistors by:

(1)

(2) with the sub threshold slope change and the threshold voltage change respectively for NMOS/PMOS transistors, the Fermi potential for type material, the oxide capacitance, q the Coulomb charge, k the Boltzmann constant and T the device temperature. On one hand, and increases have a cumulative effects on degradation on PMOS transistors whereas they compensate each other in NMOS PMDFETs. However, both device degradations are dominated by the generation of positive charges in PMD dielectric. The evaluation of traps densities is presented in Table I for the last two TID. These results illustrate that pre metal dielectrics store the same quantities of charges during the irradiation for both transistors. A difference is observed on interface states densities suggesting a larger degradation in PMOS PMD devices. It should be emphasized that the behavior of the other dielectrics surrounding the pinned photodiode (i.e., the DTI) are supposed to be similar after irradiation (same trends and same conclu- sions, but possibly different defect density values).

V. I ONIZING RADIATION INDUCED DARK CURRENT INCREASE: Fig. 6. Normalized dark current degradation between (a) EPD and (b) HPD sensors. (The same normalization factor has been used for all the plots). COMPARISON BETWEEN HPD AND EPD SENSORS

A. Tested Image Sensor Details B. Ionizing Radiation Induced Dark Current Degradation Both types of three megapixel sensors have been manu- The evolution of dark current distribution with TID is pre- factured with the same masks (i.e., identical sensor design) sented respectively on Fig. 6(a) for the N-type pinned photo- but with dedicated 90 nm CMOS imaging technology node diode and Fig. 6(b) for the P-type. processes: one for EPD and the other for HPD. The N-type Measurements were performedinadarktestchamberata pixel image sensor is based on standard STMicroelectronics regulated temperature of . All dark current values have CIS processes while the P-type pixel image sensor have been been normalized with the same factor, so both behaviors appear processed thanks to modified pixel doping implantation by on the same scale. Moreover, the electron collection and hole switching doping species and reengineering net doping profile. collection pinned photodiode sensor have a dark current unbal- Technological choices, summarized in Table II, include specific anced of less than 10% before irradiation. A statistical analysis process dedicated to image quality improvement for a of dark current is performed on 400 kpixels subsamples. pixel pitch, such as DTI [14] or optical stack reduction. DTI are As expected from previous results on a similar EPD CIS [18], needed to minimize electrical crosstalk which becomes more the EPD dark current distribution shifts toward large dark cur- and more important as the pixel pitch is scaling down. rent values after each TID step [Fig. 6(a)]. Fig. 8. Evolution of TG dark current amplitude modulation with TID on EPD.

A. Silicon/Silicon Oxide Interface State Characterization Fig. 7. Image on hole-based CMOS image sensors after . To compare HPD and EPD pixel dark current degradation due to surface charge generation rate increase, the interface states As regards the HPD sensor [Fig. 6(b)], unlike the EPD be- density degradation have to be characterized. Proposed method havior, the HPD dark current distribution does not change sig- is based on transfer gate interface charge generation rate modu- niﬁcantly from 0 to . Beyond , lated (from accumulation to depletion regime) by TG operating the average dark current value increases slightly with TID. The voltage [21] for respective TID. most striking result is much lower degradation of the P type TG contribution on dark current value can be extracted by pinned photodiode at highest doses with a dark current ratio of suppressing, from total current, the photodiode component eval- 40 for and20to between HPD uated in strong accumulation as explained in [21]. TG is then and EPD. considered depleted when it reaches a peak value, as plotted in The same conclusion has been observed for the dark signal Fig. 8. The methodology is described in [21], [22], TG contribu- non uniformity (DSNU) parameter. Even though HPD DSNU is tion behaves as a Gated Diode with VloTG bias. VloTG is here slightly larger than the EPD before irradiation, the DSNU degra- the low level value of the TG pulse. Its peak value is modeled dation rate due to ionizing radiation is also in favor of HPD and according to the law as from the HPD dark current standard devia- tion is lower than EPD one. Finally, the complete functionality (3) of HPD after irradiation is shown on image in Fig. 7. with the surface recombination velocity

(4) VI. DISCUSSION Under ionizing environments, two main phenomena were and occurring in the dielectrics surrounding the silicon photodiode [19]: positive fixed charges are generated in the dielectric (5) surrounding active devices, and Silicon/Silicon Oxide interface states are increased. is the surface state density per unit of energy, the To discuss the direct impact of positive fixedcharges,anAr- depleted area beneath TG, the intrinsic carrier density, rhenius dark current analysis was first extracted for the both sen- the thermal velocity and the capture cross-section. sors at ionizing doses beyond . Activation ener- Experimentally, the influence of the depleted TG on dark cur- gies of 1.27 eV for EPD and 1.17 eV for HPD have been mea- rent at respective TID step is extracted by computing the differ- sured. These measures were extracted on four points from 25 to ence between the maximum and minimum values of the curve, . Thermal accuracy is guaranteed with more or less . and is illustrated in Fig. 8. The ratios of TG dark current ampli- This means that the main degradation scheme is still dominated tudes between irradiated samples and preirradiated value pro- on both sensors by diffusion currents mechanism [20]. As a con- vide the trend of Silicon/Silicon oxide interface degradation in sequence, interfaces around the diode are not electri- respect with charge generation rate rising under TG channel. cally depleted, as explained in [18], because the activation energy in this case would be characteristic of the thermal genera- B. Correlation Between TG Charge Generation Rate and tion, with activation energies around 0.65 eV. Mean Dark Current Values for EPD and HPD On top of this preliminary evidence on thermal response, The charge generation rate evolution (related to interface more in depth sources of degradations than positive fixed states density increase) on EPD and HPD is finally plotted in charges are investigated and, as mentioned before, investiga- Fig. 9, as well as the normalized mean dark current values tion about interface state degradation should be performed. for both sensors. Normalized charge generation rate related to add up with the interface state degradation to cause a large increase of mean dark current, especially after . Inversely, for HPD, the generated positive charges in dielectrics will increase electrons density at the interfaces. It is assumed that the effective electron density increase for HPD at the interface should partially compensate the higher interface states density. It can be illustrated by the Janesick’s model of dark current induced by P-doped interfaces [20]:

(6)

with p the effective majority carrier density at the interface, Fig. 9. Evolution of normalized surface recombination velocity with TID com- the doped interface area and the surface recombination velocity paratively with EPD and HPD behaviors. deﬁned this time by

(7)

Applied to HPD, adapted formula (7) for N-doped interface describes how increase will be balanced by its effective electron density (n) increase at the interface

(8) Fig. 10. Cross-section of 4T pinned photodiode with depleted interfaces both on top and lateral interfaces. This results in a much lower dark current increase, depicted in Fig. 9. Moreover, the hole capture cross-section should be weaker interface states density increase of TG gate oxide seems quali- than electron ones: Glunz reported a ratio of 100 between these tatively well correlated with the major part of the degradation parameters [23]. It could also explain a similar gap on dark beyond for both sensors. This graph highlights current’s diffusion components between EPD and HPD pixels. the dark current degradation factor versus respective interface As well, some evidence on process conditions such as N-type state density increase. This degradation factor is much more species segregation [8] strengthen dark current reduction in- important for the EPD compared to HPD. These deviations will duced by interfaces for HPD. be discussed more in details in the following part.

VII. CONCLUSION C. Physical Mechanisms in the Improved Radiation Hardness of HPD Sensors Hole based CMOS image sensors have been irradiated with a source related to space environment doses. First results This drastic difference in dark current trend could be ex- on elementary test structures demonstrated that positive charge plained by the photodiode pinning layer type choice. Based accumulation in Pre Metal Dielectrics induced a field effect on electrons collection, the EPD is built on N-type storage at the interface, which can be used as benefitinHPDCISto charge layer pinned by surrounding P-type electrode. In a balance interface state degradation by improving electron ac- complementary way the HPD is built on P-type storage charge cumulation surface density at the PMD interface. This mecha- layer pinned by surrounding N-type electrode. The photodiode nism can be generalized to all dielectrics surrounding the pho- pinning layers coupled to the storage layers are designed to todiode. TID induced dark current increases in HPD sensors are manage the photodiode as a fully depleted electrostatic well reduced compared to its EPD equivalent. Both sensors report a and to contain the dark current generation rate at the significant increase beyond coming from inter- interface. Assuming that total ionizing dose defects like posi- face states density increase. On HPD, this degradation is held tive charge buildup in oxide and interface defect creation are in back thanks the increase of electrons carrier density at the in- the same order of magnitude, positive fixed charges build-up terface induced by positive charge buildup in oxide. This mech- in dielectrics surrounding the diode will have a beneficial anism, advantageous for hole collection pinned diode, is detri- electrostatic effect on HPD through electrons concentration mental for electron collection pinned diode. Thus, hole collec- increase at the interface. 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