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www.fairchildsemi.com Application Note AN-3008 RC Snubber Networks for Thyristor Power Control and Transient Suppression

Introduction A A RC networks are used to control voltage transients that could IA falsely turn-on a thyristor. These networks are called snub- IBP PE V bers. PNP I CJ I 1 P J ICP NB CJN The simple snubber consists of a series resistor and capacitor CJ C IC I2 dV placed around the thyristor. These components along with N IJ G P dt B the load inductance form a series CRL circuit. Snubber NPN G t I theory follows from the solution of the circuit’s differential BN dV N CJ E IK dt equation. IA = 1– (αN + αp) K Many RC combinations are capable of providing acceptable TWO TRANSISTOR MODEL CJ K CEFF = performance. However, improperly used snubbers can cause OF 1– (αN + αp) INTEGRATED unreliable circuit operation and damage to the semiconduc- SCR STRUCTURE tor device. dV Figure 1. Model Both turn-on and turn-off protection may be necessary for ()dt s reliability. Sometimes the thyristor must function with a dV range of load values. The type of thyristors used, circuit Conditions Influencing () conﬁguration, and load characteristics are inﬂuential. dt s Transients occurring at line crossing or when there is no Snubber design involves compromises. They include cost, initial voltage across the thyristor are worst case. The voltage rate, peak voltage, and turn-on stress. Practical collector junction capacitance is greatest then because the solutions depend on device and circuit physics. depletion layer widens at higher voltage.

Small transients are incapable of charging the self-capaci- dV Static tance of the gate layer to its forward biased threshold voltage dt (Figure 2). Capacitance voltage divider action between the collector and gate-cathode junctions and built-in resistors dV What is Static ? that shunt current away from the cathode emitter are respon- dt sible for this effect. dV Static ------is a measure of the ability of a thyristor to retain a dt 180 blocking state under the inﬂuence of a voltage transient. 160 MAC 228-10 TRIAC T = 110°C 140 J dV s)

()Device Physics µ dt s 120 dt dV dV 100 Static ------turn-on is a consequence of the Miller effect and dt regeneration (Figure 1). A change in voltage across the 80 junction capacitance induces current through it. This current STATIC60 (V/ dV is proportional to the rate of voltage change ------. It triggers 40 dt the device on when it becomes large enough to raise the sum 20 20 100 200 300 400 500 600 700 800 of the NPN and PNP transistor alphas to unity. PEAK MAIN TERMINAL VOLTAGE (VOLTS)

dV Figure 2. Exponential versus Peak Voltage ()dt s

REV. 4.01 6/24/02

AN-3008 APPLICATION NOTE

dV dV Static ------does not depend strongly on voltage for operation Improving () dt dt s below the maximum voltage and temperature rating. dV Avalanche multiplication will increase leakage current and Static ------can be improved by adding an external resistor dt dV reduce ------capability if a transient is within roughly 50 volts from the gate to MT1 (Figure 4). The resistor provides a path dt dV of the actual device breakover voltage. for leakage and ------induced currents that originate in the dt drive circuit or the thyristor itself. dV A higher rated voltage device guarantees increased ------at dt 140 lower voltage. This is a consequence of the exponential rating method where a 400 V device rated at 50 V/µs has a 120 dV higher ------to 200 V than a 200 V device with an identical MAC 228-10 dt 100 800V 110°C s) rating. However, the same diffusion recipe usually applies µ for all voltages. So actual capabilities of the product are not 80 dt much different. dV 60

RINTERNAL = 600Ω

dV STATIC40 (V/ Heat increases current gain and leakage, lowering ------, dt s the gate trigger voltage and noise immunity (Figure 3). 20

0 180 10 100 1000 10000 GATE-MT1, RESISTANCE (OHMS) 160

MAC 228-10 140 VPK = 800 V dV s) Figure 4. Exponential () versus µ dt 120 s Gate to MT1 Resistance dt

dV 100

Non-sensitive devices (Figure 5) have internal shorting 80 resistors dispersed throughout the chip’s cathode area. This STATIC (V/ 60 design feature improves noise immunity and high tempera-

40 ture blocking stability at the expense of increased trigger and holding current. External resistors are optional for non-sensi- 20 20 100 200 300 400 500 600 700 800 tive SCRs and TRIACs. They should be comparable in size TJ, JUNCTION TEMPERATURE (°C) to the internal shorting resistance of the device (20 to 100 ohms) to provide maximum improvement. The internal resis- dV tance of the thyristor should be measured with an ohmmeter Figure 3. Exponential ()dt versus Temperature s that does not forward bias a diode junction. dV ()Failure Mode 2200 dt s 2000 Occasional unwanted turn-on by a transient may be accept- MAC 16-8 1800 able in a heater circuit but isn’t in a ﬁre prevention sprinkler VPK = 600 V s) system or for the control of a large motor. Turn-on is destruc- µ 1600 tive when the follow-on current amplitude or rate is exces- dt sive. If the thyristor shorts the power line or charged dV 1400 capacitor, it will be damaged. 1200 STATIC (V/ dV 1000 Static ------turn-on is non-destructive when series impedance dt 800 limits the surge. The thyristor turns off after a half-cycle of 600 dV conduction. High ------aids current spreading in the thyristor, 50 60 70 80 90 100 110 120 130 dt TJ, JUNCTION TEMPERATURE (°C) dI improving its ability to withstand ----- . Breakdown turn-on dt dV does not have this beneﬁt and should be prevented. Figure 5. Exponential ()dt s versus Junction Temperature

2 REV. 4.01 6/24/02

APPLICATION NOTE AN-3008

Sensitive gate TRIACS run 100 to 1000 ohms. With an gate drive circuit needs to be able to charge the capacitor dV without excessive delay, but it does not need to supply con- external resistor, their ------capability remains inferior to dt dV tinuous current as it would for a resistor that increases ------non-sensitive devices because lateral resistance within the dt gate layer reduces its beneﬁt. the same amount. However, the capacitor does not enhance static thermal stability. Sensitive gate SCRs (I < 200 µA) have no built-in resistor. GT dV They should be used with an external resistor. The recom- The maximum ------improvement occurs with a short. dt s mended value of the resistor is 1000 ohms. Higher values dV Actual improvement stops before this because of spreading reduce maximum operating temperature ------(Figure 6). dt s resistance in the thyristor. An external capacitor of about 0.1 The capability of these parts varies by more than 100 to 1 µF allows the maximum enhancement at a higher value of depending on gate-cathode termination. RGK.

10 MEG dV MCR22-2 One should keep the thyristor cool for the highest ------. dt TA = 65°C s Also devices should be tested in the application circuit at the A 10 highest possible temperature using thyristors with the lowest 1 MEG V G measured trigger current. K dV TRIAC Commutating dt dV 100K What is Commutating ? dt dV The commutating ------rating applies when a TRIAC has been dt

GATE-CATHODE RESISTANCE (OHMS) conducting and attempts to turn-off with an inductive load. 10K 0.001 0.01 0.1 1 10 100 The current and voltage are out of phase (Figure 8). The dV TRIAC attempts to turn-off as the current drops below the STATIC (V/µs) dt holding value. Now the line voltage is high and in the oppo- site polarity to the direction of conduction. Successful turn- dV Figure 6. Exponential versus off requires the voltage across the TRIAC to rise to the ()dt s Gate-Cathode Resistance instantaneous line voltage at a rate slow enough to prevent retriggering of the device.

130 R L 120 i 2 VLINE VMT2-1 MAC 228-10 G ° 110 800V 110 C 1 s) µ dl 100 2-1 PHASE dt c MT dt V dV ANGLE 90 VOLTAGE CURRENT φ TIME 80 TIME STATIC (V/ dV 70 i VLINE dt c

60 dV 0.001 0.01 0.1 1 Figure 8. TRIAC Inductive Load Turn-Off ()dt c GATE TO MT1, CAPACITANCE (µF) dV dV Figure 7. Exponential versus ()Device Physics ()dt s dt c Gate to MT Capacitance 1 A TRIAC functions like two SCRs connected in inverse- parallel. So, a transient of either polarity turns it on. A gate-cathode capacitor (Figure 7) provides a shunt path for transient currents in the same manner as the resistor. It also There is charge within the crystal’s volume because of prior ﬁlters noise currents from the drive circuit and enhances the conduction (Figure 9). The charge at the boundaries of the built-in gate-cathode capacitance voltage divider effect. The

REV. 4.01 6/24/02 3

AN-3008 APPLICATION NOTE

dV dV collector junction depletion layer responsible for ------is volume charge storage and turn-off becomes limited by ------. dt s dt s dV dV At moderate current amplitudes, the volume charge begins also present. TRIACS have lower ------than ------because dt c dt s to inﬂuence turn-off, requiring a larger snubber. When the of this additional charge. dV current is large or has rapid zero crossing, ------has little dt c dI G MT1 inﬂuence. Commutating ----- and delay time to voltage dt TOP reapplication determine whether turn-off will be successful or not. (Figures 11,12) N NNN P

Previously Conducting Side N dI dt c dV + – dt c

NN N VOLTAGE/CURRENT TIME 0

STORED CHARGE REVERSE RECOVERY MT 2 FROM POSITIVE VMT2-1 CHARGE DUE CURRENT PATH CONDUCTION LATERAL VOLTAGE TO dV/dt DROP VOLUME STORAGE IRRM CHARGE Figure 9. TRIAC Structure and Current Flow at Commutation Figure 10. TRIAC Current and Voltage at Commutation The volume charge storage within the TRIAC depends on the peak current before turn-off and its rate of zero crossing

dI ----- . In the classic circuit, the load impedance and line E dt c dI V frequency determine ----- . The rate of crossing for sinusoi- dt c dal currents is given by the slope of the secant line between the 50% and 0% levels as:

dI 6fITM ----- = ------A/ms E dt c 1000

where f = line frequency and ITM = maximum on-state MAIN TERMINAL VOLTAGE (V) current in the TRIAC. VT

Turn-off depends on both the Miller effect displacement 0 td TIME dV current generated by ------across the collector capacitance and dt Figure 11. Snubber Delay Time the currents resulting from internal charge storage within the volume of the device (Figure 10). If the reverse recovery current resulting from both these components is high, the 0.5 lateral IR drop within the TRIAC base layer will forward 0.2 dV bias the emitter and turn the TRIAC on. Commutating ------0.1 dt 0.2 ) capability is lower when turning off from the positive direc- d t 0.05 tion of current conduction because of device geometry. The 0 0.1 = W = gate is on the top of the die and obstructs current ﬂow. d 0.02

(t 0.05 RL = 0 Recombination takes place throughout the conduction period 0.03 M = 1 0.01 I = 0 0.02 RRM and along the back side of the current wave as it declines to zero. TIME NORMALIZED DELAY VT Turn-off capability depends on its shape. If the current ampli- E 0.005 dI 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.3 0.5 1 tude is small and its zero crossing ----- is low, there is little dt c DAMPING FACTOR

Figure 12. Delay Time To Normalized Voltage

4 REV. 4.01 6/24/02

APPLICATION NOTE AN-3008

dV dV Conditions Influencing () Improving () dt c dt c dV dV dV Commutating ------depends on charge storage and recovery The same steps that improve ------aid ------except when dt dt s dt c dV dynamics in addition to the variables inﬂuencing static ------. stored charge dominates turn-off. Steps that reduce the dt stored charge or soften the commutation are necessary then. High temperatures increase minority carrier life-time and the size of recovery currents, making turn-off more difﬁcult. Larger TRIACS have better turn-off capability than smaller Loads that slow the rate of current zero-crossing aid turn-off. ones with a given load. The current density is lower in the Those with harmonic content hinder turn-off. larger device allowing recombination to claim a greater pro- portion of the internal charge. Also junction temperatures are C RS lower.

i TRIACS with high gate trigger current have greater turn-off LS ability because of lower spreading resistance in the gate dl layer, reduced Miller effect, or shorter lifetime. dt i c DC MOTOR – + The rate of current crossing can be adjusted by adding a 60 Hz R L t L > 8.3 µs commutation softening inductor in series with the load. R Small high permeability “square loop” inductors saturate causing no significant disturbance to the load current. The inductor resets as the current crosses zero introducing a large Figure 13. Phase Controlling a Motor in a Bridge inductor into the snubber circuit at that time. This slows the current crossing and delays the reapplication of blocking Circuit Examples voltage aiding turn-off. Figure 13 shows a TRIAC controlling an inductive load in a bridge. The inductive load has a time constant longer than The commutation inductor is a circuit element that intro- the line period. This causes the load current to remain con- duces time delay, as opposed to inductance, into the circuit. stant and the TRIAC current to switch rapidly as the line dV It will have little influence on observed ------at the device. voltage reverses. This application is notorious for causing dt dI The following example illustrates the improvement resulting TRIAC turn-off difficulty because of high ----- . dt c from the addition of an inductor constructed by winding 33 turns of number 18 wire on a tape wound core (52000 -1A). High currents lead to high junction temperatures and rates of This core is very small having an outside diameter of 3/4 current crossings. Motors can have 5 to 6 times the normal inch and a thickness of 1/8 inch. The delay time can be cal- current amplitude at start-up. This increases both junction culated from: temperature and the rate of current crossing leading to turn- –8 off problems. ()N A B 10 t = ------where: s E The line frequency causes high rates of current crossing in 400 Hz applications. Resonant transformer circuits are dou- ts = time delay to saturation in seconds. bly periodic and have current harmonics at both the primary B = saturating flux density in Gauss 2 and secondary resonance. Non-sinusoidal currents can lead A = effective core cross sectional area in cm to turn-off difficulty even if the current amplitude is low N = number of turns. before zero-crossing. For the described inductor:

dV 2 -8 ()Failure Mode ts = (33 turns)(0.076 cm )(28000 Gauss)(1 x 10 )/(175 v) = 4.0 µs. dt c dV The saturation current of the inductor does not need to be ------failure causes a loss of phase control. Temporary turn- much larger than the TRIAC trigger current. Turn-off failure dt c on or total turn-off failure is possible. This can be destructive will result before recovery currents become greater than this if the TRIAC conducts asymmetrically causing a dc current value. This criterion allows sizing the inductor with the component and magnetic saturation. The winding resistance following equation: limits the current. Failure results because of excessive surge current and junction temperature.

REV. 4.01 6/24/02 5 AN-3008 APPLICATION NOTE

H M High load inductance requires large snubber resistors and I = ------S L where: S 0.4 π N small snubber capacitors. Low inductances imply small resistors and large capacitors. HS = MMF to saturate = 0.5 Oersted ML = mean magnetic path length = 4.99 cm. Damping and Transient Voltages Figure 14 shows a series inductor and ﬁlter capacitor (.5) (4.99) connected across the ac main line. The peak to peak voltage I ==------60 mA. S 0.4 π 33 of a transient disturbance increases by nearly four times. Also the duration of the disturbance spreads because of Snubber Physics ringing, increasing the chance of malfunction or damage to the voltage sensitive circuit. Closing a switch causes this Undamped Natural Resonance behavior. The problem can be reduced by adding a damping resistor in series with the capacitor. ω I 0 = ------Radians/second LC 100µH 0.05 dV Resonance determines ------and boosts the peak capacitor 340 V dt 0.1 VOLTAGE 0 V SENSITIVE voltage when the snubber resistor is small. C and L are 10µs µF CIRCUIT dV related to one another by ω 2. ------scales linearly with ω 0 dt 0 when the damping factor is held constant. A ten to one +700 dV reduction in ------requires a 100 to 1 increase in either dt 0 component. V (VOLTS)

Damping Factor -700 01020 R C TIME (µs) ρ = ------

2 L Figure 14. Undamped LC Filter The damping factor is proportional to the ratio of the circuit Magnifies and Lengthens a Transient loss and its surge impedance. It determines the trade off dV dl between ------and peak voltage. Damping factors between dt dt 0.01 and 1.0 are recommended. Non-Inductive Resistor The snubber resistor limits the capacitor discharge current The Snubber Resistor dI dI ------dV and reduces stress. High destroys the thyristor even Damping and dt dt dt though the pulse duration is very short. The rate of current dV rise is directly proportional to circuit voltage and inversely When ρ < 0.5, the snubber resistor is small, and ------depends dt proportional to series inductance. The snubber is often the dV mostly on resonance. There is little improvement in ------for major offender because of its low inductance and close dt proximity to the thyristor. damping factors less than 0.3, but peak voltage and snubber θ discharge current increase. The voltage wave has a 1-COS( ) With no transient suppressor, breakdown of the thyristor sets dV shape with overshoot and ringing. Maximum ------occurs at a the maximum voltage on the capacitor. It is possible to dt exceed the highest rated voltage in the device series because time later than t = 0. There is a time delay before the high voltage devices are often used to supply low voltage voltage rise, and the peak voltage almost doubles. speciﬁcations. When ρ > 0.5, the voltage wave is nearly exponential in The minimum value of the snubber resistor depends on the dV shape. The maximum instantaneous ------occurs at t = 0. type of thyristor, triggering quadrants, gate current ampli- dt There is little time delay and moderate voltage overshoot. tude, voltage, repetitive or non-repetitive operation and required life expectancy. There is no simple way to predict the rate of current rise because it depends on turn-on speed dV When ρ > 1.0, the snubber resistor is large and ------depends dt of the thyristor, circuit layout, type and size of snubber mostly on its value. There is some overshoot even though the capacitor, and inductance in the snubber resistor. The circuit is overdamped. equations in Appendix D describes the circuit. However,

6 REV. 4.01 6/24/02 APPLICATION NOTE AN-3008 the values required for the model are not easily obtained Snubber operation relies on the charging of the snubber except by testing. Therefore, reliability should be veriﬁed in capacitor. Turn-off snubbers need a minimum conduction the actual application circuit. angle long enough to discharge the capacitor. It should be at least several time constants (RS CS). Table 1 shows suggested minimum resistor values estimated (Appendix A) by testing a 20 piece sample from the four Stored Energy different TRIAC die sizes. Inductive Switching Transients

Table 1. Minimum Non-inductive Snubber Resistor for 1 2 E = --- L I Watt-seconds or Joules Four Quadrant Triggering. 2 O dl IO = current in Amperes ﬂowing in the inductor at t = 0. Peak VC dt Resonant charging cannot boost the supply voltage at turn- TRIAC Type Volts RS Ohms A/µS off by more than 2. If there is an initial current ﬂowing in the Non-Sensitive 200 3.3 170 load inductance at turn-off, much higher voltages are possi- Gate 300 6.8 250 ble. Energy storage is negligible when a TRIAC turns off (I > 10mA) 400 11 308 GT because of its low holding or recovery current. 8 to 40 A(RMS) 600 39 400 800 51 400 The presence of an additional switch such as a relay, thermo- stat or breaker allows the interruption of load current and the dl Reducing dt generation of high spike voltages at switch opening. The energy in the inductance transfers into the circuit capacitance dI TRIAC ----- can be improved by avoiding quadrant 4 dt and determines the peak voltage (Figure 15). triggering. Most optocoupler circuits operate the TRIAC in quadrants 1 and 3. Integrated circuit drivers use quadrants 2 L and 3. Zero crossing trigger devices are helpful because they I prohibit triggering when the voltage is high. R OPTIONAL

VPK Driving the gate with a high amplitude fast rise pulse C FAST dI increases ----- capability. The gate ratings section deﬁnes the dt SLOW maximum allowed current.

dV I L dI =V = I Inductance in series with the snubber capacitor reduces ----- . dt C PK C dt It should not be more than ﬁve percent of the load inductance (a.) Protected Circuit (b.) Unprotected Circuit dV to prevent degradation of the snubber’s ------suppression dt Figure 15. Interrupting Inductive Load Current capability. Wirewound snubber resistors sometimes serve this purpose. Alternatively, a separate inductor can be added Capacitor Discharge in series with the snubber capacitor. It can be small because 1 2 The energy stored in the snubber capacitor EC = ---CV it does not need to carry the load current. For example, 18 2 transfers to the snubber resistor and thyristor every time it turns of AWG No. 20 wire on a T50-3 (1/2 inch) powdered turns on. The power loss is proportional to frequency iron core creates a non-saturating 6.0 µH inductor. (PAV = 120 EC @ 60 HZ).

A 10 ohm, 0.33 µF snubber charged to 650 volts resulted in a Current Diversion dI 1000 A/µs ----- . Replacement of the non-inductive snubber dt The current ﬂowing in the load inductor cannot change resistor with a 20 watt wirewound unit lowered the rate of instantly. This current diverts through the snubber resistor rise to a non-destructive 170 A/µs at 800 V. The inductor dV causing a spike of theoretically inﬁnite ------with magnitude gave an 80 A/µs rise at 800 V with the non-inductive resistor. dt equal to (IRRMR) or (IHR). The Snubber Capacitor A damping factor of 0.3 minimizes the size of the snubber Load Phase Angle dV capacitor for a given value of ------. This reduces the cost and dV dt Highly inductive loads cause increased voltage and ------at dt c physical dimensions of the capacitor. However, it raises turn-off. However, they help to protect the thyristor from voltage causing a counter balancing cost increase. dV transients and ------. The load serves as the snubber dt s

REV. 4.01 6/24/02 7 AN-3008 APPLICATION NOTE

inductor and limits the rate of inrush current if the device 2.8 dV does turn on. Resistance in the load lowers ------and VPK 2.6 dt E (Figure 16). 2.4 0-63% dV dt dV 2.2 dV dt 1.4 2.2 dt MAX E 2.0 dV 2.1 dt 1.8 1.2 2 10-63% VPK 1.6 1.9 1.4 1 1.8 VPK M = 1 M = 0.75 1.2 10-63% 1.7 dV dt dV 1.0 dt

) 0.8 1.6 0 0.8

1.5 /E / (E W

M = 0.5 PK 0.6 V 0.6 1.4 NORMALIZED PEAK VOLTAGE AND dt dV 0.4 NORMALIZED dV M = 0.25 1.3 dt 0.2 o 0.4 1.2

NORMALIZED PEAK VOLTAGE 0 M = 0 1.1 0 0.2 0.4 0.6 0.8 1.0 2.2 1.4 1.6 1.8 2.0 ρ 0.2 1 DAMPING FACTOR ( ) (RL = 0, M = 1, IRRM = 0) M = RS / (RL + RS) 0.9 dV dV/dt VPK NORMALIZED= NORMALIZED VPK = 0 dt E ω0 E 0 0.2 0.4 0.6 0.8 1 DAMPING FACTOR dV Figure 18. Trade-Off Between VPK and dt R M = RESISTIVE DIVISION RATIO = S RL + RS IRRM = 0 dV A variety of wave parameters (Figure 18) describe ------. dt dV Some are easy to solve for and assist understanding. These Figure 16. 0 to 63% dt dV dV include the initial ------, the maximum instantaneous ------, and dt dt Characteristics Voltage Waves dV the average ------to the peak reapplied voltage. The 0 to 63% Damping factor and reverse recovery current determine the dt dV dV shape of the voltage wave. It is not exponential when the ------and 10 to 63% ------definitions on device data sheets dt dt snubber damping factor is less than 0.5 (Figure 17) or when s c are easy to measure but difficult to compute. significant recovery currents are present.

ρ = 0 ρ = 0.1 Non-Ideal Behaviors 500 400 Core Losses 300 0.1 The magnetic core materials in typical 60 Hz loads introduce (VOLTS) 200 0.3 ρ = 0.3 ρ = 1 losses at the snubber natural frequency. They appear as a

2-1 1

MT 100 resistance in series with the load inductance and winding dc V 0 0 dV 0 0.7 1.4 2.1 2.8 3.5 4.2 4.9 5.6 6.3 7 resistance (Figure 19). This causes actual ------to be less than dt µ TIME ( s) the theoretical value. dV 0-63% = 100 V/µs, E = 250 V, dt s RL = 0, IRRM = 0

Figure 17. Voltage Waves for Different Damping Factors

8 REV. 4.01 6/24/02 APPLICATION NOTE AN-3008

Core remanence and saturation cause surge currents. They LR depend on trigger angle, line impedance, core characteristics, and direction of the residual magnetization. For example, a 2.8 kVA 120 V 1:1 transformer with a 1.0 ampere load

C produced 160 ampere currents at start-up. Soft starting the circuit at a small conduction angle reduces this current.

L DEPENDS ON CURRENT AMPLITUDE, CORE Transformer cores are usually not gapped and saturate SATURATION easily. A small asymmetry in the conduction angle causes R INCLUDES CORE LOSS, WINDING R. INCREASES WITH FREQUENCY magnetic saturation and multi-cycle current surges. C WINDING CAPACITANCE. DEPENDS ON INSULATION, WIRE SIZE, GEOMETRY Steps to achieve reliable operation include:

Figure 19. Inductor Model 1. Supply sufficient trigger current amplitude. TRIACS have different trigger currents depending on their quad- Complex Loads rant of operation. Marginal gate current or optocoupler LED current causes halfwave operation. Many real-world inductances are non-linear. Their core materials are not gapped causing inductance to vary with 2. Supply sufficient gate current duration to achieve current amplitude. Small signal measurements poorly latching. Inductive loads slow down the main terminal characterize them. For modeling purposes, it is best to current rise. The gate current must remain above the measure them in the actual application. specified IGT until the main terminal current exceeds the latching value. Both a resistive bleeder around the load Complex load circuits should be checked for transient volt- and the snubber discharge current help latching. ages and currents at turn-on and turn-off. With a capacitive dV load, turn-on at peak input voltage causes the maximum 3. Use a snubber to prevent TRIAC ------failure. surge current. Motor starting current runs 4 to 6 times the dt c steady state value. Generator action can boost voltages above 4. Minimize designed-in trigger asymmetry. Triggering the line value. Incandescent lamps have cold start currents 10 must be correct every half-cycle including the first. to 20 times the steady state value. Transformers generate Use a storage scope to investigate circuit behavior voltage spikes when they are energized. Power factor correc- during the first few cycles of turn-on. Alternatively, tion get the gate circuit up and running before energizing circuits and switching devices create complex loads. In most the load. cases, the simple CRL model allows an approximate snubber design. However, there is no substitute for testing and mea- 5. Derive the trigger synchronization from the line instead suring the worst case load conditions. of the TRIAC main terminal voltage. This avoids regen- erative interaction between the core hysteresis and the Surge Currents in Inductive Circuits triggering angle preventing trigger runaway, halfwave operation, and core saturation. Inductive loads with long L/R time constants cause asym- metric multi-cycle surges at start up (Figure 20). Triggering 6. Avoid high surge currents at start-up. Use a current at zero voltage crossing is the worst case condition. The probe to determine surge amplitude. Use a soft start surge can be eliminated by triggering at the zero current circuit to reduce inrush current. crossing angle. Distributed Winding Capacitance 20 MHY There are small capacitances between the turns and layers of i 240 0.1 a coil. Lumped together, they model as a single shunt capaci- VAC Ω tance. The load inductor behaves like a capacitor at frequencies above its self-resonance. It becomes ineffective in dV controlling ------and V when a fast transient such as that dt PK 90 resulting from the closing of a switch occurs. This problem can be solved by adding a small snubber across the line. 0 Self-Capacitance ZERO VOLTAGE TRIGGERING, IRMS = 30 A i (AMPERES) dV A thyristor has self-capacitance which limits ------when the 40 80 120 160 200 dt TIME (MILLISECONDS) load inductance is large. Large load inductances, high power factors, and low voltages may allow snubberless Figure 20. Start-Up Surge For Inductive Circuit operation.

REV. 4.01 6/24/02 9 AN-3008 APPLICATION NOTE

Snubber Examples 1A, 60Hz Without Inductance 10V/µs L = 318 MHY Rin 1 6 180 2.4k 170V Power TRIAC Example VCC 2 MOC R1 R2 T2322D Figure 2l shows a transient voltage applied to a TRIAC 3020 0.1µF C1 1V/µs controlling a resistive load. Theoretically there will be an 3021 4 instantaneous step of voltage across the TRIAC. The only φ CNTL elements slowing this rate are the inductance of the wiring dV (0.63) (170) and the self-capacitance of the thyristor. There is an expo- 0.63 (170) DESIGN== 0.45V/µs nential capacitor charging component added along with a dt (2400) (0.1µF) decaying component because of the IR drop in the snubber µ TIME resistor. The non-inductive snubber circuit is useful when the 240 s dV load resistance is much larger than the snubber resistor. (V/µs) dt Power TRIAC Optocoupler 0.99 0.35 RL

E e RS Figure 22. Single Snubber For Sensitive Gate TRIAC and Phase Controllable Optocoupler (ρ = 0.67) CS The optocoupler conducts current only long enough to trig- τ = (R + R ) C e L S S ger the power device. When it turns on, the voltage between E MT2 and the gate drops below the forward threshold voltage of the opto-TRIAC causing turn-off. The optocoupler sees RS V = E step R + R dV S L ------when the power TRIAC turns off later in the conduc- TIME dt s t = 0 tion cycle at zero current crossing. Therefore, it is not neces- dV RS – t/τ – t/τ  e(t = o+) = E e + (1 – e ) sary to design for the lower optocoupler ------rating. In this RS + RL dt c RESISTOR CAPACITOR example, a single snubber designed for the optocoupler COMPONENT COMPONENT protects both devices.

Figure 21. Non-inductive Snubber Circuit 1MHY

Opto-TRIAC Examples 100 VCC Single Snubber, Time Constant Design 430 1N4001 MCR265-4 120V Figure 22 illustrates the use of the RC time constant design 1 4 400 Hz method. The optocoupler sees only the voltage across the 2 5 3 6 51 MCR265-4 snubber capacitor. The resistor R1 supplies the trigger MOC3031 0.022 µF current of the power TRIAC. A worst case design procedure 100 assumes that the voltage across the power TRIAC changes 1N4001 instantly. The capacitor voltage rises to 63% of the maxi- (50 V/µs SNUBBER, ρ = 1.0) mum in one time constant. Then: Figure 23. Anti-Parallel SCR Driver τ 0.63 E dV dV R1CS ==------where ------is the rated static ------dV dt s dt Octocouplers with SCRs ------dt s dV Anti-parallel SCR circuits result in the same ------across the dt for the optocoupler. optocoupler and SCR (Figure 23). Phase controllable opto- dV couplers require the SCRs to be snubbed to their lower ------dt rating. Anti-parallel SCR circuits are free from the charge storage behaviors that reduce the turn-off capability of TRIACs. Each SCR conducts for a half-cycle and has the next half cycle of the ac line in which to recover. The turn-off dV ------of the conducting SCR becomes a static forward block- dt dV dV ing ------for the other device. Use the SCR data sheet ------dt dt s rating in the snubber design.

10 REV. 4.01 6/24/02 APPLICATION NOTE AN-3008

A SCR used inside a rectiﬁer bridge to control an ac load The current through the snubber resistor is: will not have a half cycle in which to recover. The available t time decreases with increasing line voltage. This makes the V –τ-- i = ------1e– , circuit less attractive. Inductive transients can be suppressed Rτ by a snubber at the input to the bridge or across the SCR. However, the time limitation still applies. and the voltage across the TRAIC is:

dV Opto () e = i RS dt c Zero-crossing optocouplers can be used to switch inductive The voltage wave across the TRIAC has an exponential rise loads at currents less than 100 mA (Figure 24). However a with maximum rate at t = 0. Taking its derivative gives its power TRIAC along with the optocoupler should be used for value as: higher load currents. dV VRS ------= ------dt 0 L 80

70 Highly overdamped snubber circuits are not practical designs. The example illustrates several properties: 60 CS = 0.01 50 1. The initial voltage appears completely across the circuit inductance. Thus, it determines the rate of change of 40 dV current through the snubber resistor and the initial ------. 30 CS = 0.001 dt This result does not change when there is resistance in 20 the load and holds true for all damping factors.

LOAD CURRENT (mA RMS) NO SNUBBER 10

0 2. The snubber works because the inductor controls the 20 30 40 50 60 70 80 90 100 rate of current change through the resistor and the rate TA, AMBIENT TEMPERATURE (°C) of capacitor charging. Snubber design cannot ignore the Ω (RS = 100 , VRMS = 220V, POWER FACTOR = 0.5) inductance. This approach suggests that the snubber capacitance is not important but that is only true for Figure 24. MOC3062 Inductive Load Current versus TA this hypothetical condition. The snubber resistor shunts the thyristor causing unacceptable leakage when the A phase controllable optocoupler is recommended with a capacitor is not present. If the power loss is tolerable, power device. When the load current is small, a MAC97 dV ------can be controlled without the capacitor. An example TRIAC is suitable. dt is the soft-start circuit used to limit inrush current in Unusual circuit conditions sometimes lead to unwanted switching power supplies (Figure 25). dV operation of an optocoupler in ------mode. Very large dt c Snubber with no C currents in the power device cause increased voltages between MT2 and the gate that hold the optocoupler on. RS E Use of a larger TRIAC or other measures that limit inrush RECTIFIER current solve this problem. AC LINE SNUBBER BRIDGE C1 L G ER Very short conduction times leave residual charge in the dV = S dt φ optocoupler. A minimum conduction angle allows recovery L RS before voltage reapplication. E RECTIFIER AC LINE SNUBBER BRIDGE C1 The Snubber with Inductance L G Consider an overdamped snubber using a large capacitor whose voltage changes insigniﬁcantly during the time under Figure 25. Surge Current Limiting consideration. The circuit reduces to an equivalent L/R series For a Switching Power Supply charging circuit.

REV. 4.01 6/24/02 11 AN-3008 APPLICATION NOTE

dV dV TRIAC Design Procedure Safe Area Curve ()dt c ()dt c Figure 26 shows a MAC16 TRIAC turn-off safe operating 1. Refer to Figure 18 and select a particular damping factor area curve. Turn-off occurs without problem under the curve. dV (ρ)giving a suitable trade-off between V and ------. dV dI PK dt The region is bounded by static ------at low values of ----- dt dt dV c Determine the normalized ------corresponding to the dt and delay time at high currents. Reduction of the peak cur- chosen damping factor. rent permits operation at higher line frequency. This TRIAC ° operated at f = 400 Hz, TJ = 125 C, and ITM = 6.0 amperes The volage E depends on the load phase angle: using a 30 ohm and 0.068 µF snubber. Low damping factors dI X extend operation to higher ----- , but capacitor sizes φ φ –1 L dt c E= 2 VRMS Sin ( ) where = tan ------where RL increase. The addition of a small, saturable commutation inductor extends the allowed current rate by introducing φ = measured phase angle between line V and load I recovery delay time. RL = measured dc resistance of the load.

Then -ITM = 15A V RMS 2 2 2 2 100 Z ==------RL + XL XL Z – RL and IRMS dl = 6 f ITM x 10-3 A/ms dt c XL L = ------π 2 fLine s) 10 µ (V/ If only the load current is known, assume a pure c dt dV WITH COMMUTATION L

inductance. This gives a conservative design. Then: 1

VRMS L ==------π where E 2 VRMS 2 fLINE IRMS 0.1 For Example: 10 14 18 22 26 30 34 38 42 46 50 dV AMPERES/MILLISECOND dt c 120 E== 2 120 170 V; L =------=39.8 mH ()8 A ()377 rps MAC 16-8, COMMUTATIONAL L = 33 TURNS #18, 52000-1A TAPE WOUND CORE 3/4 INCH OD Read from the graph at ρ = 0.6, V = (1.25) 170 = 213V. PK dV dl ° Figure 26. ()dt versus ()dt TJ = 125 C dV c c Use 400V TRIAC. Read ------= 1.0 dt ()ρ = 0.6 dV Static Design 2. Apply the resonance criterion: dt ω dV ⁄ dV There is usually some inductance in the ac main and power 0 = spec------------E dt dt ()P wiring. The inductance may be more than 100 µH if there is 6 a transformer in the circuit or nearly zero when a shunt 510× V/S 3 ω ==------29.4× 10 rps power factor correction capacitor is present. Usually the line 0 ()1 ()170 V inductance is roughly several µH. The minimum inductance 1 must be known or deﬁned by adding a series inductor to C ==------0.029 µF ω 2 insure reliable operation (Figure 27). 0 L

3. Apply the damping criterion: One hundred µH is a suggested value for starting the design. Plug the assumed inductance into the equation for C. Larger –3 values of inductance result in higher snubber resistance and L 39.8× 10 R ==2ρ ---- 2() 0.6 ------=1400 ohms dI S C –6 reduced ----- . For example: 0.029× 10 dt

12 REV. 4.01 6/24/02 APPLICATION NOTE AN-3008

8A LOAD 10 0.33 µF R L 100 µH < 50 V/µs MAC 218-6 68Ω 20A 120V 60Hz LS1 0.033 µF

340 Ω dV dV V 12 = 100 V/µs = 5 V/µs HEATER dt s dt c

R LV V dV ρ step PK dt Ω MHY V V V/µs Figure 27. Snubbing for a Resistive Load 0.75 15 0.1 170 191 86 0.03 0 39.8 170 325 4.0 0.04 10.6 28.1 120 225 3.3 0.06 13.5 17.3 74 136 2.6 Given E== 240 2 340V

Figure 28. Snubbing For a Variable Load Pick ρ = 0.3 Examples of Snubber Designs Then from Figure 18, VPK = 1.42 (340) = 483 V. dV Table 2 describes snubber RC values for ------. Figures 31 Thus, it will be necessary to use a 600 V device. Using the dt s previously stated formulas for ω0, C and R we ﬁnd: dV and 32 show possible R and C values for a 5.0 V/µs ------dt c 6 5010× V/S assuming a pure inductive load. ω ==------201450 rps 0 ()0.73 ()340 V dV 1 Table 2. Static Designs µ dt C ==------0.2464 F ρ 2 –6 (E = 340 V, V = 500 V, = 0.3) ()201450 ()100× 10 peak 5.0V/µs 50V/µs 100V/µs –6 100× 10 L C R C R C R R== 2() 0.3 ------12ohms –6 0.2464× 10 µH µF Ohm µF Ohm µF Ohm 47 0.15 10 Variable Loads 100 0.33 10 0.1 20 The snubber should be designed for the smallest load 220 0.15 22 0.03 47 dV inductance because ------will then be highest because of its 3 dt 500 0.06 51 0.01 110 dependance on ω0. This requires a higher voltage device for operation with the largest inductance because of the corre- 85 sponding low damping factor. 100 3.0 11 0.03 100 03 dV Figure 28 describes ------for an 8.0 ampere load at various dt power factors. The minimum inductance is a component dV added to prevent static ------ﬁring with a resistive load. dt

REV. 4.01 6/24/02 13 AN-3008 APPLICATION NOTE

Transient and Noise Suppression The natural frequencies and impedances of indoor ac wiring result in damped oscillatory surges with typical frequencies Transients arise internally from normal circuit operation or ranging from 30 kHz to 1.5 MHz. Surge amplitude depends externally from the environment. The latter is particularly on both the wiring and the source of surge energy. Distur- frustrating because the transient characteristics are unde- bances tend to die out at locations far away from the source. ﬁned. A statistical description applies. Greater or smaller Spark-over (6.0 kV in indoor ac wiring) sets the maximum stresses are possible. Long duration high voltage transients voltage when transient suppressors are not present. Tran- are much less probable than those of lower amplitude and sients closer to service entrance or in heavy wiring have higher frequency. Environments with infrequent lightning higher amplitudes, longer durations, and more damping and load switching see transient voltages below 3.0 kV. because of the lower inductance at those locations.

10K The simple CRL snubber is a low pass ﬁlter attenuating frequencies above its natural resonance. A steady state sinu- 0.6A RMS 2.5A soidal input voltage results in a sine wave output at the same frequency. With no snubber resistor, the rate of roll off 5A approaches 12 dB per octave. The corner frequency is at 1000 10A the snubber’s natural resonance. If the damping factor is low, the response peaks at this frequency. The snubber 20A resistor degrades ﬁlter characteristics introducing an up-turn at ω = 1/(RC). The roll-off approaches 6.0 dB/octave at (OHMS) 40A S

R frequencies above this. Inductance in the snubber resistor further reduces the roll-off rate. 100 80A Figure 32 describes the frequency response of the circuit in Figure 27. Figure 31 gives the theoretical response to a 3.0 kV 100 kHz ring-wave. The snubber reduces peak voltage across the thyristor. However, the fast rise input causes a 10

dV 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 high ------step when series inductance is added to the snubber dt DAMPING FACTOR resistor. Limiting the input voltage with a transient suppressor reduces the step. PURE INDUCTIVE LOAD, V = 120 VRMS, IRRM = 0

400 dV WITHOUT 5 µHY Figure 29. Snubber Resistor For = 5.0 V/µs ()dt c WITH 5 5 µHY AND 450V MOV AT AC INPUT

1 (VOLTS) 0 2-1

MT WITH 5 µHY 80A RMS V -400 01 2 3 4 56 40A TIME (µs) 0.1 20A Figure 31. Theoretical Response of Figure 33 Ω Circuit to 3.0 kV IEEE 587 Ring Wave (RSC = 27.5 ) 10A (µF) S

C +10 5A

0.01 2.5A 0

-10 100µH 0.6A WITH 5µHY -20 5µH 0.001 Vin Vout

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 GAIN (dB) VOLTAGE -30 10 DAMPING FACTOR 12 0.33µF WITHOUT 5µHY

-40 PURE INDUCTIVE LOAD, V = 120 VRMS, 10K 100K 1M I = 0 RRM FREQUENCY (Hz) dV V Figure 30. Snubber Capacitor For () = 5.0 V/µs Figure 32. Snubber Frequency Response out dt c ()Vin

14 REV. 4.01 6/24/02 APPLICATION NOTE AN-3008

dV In Figure 32, there is a separate suppressor across each The noise induced into a circuit is proportional to ------when dt thyristor. The load impedance limits the surge energy deliv- dI coupling is by stray capacitance, and ----- when the coupling ered from the line. This allows the use of a smaller device dt but omits load protection. This arrangement protects each is by mutual inductance. Best suppression requires the use of thyristor when its load is a possible transient source. a voltage limiting device along with a rate limiting CRL snubber. The thyristor is best protected by preventing turn-on dV from ------or breakover. The circuit should be designed for dt what can happen instead of what normally occurs.

In Figure 30, a MOV connected across the line protects many parallel circuit branches and their loads. The MOV dI deﬁnes the maximum input voltage and ----- through the load. dt dV With the snubber it sets the maximum ------and peak voltage dt across the thyristor. The MOV must be large because there is Figure 34. Limiting Thyristor Voltage little surge limiting impedance to prevent its burn-out. It is desirable to place the suppression device directly across the source of transient energy to prevent the induction of energy into other circuits. However, there is no protection for energy injected between the load and its controlling thyristor. Placing the suppressor directly across each thyristor positively limits maximum voltage and snubber VMAX dI discharge ----- . dt

Figure 33. Limiting Line Voltage

REV. 4.01 6/24/02 15 AN-3008 APPLICATION NOTE

Examples of Snubber Applications REV

91 0.1 3.75 In Figure 35, TRIACs switch a 3 phase motor on and off and 46 V/µs LS 330V reverse its rotation. Each TRIAC pair functions as a SPDT MAX switch. The turn-on of one TRIAC applies the differential FWD 500µH 5.6 0.1 voltage between line phases across the blocking device with- 91 MOTOR 1/70 HP out the beneﬁt of the motor impedance to constrain the rate R S CS 0.26A dV 115 of voltage rise. The inductors are added to prevent static ------dt T2323D ﬁring and a line-to-line short.

Figure 36 shows a split phase capacitor-run motor with reversing accomplished by switching the capacitor in series Figure 36. Split Phase Reversing Motor with one or the other winding. The forward and reverse TRIACs function as a SPDT switch. Reversing the motor Figure 37 shows a “tap changer.” This circuit allows the applies the voltage on the capacitor abruptly across the operation of switching power supplies from a 120 or 240 blocking thyristor. Again, the inductor L is added to prevent vac line. When the TRIAC is on, the circuit functions as a dV conventional voltage doubler with diodes D and D con- ------ﬁring of the blocking TRIAC. If turn-on occurs, 1 2 dt s ducting on alternate half-cycles. In this mode of operation, the forward and reverse TRIACs short the capacitors (CS) dI inrush current and ----- are hazards to TRIAC reliability. resulting in damage to them. It is wise to add the resister RS dt to limit the discharge current. Series impedance is necessary to prevent damage to the TRIAC.

SNUBBER

φ1 21 22Ω 100µH 2W

G 300 WIREWOUND 91 4 MOC 6 3081 0.15 µ FWD F SNUBBER

21 SNUBBER G ALL MOV’s ARE 275 300 VRMS ALL TRIACS ARE 91 4 MOC 6 MAC218-10 3081 REV 1/3 HP 208V SNUBBER 3 PHASE 91

φ2 21 G 6 1 100µH G

300 MOC SNUBBER 2 91 3081 4 MOC 6 3081 4 FWD 43 SNUBBER

G 300 91 4 MOC 6 3081 φ3 REV

Figure 35. 3 Phase Reversing Motor

16 REV. 4.01 6/24/02 APPLICATION NOTE AN-3008

The TRIAC is off when the circuit is not doubling. In this Appendix A state, the TRIAC sees the difference between the line voltage and the voltage at the intersection of Cl and C2. Transients dV dI on the line cause ------ﬁring of the TRIAC. High inrush Testing Snubber Discharge dt s dt dI current, ----- and overvoltage damage to the ﬁlter capacitor are The equations in Appendix D do not consider the thyristor’s dt possibilities. Prevention requres the addition of a RC snub- turn-on time or on-state resistance, thus, they predict high dI ber across the TRIAC and an inductor in series with the line. values of ----- . dt SUBBER INDUCTOR Figure 38 shows the circuit used to test snubber discharge D1 D2 dI + ----- . A MBS4991 supplies the trigger pulse while the C1 dt 120 VAC – D quadrants of operation are switch selectable. The snubber OR 3 D 240 VAC 4 was mounted as close to the TRIAC under test as possible to RL reduce inductance, and the current transformer remained in 240V 0 the circuit to allow results to be compared with the measured G + C2 dI 120V – ----- value. dt RS CS What should the peak capacitor voltage be? A conservative Figure 37. Tap Changer For Dual approach is to test at maximum rated VDRM, or the clamp Voltage Switching Power Supply voltage of the MOV.

Thyristor Types What is the largest capacitor that can be used without limiting resistance? Figure 39 is a photo showing the the current Sensitive gate thyristors are easy to turn-on because of their pulse resulting from a 0.001 µF capacitor charged to 800 V. low trigger current requirements. However, they have less dI dV The 1200 A/µs ----- destroyed the TRIAC. ------capability than similar non-sensitive devices. A non- dt dt dV sensitive thyristor should be used for high ------. Is it possible for MOV self-capacitance to damage the dt TRIAC? A large 40 Joule, 2200 A peak current rated MOV was tested. The MOV measured 440 pF and had an 878 volt dV TRIAC commutating ------ratings are 5 to 20 times less than breakover voltage. Its peak discharge current (12 A) was half dt that of a 470 pF capacitor. This condition was safe. dV static ------ratings. dt

dV Phase controllable optocouplers have lower ------ratings than dt zero crossing optocouplers and power TRIACS. These should be used when a dc voltage component is present, or to prevent turn-on delay.

dV Zero crossing optocouplers have more ------capability than dt power thyristors; and they should be used in place of phase controllable devices in static switching applications.

REV. 4.01 6/24/02 17 AN-3008 APPLICATION NOTE

2000 OPTIONAL PEARSON 500W 411 CURRENT TRANSFORMER

RS 50 Ω OPTIONAL MOV 5000 2.5kV 200W MT 120 VAC 60Hz 2 X100 VTC V PROBE 5-50 G 56 SWEEP FOR MT CS 1 DESIRED VCi TRIAC UNDER TEST 91

3000

VMT2-1

21 12 V MBS4991 1 Q Q VG 1,3 2,4 µF 34 QUADRANT SWITCH QUADRANT MAP

dI Figure 38. Snubber Discharge dt Test

Appendix B dV Measuring ()dt s dV Figure 40 shows a test circuit for measuring the static ------dt of power thyristors. A 1000 volt FET switch insures that the voltage across the device under test (D.U.T.) rises rapidly from zero. A differential preamp allows the use of a N-chan- nel device while keeping the storage scope chassis at ground for safety purposes. The rate of voltage rise is adjusted by a variable RC time constant. The charging resistance is low to avoid waveform distortion because of the thyristor’s self- capacitance but is large enough to prevent damage to the dI D.U.T. from turn-on ----- . Mounting the miniature range dt HORIZONTAL SCALE – 50 ms/DIV. VERTICAL SCALE – 10 A/DIV. switches, capacitors, and G-K network close to the device CS = 0.001 µF, VCi = 800 V, RS = 0, L = 250 mH, RTRIAC = 10 OHMS under test reduces stray inductance and allows testing at more than 10 kV/µs. Figure 39. Discharge Current From 0.001 µF Capacitor

18 REV. 4.01 6/24/02 APPLICATION NOTE AN-3008

27 V /V SELECT DRM RRM 2W 1000 10 WATT WIREWOUND X100 PROBE 2 DUT DIFFERENTIAL 20k 2W 0.33 1000V PREAMP 0.047 1000V X100 PROBE G 1

RGK 470pF

dV MOUNT DUT ON dt 0.001 TEMPERATURE CONTROLLED VERNIER 100 Cµ PLATE 2W 0.005 1 MEG 2W EACH 1.2 MEG 82 0.01 2W 2W POWER TEST 0.047

1N914 0.1

MTP1N100 20V 0.47 0-1000V 10mA 56 2W 1000 1N967A f = 10 Hz 1/4W 18V PW = 100 µs 50 Ω PULSE GENERATOR

ALL COMPONENTS ARE NON-INDUCTIVE UNLESS SHOWN

dV Figure 40. Circuit For Static dt Measurement of Power Thyristors Appendix C Commercial chokes simplify the construction of the neces- dV sary inductors. Their inductance should be adjusted by Measuring increasing the air gap in the core. Removal of the magnetic ()dt c pole piece reduces inductance by 4 to 6 but extends the cur- dV rent without saturation. A test ﬁxture to measure commutating ------is shown in dt Figure 41. It is a capacitor discharge circuit with the load The load capacitor consists of a parallel bank of 1500 Vdc series resonant. The single pulse test aids temperature control non-polar units, with individual bleeders mounted at each and allows the use of lower power components. The limited capacitor for safety purposes. energy in the load capacitor reduces burn and shock hazards. The conventional load and snubber circuit provides recovery An optional adjustable voltage clamp prevents TRIAC break- and damping behaviors like those in the application. down.

The voltage across the load capacitor triggers the D.U.T. It dV To measure ------, synchronize the storage scope on the terminates the gate current when the load capacitor voltage dt c crosses zero and the TRIAC current is at its peak. current waveform and verify the proper current amplitude and period. Increase the initial voltage on the capacitor to compensate for losses within the coil if necessary. Adjust the Each VDRM, ITM combination requires different components. Calculate their values using the equations given in Figure 41. snubber until the device fails to turn off after the ﬁrst half- cycle. Inspect the rate of voltage rise at the fastest passing condition.

REV. 4.01 6/24/02 19 AN-3008 APPLICATION NOTE

HG = W AT LOW LD10-1000-1000

+CLAMP -CLAMP NON-INDUCTIVE LL RL RESISTOR DECADE 0-10k, 1Ω STEP TRIAD C30X Ω 51k 50H, 3500 2W 910k

MR760 2W Q3 Q1

51k 2W 2.2M 2.2M, 2W 2.2M 2.2M, 2W 910k F 2.2M µ R 2W S + 1.5kV 2N3904 2N3906 62µF 0.01 6.2 MEG 2W (NON-POLAR) – 1kV L

+ C – 70mA 0.01 0.01

120 120 6.2 MEG 2W 2.2M

F, 100pF – 1/2W 1/2W 150k MR760 MR760 µ 0-1 kV 20 mA 2N3906 2N3904 1 –

Q3 Q1 2N3906 2N3904 F, 0.01 -5 +5 µ 0.1 0.1 PEARSON 10

– 301 X 3601/2W 360 1/2W 2N3904 2N3906 1k 1k 2 CASE 2N3904 CONTROLLED HEATSINK 1 – + 51 2W 2N3906 CS +5 51 2W -5 G 56 2 WATT Q3 Q1

CAPACITOR DECADE 1 TRIAC 0.22 0.22 dV UNDER 270k 1N5343 dt 2.2k TEST 7.5V 1/2 270k SYNC

I I T V T2 I PK P Ci dl -6 CL =L= L ==2 W0 = =6f IPK x 10 W0 VCi 2π VCi W0 IPK 4π CL dt c LL A/µs

dV Figure 41. Test Circuit for Power TRIACs ()dt c Appendix D dV Derivations dt Deﬁnitions

1.0 RT = RL + RS= Total Resistan ce

R 1.1 M = ------S-= Snubber Divider Ratio RT

ω 1 1.2 0 = ------= Undamped Natural Frequency LCS ω = Damped Natural Frequency R 1.3 α = ------T-= Wave Decrement Factor 2L 2 2 12⁄ LI Initial Energy In Inductor χ = ------= ------1.4 2 12CV⁄ Final Energy In Capaitor

I L χ = ------= Initial Current Factor 1.5 E C

RT C α ρ = ------= ------= Damping Factor 1.6 2 L ω0

1.7 V ==ER– I Initial voltage drop at t = 0 across the load OL S

20 REV. 4.01 6/24/02 APPLICATION NOTE AN-3008

I ER 1.8 ξ = ------– ------L- CS L dV dV ------= initial instantaneous ------at t = 0, ignoring any instantaneous voltage step at dt 0 dt t = 0 because of IRRM R dV T ξ 1.9 ------= VOL------+ . For All Damping Conditions dt 0 L ER , dV S 2.0 When I== 0 ------dt 0 L

dV dV ------= Maximum Instantaneous ------dt max dt dV t = Time of maximum instantaneous ------max dt

tpeak = Time of maximum instantaneous peak voltage across thyristor

dV Average ------==V ⁄ t Slope of the secant line from t = 0 through V dt PK PK PK

VPK = Maximum instantaneous voltage across the thyristor.

Constants (depending on the damping factor):

2.1 No Damping (ρ = 0 ) ωω = 0 αρ RT ===0

2.2 Underdamped () 0 <<ρ 1

2 2 2 ωω==0 – α ω01– ρ

2.3 Critial Damped ()ρ = 1

αω, ω , L 2 ===0 0R 2 ----, C = ------α - C RT

2.4 Overdamped ()ρ > 1

2 2 2 ωα==– ω0 ω0 ρ – 1

Laplace transforms for the current and voltage in Figure 42 are:

SV – ξ EL⁄ + SI E OL 3.0 i()S = ------; e = --- – ------2 RT 1 S 2 RT 1 S + S------+ ------S + ------S + ------L LC L LC

RL L

t = 0 + I RS e – CS

INITIAL CONDITIONS I = IRRM VCS = 0

Figure 42. Equivalent Circuit for Load and Snubber

REV. 4.01 6/24/02 21 AN-3008 APPLICATION NOTE

The inverse laplace transform for each of the conditions gives:

Underdamped (Typical Snubber Design)

α αt ξ –αt 4.0 eEV= – Cos()ωt – ---- sin()ωt e – + ---- sin ()ωt e OL ω ω

2 2 de ()ω – α –αt α –αt 4.1 ------= V 2αCos()ωt + ------sin()ωt e + ξ Cos()ωt – ---- sin()ωt e dt OL ω ω

2αV 1 –1 O + ξ t = ----tan – ------L 4.2 PK ω 2 2 ω – α ξα V ------– ------OLω ω , , ω π When M== 0 RS 0I= 0; tPK =

α 2 2 2 4.3 V = E + ------– α t ω V ++2αξV ξ PK ω PK 0 OL OL 0 , , When I== 0 RL 0M= 1:

V –α 4.4 ------PK = ()1e+ t E PK dV V Average ------= ------PK dt tPK ω(αξ (ω 2 α2 )) 1 2 – VO – 3 t = ----ATN ------L 4.5 max ω 3 2 2 2 V ()ξαα – 3αω + ()– ω OL

dV 2ω 2 αξ ξ2 –αt max 4.6 ------= VO 0 + 2 VO + e dt max L L

No Damping

( ())ω I ()ω 5.0 eE1= – Cos 0t + ------ω- sin 0t C 0 de I ------= Eω sin()ω t + ----cos()ω t 5.1 dt 0 0 C 0

dV I 5.2 ------==---- 0 when I= 0 dt 0 C

π –1I – tan ------ω- 5.3 CE 0 tPK = ------ω 0 2 2 I 5.4 V = EE+ + ------PK ω 2 2 0 C

dV VPK 5.5 ------= ------dt AVG tPK ω I –10EC I π 5.6 tmax = ω------tan ------= ω------when I= 0 0 I 0 2

dV I 2ω 2 2 2 ω 5.7 ------= ---- E 0 C + I = 0E when I= 0 dt max C

22 REV. 4.01 6/24/02 APPLICATION NOTE AN-3008

Critical Damping

–αt –αt 6.0 eEV= – (1 – αt )e + ξte OL

de –αt 6.1 ------= []αV ()ξ2 – αt + ()1 – αt e dt OL ξ 2 + ------2VOL 6.2 tPK = ------ξ - α + ------V OL –α V = EV– []()ξ1 – α t – t e t 6.3 PK OL PK PK PK

dV V 6.4 Average ------= ------PK dt tPK

, , When I= 0 RS = 0M= 0 dV e(t) rises asymptotically to E. t and average ------do not exist. PK dt

α ξ 3 VO + 2 t = ------L - 6.5 max 2 α V + αξ OL , When I= 0 tmax = 0 R For ------S- ≥ 34⁄ RT

dV dV then ------= ------dt max dt 0 dV 6.6 ------dt max –αt = []αV ()ξ2 – α t + ()1– α t e max OL max max

Appendix E dI Snubber Discharge Derivations dt Overdamped V CSα–αt ()ω 1.0 i = ω------sinh t LS

C –α 1.1 i = V ------S e t PK CS PK LS

1 –1 ω 1.2 tPK = ω---- tanh ---α-

Critical Damped

VC –αt 2.0 i = ------S te LS V CS 2.1 iPK = 0.736------RS

REV. 4.01 6/24/02 23 AN-3008 APPLICATION NOTE

1 2.2 tPK = α---

Underdamped

V α CS – t ω ) 3.0 i = ω------e sin ( t LS

C –α 3.1 i = V ------Se t PK CS PK LS

1 –1 ω 3.2 tPK = ω----tan ---α-

RS LS

t = 0

VCS CS i

INITIAL CONDITIONS: i = 0, VCS = INITIAL VOLTAGE Figure 43. Equivalent Circuit for Snubber Discharge

No Damping V CS ()ω 4.0 i = ω------sin t LS

4.1 i = V ------PK CS LS π t = ------4.2 PK 2ω

Bibliography Bird, B. M. and K. G. King. An Introduction To Power Elec- Kervin, Doug. "The MOC3011 and MOC3021," EB-101, tronics. John Wiley & Sons, 1983, pp. 250–281. Motorola Inc., 1982.

Blicher, Adolph. Thyristor Physics. Springer-Verlag, 1976. McMurray, William. “Optimum Snubbers For Power Semi- condutors," IEEE Transactions On Industry Applications, Gempe, Horst. “Applications of Zero Voltage Crossing Opti- Vol.1A-8, September/October 1972. cally Isolated TRIAC Drivers,” AN982, Motorola Inc., 1987 Rice, L. R. “Why R-C Networks And Which One For Your “Guide for Surge Withstand Capability (SWC) Tests,” ANSI Converter,” Westinghouse Tech Tips 5-2. 337.90A-1974, IEEE Std 472–1974. “Saturable Reactor For Increasing Turn-On Switching Capa- “IEEE Guide for Surge Voltages in Low-Voltage AC Power bility,” SCR Manual Sixth Edition, General Electric, 1979. Circuits,” ANS1/lEEE C62.41 -1980, IEEE Std 587–1980 Zell, H. P. “Design Chart For Capacitor-Discharge Pulse dI Circuits," EDN Magazine, June 10, 1968. Ikeda, Shigeru and Tsuneo Araki. “The ----- Capability of dt Thyristors,” Proceedings of the IEEE, Vol.53, No.8, August 1967.

24 REV. 4.01 6/24/02 AN-3008 APPLICATION NOTE

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