MVME3100 Single Board Computer Programmer’s Reference P/N: 6806800G37C September 2019 © 2019 SMART Embedded Computing™, Inc. All Rights Reserved. Trademarks The stylized "S" and "SMART" is a registered trademark of SMART Modular Technologies, Inc. and “SMART Embedded Computing” and the SMART Embedded Computing logo are trademarks of SMART Modular Technologies, Inc. All other names and logos referred to are trade names, trademarks, or registered trademarks of their respective owners. These materials are provided by SMART Embedded Computing as a service to its customers and may be used for informational purposes only. Disclaimer* SMART Embedded Computing (SMART EC) assumes no responsibility for errors or omissions in these materials. These materials are provided "AS IS" without warranty of any kind, either expressed or implied, including but not limited to, the implied warranties of merchantability, fitness for a particular purpose, or non-infringement. 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Diablo Way, Suite 190 Tempe, Arizona 85282 USA *For full legal terms and conditions, visit www.smartembedded.com/ec/legal Table of Contents About this Manual ................................................................7 1 Board Description and Memory Maps ...........................................13 1.1 Introduction .............................................................13 1.2 Ordering and Support Information ...........................................13 1.3 MemoryMaps...........................................................17 1.3.1 Default Processor Memory Map........................................17 1.3.2 MOTLoad’s Processor Memory Map ....................................18 1.3.3 VME Memory Map ..................................................19 1.3.4 System I/O Memory Map .............................................19 1.3.5 System Status Register ..............................................21 1.3.6 System Control Register .............................................22 1.3.7 System Indicator Register ............................................23 1.3.8 Flash Control/Status Register .........................................24 1.3.9 PCI Bus Status Registers.............................................25 1.3.10 Interrupt Detect Register .............................................28 1.3.11 Presence Detect Register ............................................28 1.3.12 PLD Revision Register ...............................................29 1.3.13 PLD Data Code Register .............................................30 1.3.14 Test Register 1.....................................................30 1.3.15 Test Register 2.....................................................31 1.3.16 External Timer Registers .............................................31 1.3.16.1 Prescalar Register ..........................................31 1.3.16.2 Control Registers ...........................................32 1.3.16.3 Compare Registers .........................................33 1.3.16.4 Counter Registers ..........................................33 1.3.17 Geographical Address Register ........................................34 2 Programming Details .........................................................35 2.1 Introduction .............................................................35 2.2 MPC8540 Reset Configuration ..............................................36 2.3 MPC8540 Interrupt Controller ...............................................40 2.4 Local Bus Controller Chip Select Assignments .................................41 2.5 Two-Wire Serial Interface ..................................................41 2.6 User Configuration EEPROM ...............................................42 2.7 VPD EEPROM ..........................................................42 MVME3100 Single Board Computer Programmer’s Reference (6806800G37C) 3 Table of Contents 2.8 RTM VPD EEPROM ......................................................43 2.9 Ethernet PHY Address ....................................................43 2.10 Flash Memory ...........................................................43 2.11 PCI IDSEL Definition .....................................................44 2.12 PCI Arbitration Assignments ................................................46 2.13 Clock Distribution ........................................................47 2.14 MPC8540 Real-Time Clock Input ............................................48 2.15 MPC8540 LBC Clock Divisor ...............................................48 A Related Documentation .......................................................49 A.1 SMART Embedded Computing Documentation .................................49 A.2 Manufacturers’ Documents .................................................49 A.3 Related Specifications ....................................................51 4 MVME3100 Single Board Computer Programmer’s Reference (6806800G37C) List of Tables Table 1-1 MVME3100 Features Summary .........................................15 Table 1-2 MVME712-101 RTM Features Summary ..................................17 Table 1-3 Default Processor Address Map .........................................18 Table 1-4 MOTLoad’s Processor Address Map .....................................18 Table 1-5 System I/O Memory Map ..............................................19 Table 1-6 System Status Register ...............................................21 Table 1-7 System Control Register ...............................................22 Table 1-8 System Indicator Register ..............................................23 Table 1-9 Flash Control/Status Register ...........................................24 Table 1-10 PCI Bus A Status Register .............................................25 Table 1-11 PCI Bus B Status Register .............................................26 Table 1-12 PCI Bus C Status Register .............................................27 Table 1-13 Interrupt Detect Register ...............................................28 Table 1-14 Presence Detect Register ..............................................28 Table 1-15 PLD Revision Register ................................................29 Table 1-16 PLD Data Code Register ..............................................30 Table 1-17 Test Register 1 ......................................................30 Table 1-18 Test Register 2 ......................................................31 Table 1-19 Prescalar Register ...................................................31 Table 1-20 Tick Timer Control Registers ............................................32 Table 1-21 Tick Timer Compare Registers ..........................................33 Table 1-22 Tick Timer Counter Registers ...........................................33 Table 2-1 MPC8540 Power-on Reset Configuration Settings ...........................36 Table 2-2 MPC8540 Interrupt Controller ...........................................40 Table 2-3 LBC Chip Select Assignments ..........................................41 Table 2-4 I2C Bus Device Addressing ............................................41 Table 2-5 PHY Types and MII Management Bus Addresses ...........................43 Table 2-6 Flash Options .......................................................43 Table 2-7 IDSEL and Interrupt Mapping for PCI Devices ..............................44 Table 2-8 Planar PCI Device Identification .........................................46 Table 2-9 PCI Arbitration Assignments ............................................46 Table 2-10 Clock Assignments ...................................................47 Table A-1 SMART EC Documents ...............................................49 Table A-2 Manufacturers’ Documents .............................................49 Table A-3 Related Specifications ................................................51