DOCSLIB.ORG

Cyber Security Standards, Practices and Industrial Applications: Systems and Methodologies

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Cyber Security Standards, Practices and Industrial Applications: Systems and Methodologies Cyber Security Standards, Practices and Industrial Applications: Systems and Methodologies Junaid Ahmed Zubairi State University of New York at Fredonia, USA Athar Mahboob National University of Sciences & Technology, Pakistan Senior Editorial Director: Kristin Klinger Director of Book Publications: Julia Mosemann Editorial Director: Lindsay Johnston Acquisitions Editor: Erika Carter Development Editor: Michael Killian Production Editor: Sean Woznicki Typesetters: Adrienne Freeland Print Coordinator: Jamie Snavely Cover Design: Nick Newcomer Published in the United States of America by Information Science Reference (an imprint of IGI Global) 701 E. Chocolate Avenue Hershey PA 17033 Tel: 717-533-8845 Fax: 717-533-8661 E-mail: [email protected] Web site: http://www.igi-global.com Copyright © 2012 by IGI Global. All rights reserved. No part of this publication may be reproduced, stored or distributed in any form or by any means, electronic or mechanical, including photocopying, without written permission from the publisher. Product or company names used in this set are for identification purposes only. Inclusion of the names of the products or companies does not indicate a claim of ownership by IGI Global of the trademark or registered trademark. Library of Congress Cataloging-in-Publication Data Cyber security standards, practices and industrial applications: systems and methodologies / Junaid Ahmed Zubairi and Athar Mahboob, editors. p. cm. Includes bibliographical references and index. Summary: “This book details the latest and most important advances in security standards, introducing the differences between information security (covers the understanding of security requirements, classification of threats, attacks and information protection systems and methodologies) and network security (includes both security protocols as well as systems which create a security perimeter around networks for intrusion detection and avoidance)”--Provided by publisher. ISBN 978-1-60960-851-4 (hbk.) -- ISBN 978-1-60960-852-1 (ebook) -- ISBN 978-1-60960-853-8 (print & perpetual access) 1. Computer networks--Security measures. 2. Computer security. 3. Data protection. 4. Electronic data processing departments--Security measures. I. Zubairi, Junaid Ahmed, 1961- II. Mahboob, Athar, 1971- TK5105.59.C92 2012 005.8--dc22 2011009262 British Cataloguing in Publication Data A Cataloguing in Publication record for this book is available from the British Library. All work contributed to this book is new, previously-unpublished material. The views expressed in this book are those of the authors, but not necessarily of the publisher. Editorial Advisory Board Kassem Saleh, Kuwait University, Kuwait Sajjad Madani, COMSATS Institute of Information Technology, Pakistan Badar Hussain, KCI Engineering, USA Omer Mahmoud, Int’l Islamic University, Malaysia List of Reviewers Alfredo Pironti, Politecnico di Torino, Torino, Italy Athar Mahboob, National University of Sciences & Technology, Pakistan Badar Hussain, KCI Engineering, USA Davide Pozza, Politecnico di Torino, Italy Junaid Ahmed Zubairi, State University of New York at Fredonia, USA Junaid Hussain, National University of Sciences & Technology, Pakistan Kashif Latif, National University of Sciences & Technology, Pakistan Morgan Henrie, Morgan Henrie Inc., USA Omer Mahmoud, Int’l Islamic University, Malaysia Riccardo Sisto, Politecnico di Torino, Italy Sajjad Ahmed Madani, COMSATS Institute of Information Technology, Pakistan Shakeel Ali, Cipher Storm Ltd., UK Sohail Sattar, NED University of Engineering & Technology, Pakistan Syed Ali Khayam, National University of Sciences & Technology, Pakistan Wen Chen Hu, University of North Dakota, USA Table of Contents Foreword ..............................................................................................................................................xii Preface .................................................................................................................................................xiii Acknowledgment ..............................................................................................................................xviii Section 1 Mobile and Wireless Security Chapter 1 Securing Wireless Ad Hoc Networks: State of the Art and Challenges .................................................. 1 Victor Pomponiu, University of Torino, Italy Chapter 2 Smartphone Data Protection Using Mobile Usage Pattern Matching .................................................. 23 Wen-Chen Hu, University of North Dakota, USA Naima Kaabouch, University of North Dakota, USA S. Hossein Mousavinezhad, Idaho State University, USA Hung-Jen Yang, National Kaohsiung Normal University, Taiwan Chapter 3 Conservation of Mobile Data and Usability Constraints ...................................................................... 40 Rania Mokhtar, University Putra Malaysia (UPM), Malaysia Rashid Saeed, International Islamic University Malaysia (IIUM), Malaysia Section 2 Social Media, Botnets and Intrusion Detection Chapter 4 Cyber Security and Privacy in the Age of Social Networks ................................................................. 57 Babar Bhatti, MutualMind, Inc., USA Chapter 5 Botnets and Cyber Security: Battling Online Threats ........................................................................... 75 Ahmed Mansour Manasrah, National Advanced IPv6 Center, Malaysia Omar Amer Abouabdalla, National Advanced IPv6 Center, Malaysia Moein Mayeh, National Advanced IPv6 Center, Malaysia Nur Nadiyah Suppiah, National Advanced IPv6 Center, Malaysia Chapter 6 Evaluation of Contemporary Anomaly Detection Systems (ADSs) ..................................................... 90 Ayesha Binte Ashfaq, National University of Sciences & Technology (NUST), Pakistan Syed Ali Khayam, National University of Sciences & Technology (NUST), Pakistan Section 3 Formal Methods and Quantum Computing Chapter 7 Practical Quantum Key Distribution ................................................................................................... 114 Sellami Ali, International Islamic University Malaysia (IIUM), Malaysia Chapter 8 Automated Formal Methods for Security Protocol Engineering ........................................................ 138 Alfredo Pironti, Politecnico di Torino, Italy Davide Pozza, Politecnico di Torino, Italy Riccardo Sisto, Politecnico di Torino, Italy Section 4 Embedded Systems and SCADA Security Chapter 9 Fault Tolerant Remote Terminal Units (RTUs) in SCADA Systems .................................................. 168 Syed Misbahuddin, Sir Syed University of Engineering and Technology, Pakistan Nizar Al-Holou, University of Detroit Mercy, USA Chapter 10 Embedded Systems Security ............................................................................................................... 179 Muhammad Farooq-i-Azam, COMSATS Institute of Information Technology, Pakistan Muhammad Naeem Ayyaz, University of Engineering and Technology, Pakistan Section 5 Industrial and Applications Security Chapter 11 Cyber Security in Liquid Petroleum Pipelines .................................................................................... 200 Morgan Henrie, MH Consulting, Inc., USA Chapter 12 Application of Cyber Security in Emerging C4ISR Systems and Related Technologies ................... 223 Ashfaq Ahmad Malik, National University of Sciences & Technology, Pakistan Athar Mahboob, National University of Sciences & Technology, Pakistan Adil Khan, National University of Sciences & Technology, Pakistan Junaid Zubairi, State University of New York at Fredonia, USA Chapter 13 Practical Web Application Security Audit Following Industry Standards and Compliance ............... 259 Shakeel Ali, Cipher Storm Ltd., UK Compilation of References ............................................................................................................... 280 About the Contributors .................................................................................................................... 303 Index ................................................................................................................................................... 310 Detailed Table of Contents Foreword ..............................................................................................................................................xii Preface .................................................................................................................................................xiii Acknowledgment ..............................................................................................................................xviii Section 1 Mobile and Wireless Security Chapter 1 Securing Wireless Ad Hoc Networks: State of the Art and Challenges .................................................. 1 Victor Pomponiu, University of Torino, Italy In this chapter, first authors introduce the main wireless technologies along with their characteristics. Then, a description of the attacks that can be mounted on these networks is given. A separate section will review and compare the most recent intrusion detection techniques for wireless ad hoc networks. Finally, based on the current state of the art, the conclusions, and major challenges are discussed. Chapter 2 Smartphone Data Protection Using Mobile Usage Pattern Matching .................................................. 23 Wen-Chen Hu, University of North Dakota, USA Naima Kaabouch, University of North Dakota, USA
Load more

Recommended publications
  • A Lightweight Virtualization Layer with Hardware-Assistance for Embedded Systems
    PONTIFICAL CATHOLIC UNIVERSITY OF RIO GRANDE DO SUL FACULTY OF INFORMATICS COMPUTER SCIENCE GRADUATE PROGRAM A LIGHTWEIGHT VIRTUALIZATION LAYER WITH HARDWARE-ASSISTANCE FOR EMBEDDED SYSTEMS CARLOS ROBERTO MORATELLI Dissertation submitted to the Pontifical Catholic University of Rio Grande do Sul in partial fullfillment of the requirements for the degree of Ph. D. in Computer Science. Advisor: Prof. Fabiano Hessel Porto Alegre 2016 To my family and friends. “I’m doing a (free) operating system (just a hobby, won’t be big and professional like gnu) for 386(486) AT clones.” (Linus Torvalds) ACKNOWLEDGMENTS I would like to express my sincere gratitude to those who helped me throughout all my Ph.D. years and made this dissertation possible. First of all, I would like to thank my advisor, Prof. Fabiano Passuelo Hessel, who has given me the opportunity to undertake a Ph.D. and provided me invaluable guidance and support in my Ph.D. and in my academic life in general. Thank you to all the Ph.D. committee members – Prof. Carlos Eduardo Pereira (dissertation proposal), Prof. Rodolfo Jardim de Azevedo, Prof. Rômulo Silva de Oliveira and Prof. Tiago Ferreto - for the time invested and for the valuable feedback provided.Thank you Dr. Luca Carloni and the other SLD team members at the Columbia University in the City of New York for receiving me and giving me the opportunity to work with them during my ‘sandwich’ research internship. Eu gostaria de agraceder minha esposa, Ana Claudia, por ter estado ao meu lado durante todo o meu período de doutorado. O seu apoio e compreensão foram e continuam sendo muito importantes para mim.
    [Show full text]
  • Full Virtualization on Low-End Hardware: a Case Study
    Full Virtualization on Low-End Hardware: a Case Study Adriano Carvalho∗, Vitor Silva∗, Francisco Afonsoy, Paulo Cardoso∗, Jorge Cabral∗, Mongkol Ekpanyapongz, Sergio Montenegrox and Adriano Tavares∗ ∗Embedded Systems Research Group Universidade do Minho, 4800–058 Guimaraes˜ — Portugal yInstituto Politecnico´ de Coimbra (ESTGOH), 3400–124 Oliveira do Hospital — Portugal zAsian Institute of Technology, Pathumthani 12120 — Thailand xUniversitat¨ Wurzburg,¨ 97074 Wurzburg¨ — Germany Abstract—Most hypervisors today rely either on (1) full virtua- a hypervisor-specific, often proprietary, interface. Full virtua- lization on high-end hardware (i.e., hardware with virtualization lization on low-end hardware, on the other end, has none of extensions), (2) paravirtualization, or (3) both. These, however, those disadvantages. do not fulfill embedded systems’ requirements, or require legacy software to be modified. Full virtualization on low-end hardware Full virtualization on low-end hardware (i.e., hardware with- (i.e., hardware without virtualization extensions), on the other out dedicated support for virtualization) must be accomplished end, has none of those disadvantages. However, it is often using mechanisms which were not originally designed for it. claimed that it is not feasible due to an unacceptably high Therefore, full virtualization on low-end hardware is not al- virtualization overhead. We were, nevertheless, unable to find ways possible because the hardware may not fulfill the neces- real-world quantitative results supporting those claims. In this paper, performance and footprint measurements from a sary requirements (i.e., “the set of sensitive instructions for that case study on low-end hardware full virtualization for embedded computer is a subset of the set of privileged instructions” [1]).
    [Show full text]
  • Consideration About Enabling Hypervisor in Open-Source firmware
    Consideration about enabling hypervisor in open-source firmware OSFC 2019 Piotr Król 1 / 18 About me Piotr Król Founder & Embedded Systems Consultant open-source firmware @pietrushnic platform security [email protected] trusted computing linkedin.com/in/krolpiotr facebook.com/piotr.krol.756859 OSFC 2019 CC BY 4.0 | Piotr Król 2 / 18 Agenda Introduction Terminology Hypervisors Bareflank Hypervisor as coreboot payload Demo Issues and further work OSFC 2019 CC BY 4.0 | Piotr Król 3 / 18 Introduction Goal create firmware that can start multiple application in isolated virtual environments directly from SPI flash Motivation to improve virtualization and hypervisor-fu to understand hardware capabilities and limitation in area of virtualization to satisfy market demand OSFC 2019 CC BY 4.0 | Piotr Król 4 / 18 Terminology Virtualization is the application of the layering principle through enforced modularity, whereby the exposed virtual resource is identical to the underlying physical resource being virtualized. layering - single abstraction with well-defined namespace enforced modularity - guarantee that client of the layer cannot bypass it and access abstracted resources examples: virtual memory, RAID VM is an abstraction of complete compute environment Hypervisor is a software that manages VMs VMM is a portion of hypervisor that handle CPU and memory virtualization Edouard Bugnion, Jason Nieh, Dan Tsafrir, Synthesis Lectures on Computer Architecture, Hard- ware and Software Support for Virtualization, 2017 OSFC 2019 CC BY 4.0 | Piotr Król 5 /
    [Show full text]
  • Adaptive Virtual Machine Scheduling and Migration for Embedded Real-Time Systems
    Adaptive Virtual Machine Scheduling and Migration for Embedded Real-Time Systems Stefan Groesbrink, M.Sc. A thesis submitted to the Faculty of Computer Science, Electrical Engineering and Mathematics of the University of Paderborn in partial fulfillment of the requirements for the degree of doctor rerum naturalium (Dr. rer. nat.) 2015 Abstract Integrated architectures consolidate multiple functions on a shared electronic control unit. They are well suited for embedded real-time systems that have to imple- ment complex functionality under tight resource constraints. Multicore processors have the potential to provide the required computational capacity with reduced size, weight, and power consumption. The major challenges for integrated architectures are robust encapsulation (to prevent that the integrated systems corrupt each other) and resource management (to ensure that each system receives sufficient resources). Hypervisor-based virtualization is a promising integration architecture for complex embedded systems. It refers to the division of the hardware resources into multiple isolated execution environments (virtual machines), each hosting a software system of operating system and application tasks. This thesis addresses the hypervisor’s management of the resource computation time, which has to enable multiple real-time systems to share a multicore processor with all of them completing their computations as demanded. State of the art ap- proaches realize the sharing of the processor by assigning exclusive processor cores or fixed processor shares to each virtual machine. For applications with a computation time demand that varies at run-time, such static solutions result in a low utilization, since the pessimistic worst-case demand has to be reserved at all times, but is often not needed.
    [Show full text]
  • Hard Real-Time Scheduling on Virtualized Embedded Multi-Core Systems
    Faculteit Toegepaste Ingenieurswetenschappen Elektronica-ICT Hard real-time scheduling on virtualized embedded multi-core systems Proefschrift voorgelegd tot het behalen van de graad van Doctor in de Toegepaste Ingenieurswetenschappen aan de Universiteit Antwerpen te verdedigen door Yorick De Bock Peter Hellinckx Jan Broeckhove Antwerpen, 2018 Jury Chairman Prof. dr. ing. Maarten Weyn Supervisors Prof. dr. Peter Hellinckx Prof. dr. Jan Broeckhove Members Prof. dr. Paul De Meulenaere Prof. dr. ing. Sebastian Altmeyer, University of Amsterdam, The Netherlands Prof. dr. Rahul Mangharam, University of Pennsylvania, USA Contact Yorick De Bock IDLab, Faculty of Applied Engineering, University of Antwerp Groenenborgerlaan 171, 2020 Antwerpen, Belgium M: [email protected] T: +32 3265 1887 Copyright c 2018 Yorick De Bock All rights reserved. Abstract Due to the new industrial revolution or innovation in Cyber-Physical Systems and Internet- of-Things in general, the number of embedded devices in such environments increases exponentially. Controlling this increase of computing resources requires the use of new technologies such as multi-core processors and embedded virtualization. Combining both technologies makes it possible to reduce the number of the embedded systems by com- bining multiple separated systems into one powerful system. Those powerful systems hosts multiple tasks and are in most cases under the control of an operating system. The execution order of the tasks is orchestrated by the scheduler of this operating system. The scheduler uses a scheduling algorithm to assign a priority to each task. A wide variety of scheduling algorithms exists and it is the responsibility of the software developer to select the best fit for a specific application.
    [Show full text]
  • Hypervisor DATASHEET
    Mentor Embedded Hypervisor DATASHEET PRODUCT FEATURES: ■ Secure by design with integrated support for the ARM® TrustZone™ ■ Type 1 hypervisor with a small footprint for high performance and reliable devices ■ Choice of guest operating systems including: Mentor Embedded Linux®, Mentor Embedded Nucleus® RTOS, Mentor Embedded Automotive Technology Platform (ATP), and Mentor AUTOSAR runtime ■ Includes Mentor Embedded Sourcery™ CodeBench and Sourcery Mentor Embedded Hypervisor includes comprehensive support for the ARM TrustZone Analyzer for a complete integrated (providing a secure environment for critical information and software to operate in) along with support for numerous guest operating systems in addition to tools and reference BSPs. design environment ■ Mentor Embedded Professional Addressing a growing design and business dilemma Services available to assist from Business managers and software developers alike face increased challenges high-level architectural design when building today’s intelligent embedded systems. They must successfully to virtualizing the operating develop and deliver an increasingly complex, connected, and consolidated environment and hardware product, while meeting the escalating business demands of security, cost, performance, and tight market windows. BENEFITS: Complex and highly integrated SoCs are quickly becoming the common ■ Build highly reliable and high choice these days as demands increase for more performance, improved performance systems on the latest security, and reliable connectivity options – with less power. Many options multicore processor architectures have emerged to address these demands and one of the most effective is ■ Consolidate and isolate critical and embedded virtualization. What was once the sole domain of desktop and non-critical functions for enhanced server environments is now an accepted practice in the constrained space system performance of embedded systems.
    [Show full text]
  • Freescale Embedded Solutions Based on ARM Technology Guide
    Embedded Solutions Based on ARM Technology Kinetis MCUs MAC5xxx MCUs i.MX applications processors QorIQ communications processors Vybrid controller solutions freescale.com/ARM ii Freescale Embedded Solutions Based on ARM Technology Table of Contents ARM Solutions Portfolio 2 i.MX Applications Processors 18 i.MX 6 series applications processors 20 Freescale Embedded Solutions Chart 4 i.MX53 applications processors 22 i.MX28 applications processors 23 Kinetis MCUs 6 Kinetis K series MCUs 7 i.MX and QorIQ Kinetis L series MCUs 9 Processor Comparison 24 Kinetis E series MCUs 11 Kinetis V series MCUs 12 Kinetis M series MCUs 13 QorIQ Communications Kinetis W series MCUs 14 Processors 25 Kinetis EA series MCUs 15 QorIQ LS1 family 26 QorIQ LS2 family 29 MAC5xxx MCUs 16 MAC57D5xx MCUs 17 Vybrid Controller Solutions 31 Vybrid VF3xx family 33 Vybrid VF5xx family 34 Vybrid VF6xx family 35 Design Resources 36 Freescale Enablement Solutions 37 Freescale Connect Partner Enablement Solutions 51 freescale.com/ARM 1 Scalable. Innovative. Leading. Your Number One Choice for ARM Solutions Freescale is the leader in embedded control, offering the market’s broadest and best-enabled portfolio of solutions based on ARM® technology. Our end-to-end portfolio of high-performance, power-efficient MCUs and digital networking processors help realize the potential of the Internet of Things, reflecting our unique ability to deliver scalable, systems- focused processing and connectivity. Our large ARM-powered portfolio includes enablement (software and tool) bundles scalable MCU and MPU families from small from Freescale and the extensive ARM ultra-low-power Kinetis MCUs to i.MX ecosystem.
    [Show full text]
  • Rtzvisor: a Secure and Safe Real-Time Hypervisor
    electronics Article mRTZVisor: A Secure and Safe Real-Time Hypervisor José Martins †, João Alves †, Jorge Cabral ID , Adriano Tavares ID and Sandro Pinto * ID Centro Algoritmi, Universidade do Minho, 4800-058 Guimarães, Portugal; [email protected] (J.M.); [email protected] (J.A.); [email protected] (J.C.); [email protected] (A.T.) * Correspondence: [email protected]; Tel.: +351-253-510-180 † These authors contributed equally to this work. Received: 29 September 2017; Accepted: 24 October 2017; Published: 30 October 2017 Abstract: Virtualization has been deployed as a key enabling technology for coping with the ever growing complexity and heterogeneity of modern computing systems. However, on its own, classical virtualization is a poor match for modern endpoint embedded system requirements such as safety, security and real-time, which are our main target. Microkernel-based approaches to virtualization have been shown to bridge the gap between traditional and embedded virtualization. This notwithstanding, existent microkernel-based solutions follow a highly para-virtualized approach, which inherently requires a significant software engineering effort to adapt guest operating systems (OSes) to run as userland components. In this paper, we present mRTZVisor as a new TrustZone-assisted hypervisor that distinguishes itself from state-of-the-art TrustZone solutions by implementing a microkernel-like architecture while following an object-oriented approach. Contrarily to existing microkernel-based solutions, mRTZVisor is able to run nearly unmodified guest OSes, while, contrarily to existing TrustZone-assisted solutions, it provides a high degree of functionality and configurability, placing strong emphasis on the real-time support.
    [Show full text]
  • AUTOSAR and Linux – Single Chip Solution Implementation of Automotive Multipurpose ECU Prototype System Using Hypervisor Solution
    AUTOSAR and Linux – Single chip solution Implementation of Automotive Multipurpose ECU Prototype system using hypervisor solution Master of Science Thesis in the Master Degree Program, Networks and Distributed Systems KARTHIKEYAN RAVINDRAN XINGGE XU Chalmers University of Technology University of Gothenburg Department of Computer Science and Engineering Göteborg, Sweden, February 2015 The Author grants to Chalmers University of Technology and University of Gothenburg the non-exclusive right to publish the Work electronically and in a non-commercial purpose make it accessible on the Internet. The Author warrants that he/she is the author to the Work, and warrants that the Work does not contain text, pictures or other material that violates copyright law. The Author shall, when transferring the rights of the Work to a third party (for example a publisher or a company), acknowledge the third party about this agreement. If the Author has signed a copyright agreement with a third party regarding the Work, the Author warrants hereby that he/she has obtained any necessary permission from this third party to let Chalmers University of Technology and University of Gothenburg store the Work electronically and make it accessible on the Internet. AUTOSAR and Linux – Single chip solution Implementation of Automotive Multipurpose ECU Prototype system using hypervisor solution KARTHIKEYAN RAVINDRAN XINGGE XU © KARTHIKEYAN RAVINDRAN, February 2015. © XINGGE XU, February 2015. Supervisor and Examiner: Elad Michael Schiller Chalmers University of Technology University of Gothenburg Department of Computer Science and Engineering SE-412 96 Göteborg Sweden Telephone + 46 (0)31-772 1000 Cover: A Visual illustration of a Multipurpose ECU system is hosting both Linux and AUTOSAR automotive applications simultaneously on a common shared target platform using a hypervisor solution.
    [Show full text]
  • Embedded Multicore: an Introduction
    Embedded Multicore: An Introduction EMBMCRM Rev. 0 07/2009 How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support Information in this document is provided solely to enable system and software USA/Europe or Locations Not Listed: implementers to use Freescale Semiconductor products. There are no express or Freescale Semiconductor, Inc. implied copyright licenses granted hereunder to design or fabricate any integrated Technical Information Center, EL516 circuits or integrated circuits based on the information in this document. 2100 East Elliot Road Tempe, Arizona 85284 Freescale Semiconductor reserves the right to make changes without further notice to +1-800-521-6274 or any products herein. Freescale Semiconductor makes no warranty, representation or +1-480-768-2130 www.freescale.com/support guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH any product or circuit, and specifically disclaims any and all liability, including without Technical Information Center limitation consequential or incidental damages. “Typical” parameters which may be Schatzbogen 7 provided in Freescale Semiconductor data sheets and/or specifications can and do 81829 Muenchen, Germany vary in different applications and actual performance may vary over time. All operating +44 1296 380 456 (English) +46 8 52200080 (English) parameters, including “Typicals” must be validated for each customer application by +49 89 92103 559 (German) customer’s technical experts. Freescale Semiconductor does not convey any license +33 1 69 35 48 48 (French) under its patent rights nor the rights of others.
    [Show full text]
  • ザイリンクス Xcell Journal 日本語版 93 号
    93 号 2015 SOLUTIONS FOR A PROGRAMMABLE WORLD FPGA ベースの ザイリンクス、最新医療機器の ファジー コントローラーで、 サトウキビの搾汁プロセスを管理 Time-to-Market を短縮化 Zynq MPSoC と Xen ハイパーバイザーのサポート XDC タイミング制約の活用 非対称型 マルチプロセッシング システムのソフトウェア開発を 容易化 ザイリンクス FPGA による 先進の自律的群衆モニタリング システム ページ 12 japan.xilinx.com/xcell LETTER FROM THE PUBLISHER Zynq UltraScale+ の「Hello World」 journal Xcell 予定より 3 ヵ月も前倒しで、最初の Zynq MPSoC XCZU9EG を出荷開始した Zynq® UltraScale+™ 発行人 Mike Santarini MPSoC 設計チームに心からの賛辞を送ります。これで、ザイリンクスは三連覇を達成しました。 [email protected] 28nm では 7 シリーズ、20nm では UltraScale™ ファミリ、そして今回、16/14nm FinFET では +1-408-626-5981 UltraScale+ と、プログラマブル ロジック メーカーとして各先進プロセス ノードで初となるデバイスを出 Jacqueline Damian 編集 荷し、3 回連続で市場競争に勝利したことになります。 アートディレクター Scott Blair 2015 年 9 月 30 日、ザイリンクスは、2 社の顧客にこのデバイスのサンプル出荷を開始したことを デザイン/制作 Teie, Gelwicks & Associates 発表しました。テープアウトから出荷までは 2 ヵ月半でした。この早さは、ザイリンクスの Zynq MPSoC デザイン チームおよび品質チーム、そしてファウンドリ TSMC社 の皆さんの技術力を強固に裏付けるもの 日本語版統括 神保 直弘 です。 [email protected] ザイリンクスは、9 月後半に特性評価およびテスト用の最初のシリコンを入手後、わずか数時間でアップ 制作進行 周藤 智子 ストリーム Linux カーネルを新たなデバイス上でブートすることができました (デモ動画をご覧ください)。 [email protected] 日本語版 制作・ 有限会社エイ・シー・シー 広告 Xcell Journal 日本語版 93 号 2015 年 12 月 21 日発行 ザイリンクスの UltraScale+ ポートフォリオの出荷第 1 弾である Zynq UltraScale+ MPSoC Xilinx, Inc デバイス上の「アップストリーム」 Linux カーネルのブートのデモ動画 2100 Logic Drive San Jose, CA 95124-3400 本誌では、Xcell Journal 90 号のカバー ストーリーで、この画期的な新製品のアーキテクチャ的特長 ザイリンクス株式会社 と単位ワット当たりの性能について特集しました。TSMC社 の 16nm FinFET+ プロセス テクノロジに実 〒141-0032 装された Zynq MPSoC は、クワッドコア 64 ビット ARM® Cortex™-A53 アプリケーション プロセッ 東京都品川区大崎1-2-2 アートヴィレッジ大崎セントラルタワー 4F サ、32 ビット ARM Cortex-R5 リアルタイム プロセッサ、ARM Mali-400MP グラフィックス プロセッ Ⓒ 2015 Xilinx, Inc. All Right Reserved. サ、16nm FPGA ロジック (UltraRAM を含む)、ペリフェラルのホスト、セキュリティおよび信頼性に関 する各種機能、革新的な消費電力制御テクノロジをシングル デバイス上に搭載しています。この Zynq XILINX や、Xcell のロゴ、その他本書に記載 の商標は、米国およびその他各国の Xilinx 社 UltraScale+ MPSoC の採用は、28nm Zynq SoC で設計した場合に比べ、5 倍の単位ワット当たり性 の登録商標です。ほかすべての名前は、各社の 能を持つシステムを設計できます。 登録商標または商標です。 Xcell Publications の発行人として、ザイリンクスの 28nm Zynq-7000 All Programmable SoC 本書は、米国 Xilinx, Inc.
    [Show full text]
  • Virtualization for Embedded Systems the How and Why of Small-Device Hypervisors M
    developerWorks Technical topics Linux Technical library Virtualization for embedded systems The how and why of small-device hypervisors M. Tim Jones ([email protected]), Platform Architect, Intel Date: 19 Apr 2011 Summary: Today's technical news is filled with stories of server and desktop virtualization, Level: Intermediate but there's another virtualization technology that's growing rapidly: embedded virtualization. The embedded domain has several useful applications for virtualization, including mobile handsets, security kernels, and concurrent embedded operating systems. This article explores the area of embedded virtualization and explains why it's coming to an embedded system near you. Tags for this article: mobile_and_embedded_systems, resource_virtualization Not only are the markets and opportunities that virtualization creates exploding, but the variations of virtualization are expanding, Table of contents as well. Although virtualization began in mainframes, it found a key place in the server. Server utilization was found to be so small for a large number of workloads that virtualization permitted multiple server instances to be hosted on a single server for less What is embedded virtualization? cost, management, and real estate. Virtualization then entered the consumer space in the form of type-2 (or hosted) hypervisors, Attributes of embedded which permitted the concurrent operation of multiple operating systems on a single desktop. Virtualized desktops were the next virtualization innovation, permitting a server to host multiple clients over a network using minimal client endpoints (thin clients). But today, Examples of embedded virtualization is entering a new, high-volume space: embedded devices. hypervisors Applications of embedded This evolution isn't really surprising, as the benefits virtualization realizes continue to grow.
    [Show full text]