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Intel Atom® Processor S1200 Product Family for Microserver Datasheet

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Intel Atom® Processor S1200 Product Family for Microserver Datasheet Intel® Atom™ Processor S1200 Product Family for Microserver Datasheet, Volume 1 of 2 December 2012 Document Number: 328194-001 INFORMATIONLegal Lines and Disclaimers IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS OTHERWISE AGREED IN WRITING BY INTEL, THE INTEL PRODUCTS ARE NOT DESIGNED NOR INTENDED FOR ANY APPLICATION IN WHICH THE FAILURE OF THE INTEL PRODUCT COULD CREATE A SITUATION WHERE PERSONAL INJURY OR DEATH MAY OCCUR. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design with this information. The products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800-548- 4725, or go to: http://www.intel.com/#/en_US_01 Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different processor families. Go to: http://www.intel.com/products/processor%5Fnumber/ Code Names are only for use by Intel to identify products, platforms, programs, services, etc. (“products”) in development by Intel that have not been made commercially available to the public, i.e., announced, launched or shipped. They are never to be used as “commercial” names for products. Also, they are not intended to function as trademarks. BlueMoon, BunnyPeople, Celeron, Celeron Inside, Centrino, Centrino Inside, Cilk, Core Inside, E-GOLD, i960, Intel, the Intel logo, Intel AppUp, Intel Atom, Intel Atom Inside, Intel Core, Intel Inside, Intel Insider, the Intel Inside logo, Intel NetBurst, Intel NetMerge, Intel NetStructure, Intel SingleDriver, Intel SpeedStep, Intel Sponsors of Tomorrow., the Intel Sponsors of Tomorrow. logo, Intel StrataFlash, Intel vPro, Intel XScale, InTru, the InTru logo, the InTru Inside logo, InTru soundmark, Itanium, Itanium Inside, MCS, MMX, Moblin, Pentium, Pentium Inside, Puma, skoool, the skoool logo, SMARTi, Sound Mark, The Creators Project, The Journey Inside, Thunderbolt, vPro Inside, VTune, Xeon, Xeon Inside, X-GOLD, XMM and XPOSYS are trademarks of Intel Corporation in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. Copyright © 2012, Intel Corporation. All rights reserved. Intel® Atom™ Processor S1200 Product Family for Microserver Datasheet—Volume 1 of 2 December 2012 2 Document Number: 328194-001 Revision History Date Revision Description November 2012 1.0 Initial release. Intel® Atom™ Processor S1200 Product Family for Microserver December 2012 Datasheet—Volume 1 of 2 Document Number: 328194-001 3 Contents 1Overview.................................................................................................................. 9 1.1 Introduction....................................................................................................... 9 1.2 Key Features of the Processor .............................................................................11 1.2.1 Intel® Atom™ Core Features and Caching Hierarchy ...................................13 1.2.1.1 Processor Core Technologies.......................................................13 1.2.2 UnCore Features.....................................................................................14 1.2.2.1 Integrated Memory Controller (iMC).............................................14 1.2.2.2 Integrated I/O (IIO) .................................................................14 1.2.3 Legacy I/O Features................................................................................16 1.3 Power Management Support................................................................................17 1.3.1 Power Management Features....................................................................17 1.4 Thermal Management Support.............................................................................18 1.5 Package Summary .............................................................................................18 1.6 Terminology......................................................................................................19 1.7 Related Documents ............................................................................................21 1.8 State of Data ....................................................................................................21 2Interfaces................................................................................................................22 2.1 Integrated Memory Controller..............................................................................22 2.1.1 Introduction...........................................................................................22 2.1.2 Supported Features.................................................................................22 2.1.3 Functional Description .............................................................................23 2.1.3.1 DRAM Requests and Data Ordering ..............................................23 2.1.3.2 DRAM Out of Bound Access.........................................................23 2.1.3.3 DRAM Power Management ..........................................................24 2.2 PCI Express Interface .........................................................................................26 2.2.1 PCI Express Root Port Features and Functions ............................................26 2.2.2 PCI Express Architecture..........................................................................27 2.2.2.1 Transaction Layer......................................................................27 2.2.2.2 Data Link Layer.........................................................................28 2.2.2.3 Physical Layer...........................................................................28 2.2.3 PCI Express Configuration Mechanism .......................................................28 2.3 SMBus..............................................................................................................29 2.3.1 System Management...............................................................................29 2.4 Integrated Legacy I/O Overview ..........................................................................30 2.4.1 High-Speed UART (HSUART) ....................................................................32 2.4.2 Low Pin Count (LPC) Interface ..................................................................33 2.4.3 Internal CPU Interface Signals ..................................................................33 2.4.3.1 CPU Interface Signal - INIT# ......................................................33 2.4.3.2 CPU Interface Signal - NMI .........................................................33 2.4.3.3 CPU Interface Signal - INTR........................................................33 2.4.3.4 CPU Interface Signal - SMI# .......................................................33 2.4.4 I/O Advanced Programmable Interrupt Controller (IOxAPIC).........................33 2.4.5 General-Purpose I/O (GPIO).....................................................................34 2.4.6 Serial Peripheral Interface (SPI) ...............................................................34 2.4.7 Real Time Clock......................................................................................35 2.4.8 8254 Programmable Interval Timer (PIT) ...................................................36 2.4.8.1 Counter 0, System Timer ...........................................................36 2.4.8.2 Counter 1, Refresh-Cycle Toggle Status........................................36 2.4.8.3 Counter 2, Speaker Tone............................................................36 2.4.8.4 Timer I/O Registers ...................................................................37 2.4.9 8259 Interrupt Controllers (PIC) ...............................................................38 2.4.9.1 I/O Registers ............................................................................39 Intel® Atom™ Processor S1200 Product Family for Microserver Datasheet—Volume 1 of 2 December 2012 4 Document Number: 328194-001 2.4.10 High-Precision Event Timer (HPET) ........................................................... 40 2.4.10.1 HPET MMIO Registers ...............................................................
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