DOCSLIB.ORG

Memory Storage Devices

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Memory Storage Devices Semiconductor Catalog 2012-4 Memory Storage Devices SEMICONDUCTOR & STORAGE PRODUCTS http://www.semicon.toshiba.co.jp/eng Memory Storage Devices Memory Storage Devices In 1984, Toshiba developed a new type of semiconductor memory called flash memory, leading the industry into the next generation ahead of its competitors. Some time later, in 1987, NAND flash memory was developed, and this has since been used in a variety of memory cards and electronic equipment. The NAND flash market has grown rapidly, with flash memory becoming an internationally standardized memory device. This brochure introduces Toshiba's memory solutions, mainly those based on NAND flash memory. Toshiba's Leading Technology Areas W Process technology W Multi-level-cell (MLC) technology W Controller technology W Die stacking technology W Packaging technology Features of Toshiba's Memory Storage Devices W Suitable for storing large files W Fast write and erase rates W Low per-bit cost W Easily extendable using the NAND interface Toshiba, the inventor of flash memory, W Offers products with a standard has carved out a path to a new era HS-MMC interface in which we are all able to carry videos, W Offers products with UHS-I, music and data with us wherever we go. a high-speed SD bus interface Extensive Memory Lineups and Solutions Toshiba is committed to supporting customers in their efforts to create new applications by offering an extensive portfolio of memory solutions. Among our memory products are raw NAND chips that allow great flexibility in system design according to customer needs, high-reliability single-level-cell (SLC) NAND products with embedded error correction code (ECC) and NAND flash memories that integrate both large-capacity MLC NAND and controller chips in one package, as well as cards and storage products. Toshiba's Memory Lineup Consumer and Solution Proposals Industrial Support for Applications Development W NAND flash memories equipment OSLC NAND Digital SLC NAND 0.5 Gb - 128 Gb cameras W NAND flash memories TM NAND BENAND 4 Gb - 8 Gb with control functionality Products TM Digital SmartNAND 4 GB - 64 GB Oe·MMCTM camcorders e·MMCTM 2 GB - 128 GB OSmartNANDTM TM Embedded Applications OBENAND Digital photo frames W Media cards SD/SDHC 2 GB - 32 GB Silicon SDXC UHS-I 64 GB OSD memory cards SDHC UHS-I 8 GB - 32 GB audio players OmicroSD memory cards microSD / microSDHC 2 GB - 32 GB Cards OUSB flash memories TM Cell phones FlashAir 8 GB OFlashAirTM PCs USB 2 GB - 64 GB Storage 2 SLC (Single Level Cell) NAND SLC NAND flash has the advantages of higher write cycle endurance, faster read/write speeds and greater reliability. Toshiba offers a wide range of SLC NAND flash from low capacity to high capacity. All products embody Toshiba's advanced technology and meet the market demand for higher reliability. SLC NAND Lineup QLow Capacity (Small Block Size) Page Size Block Size Power Supply Operating Temperature Capacity Package (bytes) (bytes) (V) (˚C) 512 Mbit 2.7 to 3.6 0 to 70 48-pin TSOP I 512 16 K (Note) 1 Gbit 1.70 to 1.95 –40 to 85 63-ball BGA QSmall to Mid Capacity (Large Block Size) Page Size Block Size Power Supply Operating Temperature Capacity Package (bytes) (bytes) (V) (˚C) 512 Mbit 1 Gbit 2.7 to 3.6 0 to 70 48-pin TSOP I 2 K 128 K (Note) 2 Gbit 1.70 to 1.95 –40 to 85 63-ball BGA 4 Gbit QHigh Capacity Page Size Block Size Power Supply Operating Temperature Capacity Package (bytes) (bytes) (V) (˚C) 4 Gbit 48-pin TSOP I 63-ball BGA 8 Gbit 2.7 to 3.6 4 K 256 K 16 Gbit (8 Gb x 2) 1.70 to 1.95 0 to 70 48-pin TSOP I 32 Gbit (8 Gb x 4) –40 to 85(Note) 32 Gbit 48-pin TSOP I 64 Gbit (32 Gb x 2) 8 K 512 K 2.7 to 3.6 132-ball BGA 128 Gbit (32 Gb x 4) Q Toggle (Maximum Data Rate: 133 Mbps) Page Size Block Size Power Supply Operating Temperature Capacity Package (bytes) (bytes) Vcc (V) VccQ (V) (˚C) 2.7 to 3.6 48-pin TSOP I 32 Gbit 8 K 512 K 2.7 to 3.6 0 to 70 1.70 to 1.95 132-ball BGA Note: Contact your local Toshiba sales representative for product names and for the support status for the extended temperature range of -40°C to 85°C. 3 Memory Storage Devices NAND Flash Memories with Control Functionality If you are considering a NAND flash as your memory solution, Toshiba recommends its NAND flash product with control functionality. If you opt for raw NAND chips, you need to implement ECC, bad-block management, logical-to-physical address conversion, wear leveling (a technique for distributing re-writes evenly across a memory array) and other control functions on the host side. With evolving NAND manufacturing processes, ECC, in particular, is becoming more sophisticated and putting heavier burdens on the host processor. To meet customer needs in addressing this issue, Toshiba offers NAND flash memories with embedded ECC and those that integrate a controller in the same package. Bad block management e·MMCTM (MLC NAND) More robust Most appropriate TM SmartNAND (MLC NAND) ECC wear-leveling Bad block management Performance TM BENAND Technique for Logical-physical Most appropriate improvement (SLC NAND) wear-leveling features increasing speed address conversion Robust ECC Logical-physical address conversion The requirements inherent with NAND flash memories are handled locally in a NAND product to reduce the workload on the host processor. Toshiba's NAND Product Lineup and Product Overview Toshiba offers e-MMCTM that integrates a NAND controller and large-capacity MLC NAND memories in the same package; SmartNANDTM that integrates a controller for ECC and performance improvement and large-capacity MLC NAND memories in the same package; and BENANDTM that combines only ECC with high-reliability SLC NAND memories. All these NAND solutions provide ECC and other control functions optimized by Toshiba, the NAND vendor, for each NAND technology generation. They will help to reduce the workload on the host processor, simplify product development, shorten time-to-market and increase ease of use of memory products. Raw NAND es--#TM SmartNANDTM BENANDTM CPU CPU CPU CPU Bad Block Bad Block Bad Block Management HS-MMC I/F Management Management Wear Leveling Wear Leveling Wear Leveling Garbage Collection High added value with Garbage Collection Garbage Collection control functionality ECC such as ECC HS-MMC Driver NAND I/F NAND I/F Less susceptible (ATA alike) NAND I/F to the impact of specification changes due to MLC NAND Driver SLC NAND Driver MLC NAND transitions to new HS-MMC I/F Driver NAND generations Bad Block Management Wear Leveling Garbage Collection NAND I/F NAND Chip ECC ECC Solid line: Hardware NAND I/F Dotted line: Software NAND I/F ECC MLC NAND Chip MLC NAND Chip SLC NAND Chip 4 NAND Flash Products with Control Functionality Qe.MMCTM Lineup e-MMCTM is a family of NAND flash memories with control functionality that offer control functions such as ECC, wear leveling and bad-block management. e-MMCTM also provides a high-speed memory card interface compliant with JEDEC/MMCA Version 4.4/4.41, eliminating the need for users to be concerned about directly controlling NAND flash memories. Thus, e-MMCTM can easily be used as an embedded MultiMedia Card (MMC) memory. Operating Speed Power Supply Capacity Part Number Temperature Package (MHz) Vcc (V) VccQ (V) (˚C) 2 GB THGBM4G4D1HBAIR 4 GB THGBM4G5D1HBAIR P-VFBGA153 8 GB THGBM4G6D2HBAIR 1.65 to 1.95 16 GB THGBM4G7D2GBAIE Up to 52 2.7 to 3.6 –25 to 85 2.7 to 3.6 32 GB THGBM4G8D4GBAIE P-TFBGA169 64 GB THGBM4G9D8GBAII 128 GB THGBM4T0DBGBAIJ P-FBGA169 e·MMCTM is a trademark of JEDEC/MMCA. QSmartNANDTM Lineup SmartNANDTM is a family of NAND products with embedded ECC that provides a standard raw NAND interface. Toshiba is expanding its SmartNANDTM portfolio with the introduction of large-capacity products. You can easily use SmartNANDTM together with existing host controllers (hardware) and existing MLC NAND driver software on the host side. Operating Page Size Power Supply Capacity (Note) /CE Signal & Ready/Busy Signal Temperature Package Part Number (bytes) Vcc (V) (˚C) 4 GB THGVR1G5D1HTA00 48-pin TSOP THGVR1G6D1GTA00 1 & 1 48-pin TSOP 8 GB 52-land LGA THGVR1G6D1GLA09 0 to 70 8 K 2.7 to 3.6 (Note) 16 GB THGVR1G7D2GLA09 –25 to 85 32 GB THGVR1G8D4GLA09 2 & 2 52-land LGA 64 GB THGVR1G9D8GLA09 SmartNANDTM is a trademark of TOSHIBA CORPORATION. Note: The SmartNANDTM products listed above are guaranteed over the 0°C to 70°C temperature range. For products with the -25°C to 85°C temperature range, contact your local Toshiba sales representative. QBENANDTM Lineup BENAND™ is an SLC NAND flash solution with embedded ECC, which removes the burden of ECC from the host processor. Use of the common NAND interface allows BENAND™ to maintain compatibility with general SLC NAND flash in terms of the command set, device operation, packaging, pin configuration, etc. Therefore, the latest BENAND™ can easily be used as a replacement for a general SLC NAND flash without being concerned about a system's error correction capability. Operating Page Size Block Size Power Supply Capacity (Note) I/O Temperature Package Part Number (bytes) (bytes) Vcc (V) (˚C) TC58BVG2S0FTA00 2.7 to 3.6 0 to 70 (Note) 48-pin TSOP I TC58BYG2S0FTA00 1.70 to 1.95 –40 to 85 x 8 TC58BVG2S0FBAI4 2.7 to 3.6 4 Gbit TC58BYG2S0FBAI4 1.70 to 1.95 4 K 256 K –40 to 85 63-ball BGA TC58BVG2S5FBAI4 2.7 to 3.6 x 16 TC58BYG2S5FBAI4 1.70 to 1.95 8 Gbit TC58BVG3S0FTA00 2.7 to 3.6 0 to 70 x 8 (Note) 48-pin TSOP I (4 Gb x 2) TC58BYG3S0FTA00 1.70 to 1.95 –40 to 85 BENANDTM is a trademark of TOSHIBA CORPORATION.
Load more

Recommended publications
  • Garbage Collection Understanding Foreground Vs
    Garbage Collection Understanding Foreground vs. Background GC and Other Related Elements Kent Smith Sr. Director of Corporate Marketing SandForce Flash Memory Summit August 2011 Santa Clara, CA 1 Understanding Garbage Collection (GC) • In flash memory, GC is the process of relocating existing data, deleting stale data, and creating empty blocks for new data • All SSDs will have some form of GC – it is not an optional feature • NAND flash cannot directly overwrite a page with data; it has to be first erased • One full block of pages has to be erased, not just one page • GC starts after each page has been written one time • Valid data is consolidated and written into new blocks • Invalid (replaced) data is ignored and gets erased • Wear leveling mainly occurs during GC Source: Wikipedia Flash Memory Summit 2011 Santa Clara, CA 2 How the OS Deletes Data • The OS tracks what files are present and what logical blocks are holding the files • SSDs do not understand the file structure of an OS; they only track valid data locations reported by the OS • When the OS deletes a file, it marks the file’s space in its logical table as free ► It does not tell the drive anything • When the OS writes a new file to the drive, it will eventually write to the previously used spaces in the table ► An SSD only knows data is no longer needed when the OS tells it to write to an address that already contains data Flash Memory Summit 2011 Santa Clara, CA 3 Understanding the TRIM Command • The OS* sends a TRIM command** at the point of file deletion • The SSD marks
    [Show full text]
  • Storage Solutions for Embedded Applications
    White Paper Storage Solutions Brian Skerry Sr. Software Architect Intel Corporation for Embedded Applications December 2008 1 321054 Storage Solutions for Embedded Applications Executive Summary Any embedded system needs reliable access to storage. This may be provided by a hard disk drive or access to a remote storage device. Alternatively there are many flash solutions available on the market today. When considering flash, there are a number of important criteria to consider with capacity, cost, and reliability being foremost. This paper considers hardware, software, and other considerations in choosing a storage solution. Wear leveling is an important factor affecting the expected lifetime of any flash solution, and it can be implemented in a number of ways. Depending on the choices made, software changes may be necessary. Solid state drives offer the most straight forward replacement option for Hard disk drives, but may not be cost-effective for some applications. The Intel® X-25M Mainstream SATA Solid State Drive is one solution suitable for a high performance environment. For smaller storage requirements, CompactFlash* and USB flash are very attractive. Downward pressure continues to be applied to flash solutions, and there are a number of new technologies on the horizon. As a result of reading this paper, the reader will be able to take into consideration all the relevant factors in choosing a storage solution for an embedded system. Intel® architecture can benefit the embedded system designer as they can be assured of widespread
    [Show full text]
  • How Controllers Maximize SSD Life
    SSSI TECH NOTES How Controllers Maximize SSD Life January 2013 by SNIA SSSI Member: Jim Handy Objective Analysis “The SSD Guy” www.snia.org1 About the Solid State Storage Initiative The SNIA Solid State Storage Initiative (SSSI) fosters the growth and success of the market for solid state storage in both enterprise and client environ- ments. Members of the SSSI work together to promote the development of technical standards and tools, educate the IT communities about solid state storage, perform market outreach that highlights the virtues of solid state storage, and collaborate with other industry associations on solid state stor- age technical work. SSSI member companies come from a wide variety of segments in the SSD industry www.snia.org/forums/sssi/about/members. How Controllers Maximize SSD Life by SNIA SSSI Member: Jim Handy “The SSD Guy”, Objective Analysis Table of Contents Introduction 2 How Controllers Maximize SSD Life 2 Better Wear Leveling 3 External Data Buffering 6 Improved ECC 7 Other Error Management 9 Reduced Write Amplification 10 Over Provisioning 11 Feedback on Block Wear 13 Internal NAND Management 14 1 Introduction This booklet contains a collection of posts from Jim Handy’s SSD Guy blog www.TheSSDGuy.com which explores the various techniques designers use to increase SSD life. How Controllers Maximize SSD Life How do controllers maximize the life of an SSD? After all, MLC flash has a lifetime of only 10,000 erase/write cycles or fewer and that is a very small number compared to the write traffic an SSD is expected to see in a high- workload environment, especially in the enterprise.
    [Show full text]
  • For Immediate Release
    For Immediate Release Media Contact: Story Public Relations Michael Schoolnik [email protected] SandForce SSD Processors Transform Mainstream Data Storage Breakthrough DuraClass Technology Sets New Standards for SSD Reliability, Performance and Energy Efficiency SARATOGA, CA. – April 13, 2009 – SandForce™ Inc., the pioneer of SSD (Solid State Drive) Processors that enable commodity NAND flash deployment in enterprise and mobile computing applications, today emerged from stealth mode and unveiled its first product, the SF‐1000 SSD Processor family. These highly‐integrated silicon devices address the inherent endurance, reliability, and data retention issues associated with NAND flash memory, making it possible to build SSDs that deliver unprecedented performance over the life of the drive with orders‐of‐magnitude higher reliability than enterprise‐class HDDs (Hard Disk Drives). The SandForce patent‐pending DuraClass™ technology promises to accelerate mass‐market SSD adoption. Leading OEMs are expected to release both SLC (single level cell) and MLC (multi‐level cell) flash‐based SSDs using SandForce single‐chip SSD Processors later this year. IDC expects worldwide shipments of SSD's in the Enterprise and PC markets will exceed 40 million units in 2012, representing a CAGR of 171% from 2007‐20121. “The SF‐1000 SSD Processor Family promises to address key NAND flash issues allowing MLC flash technologies to be reliably used in broad based, mission critical storage environments,” said Mike Desens, Vice President for System Design, IBM.
    [Show full text]
  • Wolfram: Enhancing Wear-Leveling and Fault Tolerance in Resistive
    WoLFRaM: Enhancing Wear-Leveling and Fault Tolerance in Resistive Memories using Programmable Address Decoders Leonid Yavits‡ Lois Orosa§ Suyash Mahar⋆ João Dinis Ferreira§ Mattan Erez† Ran Ginosar‡ Onur Mutlu§ ‡Technion-Israel Institute of Technology §ETH Zürich ⋆Indian Institute of Technology Roorkee †University of Texas Austin Resistive memories have limited lifetime caused by limited which reduces wear-leveling eciency. Fourth, most tech- write endurance and highly non-uniform write access patterns. niques are relatively slow because they level out the write Two main techniques to mitigate endurance-related memory fail- non-uniformity in a sequential fashion. The goal of wear- ures are 1) wear-leveling, to evenly distribute the writes across leveling is to extend the lifetime of memory cells as much the entire memory, and 2) fault tolerance, to correct memory cell as possible. Once memory cells reach their endurance limits, failures. However, one of the main open challenges in extend- resistive memory needs fault tolerance to continue operating. ing the lifetime of existing resistive memories is to make both Fault tolerance mechanisms [4, 5, 7–17, 26, 35, 47, 48, 57, 58, 60, techniques work together seamlessly and eciently. 64–67, 69, 76, 81, 87, 89, 102, 103, 113] typically enable recovery To address this challenge, we propose WoLFRaM, a new mech- from several failed bits per data page or data block. anism that combines both wear-leveling and fault tolerance Unfortunately, to our knowledge, there is no technique that techniques at low cost by using a programmable resistive ad- combines both wear-leveling and fault tolerance techniques in dress decoder (PRAD).
    [Show full text]
  • Flash Memory Guide
    Flash Memory Guide Portable Flash memory for computers, digital cameras, mobile phones and other devices Flash Memory Guide Kingston®, the world’s leading independent manufacturer of memory products, offers a broad range of Flash cards, USB Flash drives and Solid-State Drives (SSD) (collectively called Flash storage devices) that employ Flash memory chips for storage. The purpose of this guide is to explain the various technologies and Flash memory offerings that are available. Note: Due to Flash technology changes, specifications listed in this document are subject to change without notice 1.0 Flash Memory: Empowering A New Generation of Flash Storage Devices Toshiba invented Flash memory in the 1980s as a new memory technology that allowed stored data to be saved even when the memory device was disconnected from its power source. Since then, Flash memory technology has evolved into the preferred storage media for a variety of consumer and industrial devices. In consumer devices, Flash memory is widely used in: • Notebook computers • Personal computers • Tablets • Digital cameras • Global Positioning Systems (GPS) • Mobile phones • Solid-state music players such as • Electronic musical instruments MP3 players • Television set-top boxes • Portable and Home Video game consoles Flash memory is also used in many industrial applications where reliability and data retention in power-off situations are key requirements, such as in: • Security systems/IP Cameras • Military systems • Embedded computers • Set-top boxes • Networking and communication products • Wireless communication devices • Retail management products • Point of Sale Devices (e.g., handheld scanners) Please Note: Most Kingston Flash memory is designed and tested for compatibility with consumer devices.
    [Show full text]
  • Wear Leveling Architecture and Read Disturbance Technology for Solid-State Drives
    An InnoDisk White Paper August 2012 Wear Leveling Architecture And Read Disturbance Technology For Solid-State Drives Prolonging SSD Lifespan And preventing Read Disturbance InnoDisk’s Wear Leveling Architecture and Read Disturbance Technology 0 Revision History Date Version Information 2012.07.09 1.0 First Release Introduction This white paper presents InnoDisk’s wear leveling process for prolonging the lifespan of a solid-state drive (SSD) and preventing read disturbance. Conventional file systems like FAT, UFS, HFS, ext 2 and NTFS were originally designed for magnetic strips and as such rewrite data repeatedly to the same area. However, SSDs can be put through a limited number of erase cycles before becoming unreliable. This is usually around 3,000/100,000(MLC/SLC) cycles. Wear leveling works around these limitations by spreading erasures and re-writes across multiple blocks in an SSD. In this way, no single block is subjected to constant read/writes. How InnoDisk’s Wear Leveling architecture and technology prolongs SSD lifespan and prevents read disturbance InnoDisk uses a combination of two types of wear leveling – dynamic and static wear leveling – to distribute write cycling across an SSD. Both types of wear leveling use a map to link Logical Block Address (LBAs) from the OS to the physical Flash memory. Static wear leveling, however, differs in that static blocks that do not change are periodically moved so that low usage cells are able to be used by other data. System Buffer Blocks and Dynamic Wear Leveling Because Flash blocks can’t be overwritten, some spare blocks need to be reserved for temporary data buffering.
    [Show full text]
  • A High-Performance Wear- Leveling Algorithm for Flash Memory System
    LETTER IEICE Electronics Express, Vol.9, No.24, 1874-1880 A high-performance wear- leveling algorithm for flash memory system Ching-Che Chung1a), Duo Sheng2, and Ning-Mi Hsueh1 1 Department of Computer Science & Information Engineering, National Chung- Cheng University, 168 University Road, Min-Hsiung, Chia-Yi 621, Taiwan 2 Department of Electrical Engineering, Fu Jen Catholic University, 510 Chung-Cheng Rd. Hsin-Chung, Taipei 24205, Taiwan a) [email protected] Abstract: In this paper, a low-complexity high-performance wear- leveling algorithm which named sequential garbage collection (SGC) for flash memory system design is presented. The proposed SGC outperforms existing designs in terms of wear evenness and low design complexity. The lifetime of the flash memory can be greatly lengthened by the proposed SGC. The proposed SGC doesn’t require any tuning threshold parameter, and thus it can be applied to various systems without prior knowledge of the system environment for threshold tuning. Simulation results show that the maximum block erase count and standard deviation of the block erase count compared to the greedy algorithm are decreased by up to 75% and 94%, respectively. Keywords: NAND flash, wear leveling, garbage collection Classification: Storage technology References [1] A. Kawaguchi, S. Nishioka, and H. Motoda, “A flash-memory based file system,” Proc USENIX Annual Technical Conference, pp. 155–164, June 1995. [2] M. Rosenblum and J. K. Ousterhout, “The design and implementation of a log-structured file system,” ACM Transactions on Computers Systems, vol. 10, no. 1, pp. 26–52, Feb. 1992. [3] J.-W. Park, et al., “An integrated mapping table for hybrid FTL with fault- tolerant address cache,” IEICE Electron Express, vol.
    [Show full text]
  • Wear Leveling in Micron® NAND Flash Memory
    TN-29-61: Wear Leveling in NAND Flash Memory Introduction Technical Note Wear Leveling in Micron® NAND Flash Memory Introduction This document describes the recommended wear leveling algorithm to be implemented in the flash translation layer (FTL) software for Micron® NAND Flash memory. Wear Leveling and the Flash Translation Layer In Micron single-level cell (SLC) and multilevel cell (MLC)NAND Flash memory, each physical block can be programmed and erased reliably up to 100,000 and 10,000 times, respectively. For write-intensive applications, it is recommended to implement a wear leveling algorithm to monitor and spread the number of write cycles per block. In memory devices that do not use a wear leveling algorithm not all blocks get used at the same rate. The wear leveling algorithm ensures that equal use is made of all the available write cycles for each block. Wear leveling is implemented in the flash translation layer (FTL), which is the additional software layer between the file system and the NAND Flash memory. The FTL allows operating systems to read and write to NAND Flash memory devices in the same way as disk drives and provides the translation from virtual to physical addresses. Wear leveling can also be implemented by the file system directly on the NAND Flash (see Figure 1). Refer to the data sheets for the full list of root part numbers and for further information on the devices (see “References” on page 5). PDF: 09005aef8467d996/Source: 09005aef8467d99e Micron Technology, Inc., reserves the right to change products or specifications without notice. tn2961_wear_leveling_in_nand.fm - Rev.
    [Show full text]
  • Flash Memory
    Semiconductor Catalog Mar. 2016 Flash Memory STORAGE PRODUCTS & SEMICONDUCTOR SEMICONDUCTOR & STORAGE PRODUCTS http://toshiba.semicon-storage.com/ FlashF l ash M emor Memoryy Toshiba, the inventor of Flash Memory, blazed the trail to a world we can all carry data, music and videos with us, wherever we go. Now, Flash Memory is playing a major role in driving the evolution of automobiles and industrial equipment that is essential for realizing an environmentally friendly society. Behind the scenes, Flash Memory supports the world’s continuing transformation to a better tomorrow. Back in 1984, Toshiba developed a new semiconductor memory, Flash Memory, and by doing led the industry, and its competitors, into the next generation. Today the international de facto standard, Flash Memories have realized an immense range of applications that include Memory Cards, Solid-State Drives (SSDs), and even industrial equipment. As the total volume of information continues its exponential growth, demand for storage units using Flash Memories will grow with it. In order to meets these market needs, Toshiba has made major investments in plant and equipment at its Yokkaichi memory fab, and is resolutely committed to develop new products. This brochure highlights Toshiba's Flash Memory and other Memory Solutions. Toshiba's Leading Technology Areas Features of Toshiba's Flash Memory W Process W Fast storage of large files W Multi-Level Cell (MLC) W Fast write and erase rates W Controller W Low per-bit cost W Die stacking W Easily extendable using the NAND Flash Memory interface W Packaging W Extensive product portfolio to meet diverse needs OProducts with the standard HS-MMC interface OOffers products with the high-speed UHS-I and UHS-II SD bus interfaces OAvailable as SD Memory Cards with unique features – 2 – Toshiba's Flash Memory and controller technologies have found a wide range of applications.
    [Show full text]
  • Sandforce® SF3500 Family
    SandForce® SF3500 Family CLIENT FLASH CONTROLLERS Data Sheet Rapidly evolving NAND flash memory that leverages new flash types and Key Features and Benefits technologies delivers benefits in a form of higher density and lower cost per GB. At • Optimized for client SSD the same time, as NAND flash memory geometries shrink, delivering the endurance applications and reliability that customers demand becomes more challenging. • Scalable and flexible SF3000 The Seagate® SandForce SF3500 family of flash controllers is engineered to solve architecture the challenges of evolving NAND flash memory, and enable SSD manufacturers to • Native SATA and PCIe NVMe build robust SATA and PCIe NVMe SSDs with a greater capacity using the most interfaces in a single ASIC design advanced NAND flash memory for cost-sensitive client SSD applications. • Up to 1TB capacity • Supports the latest 10nm-class Performance and Power Optimizations MLC, TLC and 3D NAND flash SF3500 flash controllers deliver exceptional, consistent performance in real-world • DRAM support for improved applications with balanced read/write speeds and low predictable latency even latency with high entropy data. The SF3500 family is optimized for low-power environments • Award-winning DuraClass™ and supports ultra-low power sleep modes to maximize battery life and meet the technology delivers enhanced aggressive power requirements in the latest laptop and Ultrabook systems. performance, endurance, reliability and power efficiency Endurance and Reliability • SHIELD™ advanced error correction combines LDPC and DSP for The SF3500 family combines several techniques to extend flash memory life higher data reliability and longer and maintain data integrity. Enhanced DuraWrite™ data reduction lowers write endurance amplification and P/E cycles to maximize SSD endurance.
    [Show full text]
  • Extending the Lifetime of Flash-Based Storage Through Reducing Write Amplification from File Systems
    Extending the Lifetime of Flash-based Storage through Reducing Write Amplification from File Systems Youyou Lu Jiwu Shu∗ Weimin Zheng Department of Computer Science and Technology, Tsinghua University Tsinghua National Laboratory for Information Science and Technology ∗Corresponding author: [email protected] [email protected], [email protected] Abstract storage systems. However, the increased density of flash memory requires finer voltage steps inside each cell, Flash memory has gained in popularity as storage which is less tolerant to leakage and noise interference. devices for both enterprise and embedded systems As a result, the reliability and lifetime of flash memory because of its high performance, low energy and reduced have declined dramatically, producing the endurance cost. The endurance problem of flash memory, however, problem [18, 12, 17]. is still a challenge and is getting worse as storage Wear leveling and data reduction are two common density increases with the adoption of multi-level cells methods to extend the lifetime of the flash storage. With (MLC). Prior work has addressed wear leveling and wear leveling, program/erase (P/E) operations tend to be data reduction, but there is significantly less work on distributed across the flash blocks to make them wear out using the file system to improve flash lifetimes. Some evenly [11, 14]. Data reduction is used in both the flash common mechanisms in traditional file systems, such as translation layers (FTLs) and the file systems. The FTLs journaling, metadata synchronization, and page-aligned introduce deduplication and compression techniques to update, can induce extra write operations and aggravate avoid updates of redundant data [15, 33, 34].
    [Show full text]