IEEE 1394: Changing the Way We Do Multimedia Communications
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Peiya Liu Standards Siemens Corporate Research IEEE 1394: Changing the Way We Do Multimedia Communications he mark of a good bus design is to be general- dard provides a way to move high-bandwidth Tpurpose enough so that its use expands to video and audio digital traffic among peer applications beyond those for which it was origi- devices—digital video recorders, DVD, cam- nally intended. Compare the narrowly defined corders, and high-speed/high-resolution printers EISA (Extended Industry Standard Architecture) and scanners. It supports hot-swapping and plug- David Thompson specification and the now-defunct MicroChannel and-play to improve the experience of consumers Bell Labs bus to the vibrant IEEE 1394 standard, which has who want to use 1394-enabled products. In addi- numerous specifications built around it already, tion, IEEE 1394b is waiting in the wings with and many more under development. speeds up to 1,600 Mbps and 3,200 Mbps on the This article highlights some of the many appli- horizon. cations made possible—or made better—by One of the advantages of choosing a serial expanding on the 1394 standard. It also directs interface over a parallel interface is the reduced you to the key specifications that have developed size of the required connectors and cables—an for each of the application areas. important consideration in portable consumer products where the IEEE 1394 first made inroads. What is the 1394 specification? The 1394 spec calls for six wires—two differential First introduced as Firewire by Apple Comput- pairs plus power and ground. The protocol defines er in the late 1980s, the now-approved IEEE 1394 two connectors. The four-pin 1394 connector has standard was designed to support high-bandwidth the size advantage: at 5 mm × 3 mm, it’s about requirements of devices such as digital video half the size of a universal serial bus (USB) con- equipment and high-performance mass storage. nector. The six-pin connector measures 10 mm × The original specification, IEEE 1394-1995, was 5 mm and includes power and ground wires in ratified in 1995. An updated specification, IEEE addition to the signal wires. Figure 1 shows a Std. 1394a-2000, was approved in March 2000. cross-section of 1394 cable and the relative sizes IEEE 1394a describes a serial bus that supports of the four- and six-pin connectors. speeds of 100 Mbytes per second, 200 Mbps, and Throughout the history of the 1394 standard, up to 400 Mbps with much improved traffic con- there has been great debate over the connector. trol and power management features. The stan- Some groups opposed a four-pin connector Figure 1. IEEE 1394 six- Power pair wire cable and space- saving plug (six-pin version). Signal pairs: (2X) 94 1070-986X/00/$10.00 © 2000 IEEE because of its lack of power and ground wires. However, its size has made it one of the key rea- Transaction layer Isochronous sons for the spec’s rapid acceptance. channels The four-pin connector was so much smaller Packets than the USB connector that it was the connector t n e of choice for many consumer electronics products. m e Products such as camcorders—the first market g Link layer a n where the 1394 spec achieved broad acceptance— a m Cycle control Packet transmitter Packet receiver will always be self-powered, as will any portable s u b device. However, many PC peripherals such as con- l a i ferencing cameras and portable disk drives can take r Symbols e advantage of bus power from a six-pin connector— S and they do. By having power and ground wires in Physical layer the connector, designers can produce bus-powered peripherals at considerably lower cost than a bat- Encode/decode Arbitration Media interface tery-powered portable model of the same periph- eral. Therefore, the six-pin connector is more Interface to 1394 cable desirable when size isn’t the primary consideration. Hardware In addition to providing low-cost, high-speed, peer-to-peer communications with huge amounts of memory-mapped address space, the IEEE 1394 protocol is highly scalable. More importantly, for well, allowing data to pass from one device to Figure 2. The link and multimedia applications IEEE 1394 supports both another without passing through the link. For physical layers provide asynchronous and isochronous communications. example, if a PC has two 1394 ports—one con- the hardware Asynchronous transport is the traditional mem- nected to a printer and the other to a camcorder— connectivity for IEEE ory-mapped, load-and-store interface that ensures and the PC is designed to keep the physical 1394. error-free delivery of data, but its error-checking interface device powered, traffic can still pass protocols introduce time delays that make it between the printer and the camcorder, even if unsuitable for multimedia. On the other hand, the PC is turned off. error-checking is crucial for such tasks as writing The transaction layer implements the request- data to disks. Isochronous data transfer guarantees response protocol specified in the International throughput at a predetermined rate, making it ideal Organization for Standardization/International for the transmission of time-critical multimedia Electrotechnical Commission (ISO/IEC) 13213: data where some error can be tolerated. IEEE 1394 1994 Standard Control and Status Register (CSR) manages the packeting process, whereby space can Architecture for Microcomputer Buses (see be reserved for the transmission of both schemes. http://standards.ieee.org/catalog/bus.html#gen18). The transaction layer can be implemented in IEEE 1394 building blocks firmware or hardware. The link and physical layers The IEEE 1394 standard defines three layers: are implemented in digital and mixed-signal hard- physical, link, and transaction (see Figure 2). The ware technology, respectively. link and physical layers are the main building blocks of a 1394 interface. The link layer commu- Physical interface devices nicates with the transaction layer using an Physical interface devices connect PCs, work- acknowledged datagram, a one-way data transfer stations, and peripherals to an IEEE 1394 cable with request confirmation. The link layer handles and implement handshaking for data transfers. At packet transmission and reception, as well as the the same time, physical interface devices define cycle control for isochoronous channels. A trans- the transmission speed. Because of the enormous ceiver (physical interface) provides initialization difficulty of integrating analog and digital tech- April–June 2000 and arbitration services and manages the physical nologies on a physical interface device chip, just layer by ensuring that only one node sends data a handful of manufacturers can design and build at any time. The transceiver translates the serial these devices. The design challenge to build these data stream and signal levels before sending them chips is intensified with the step up to 800 Mbps to the link layer. and IEEE 1394b. Physical interface devices can be repeaters as Although all physical interface devices must 95 Standards Host Controller Interface (OHCI) standard software interface, which dramatically increased the usabil- As portable multimedia and ity of the 1394 standard with PC applications. The third generation of links integrates the physical computing devices become interface device and link functions. These integrat- ed devices further enhance the simplicity of design- increasingly popular, power ing a 1394 interface by reducing part count and cost (see the sidebar “Integrating Layers”). management is becoming Helper specifications increasingly important. While the 1394 specification carefully details physical interface device and link operation, it does- n’t define a standard application system interface. As a result, each vendor of first-generation link products had a different system interface. This fact meet certain standards the IEEE establishes, they limited the portability of early 1394 products across nevertheless differ from one another in various system-level applications. Additional specifications ways, with the number of ports supported repre- were needed to “help” improve the 1394 user expe- senting a key differentiating feature. For example, rience. The OHCI and power management specifi- some physical interface devices may have as few cations are two examples of “helper” specifications. as 48 pins in a 100-Mbps first-generation, one-port thin quad flat pack (TQFP). Others may have as Open Host Controller Interface many as 100 pins to accommodate 800-Mbps OHCI provides a standard operating-system speeds. The thermal characteristics of the physi- interface to the application. It defines common cal interface device chip package and the power register sets and services for a generic host con- dissipation of the physical interface device place troller. The interface targets silicon vendors and potential limits on the maximum number of ports software developers creating operating systems on one physical interface device chip. The IEEE and applications for OHCI-compliant 1394 chips. 1394a specification places a 16-port limit on a sin- OHCI allows communication between any 1394 gle physical interface device chip. controllers that support the standard through an Another important defining factor for physical implementation of the link layer protocol of the interface devices is power considerations. A wide 1394 serial bus, with additional features to support range of power-saving functions are available in the transaction and bus management layers. OHCI different physical interface devices. I’ll further dis- also includes direct memory access (DMA) engines cuss power management below. for high-performance data transfer, as well as a host bus interface, typically peripheral component Links interconnect (PCI). Links are the interface blocks between the appli- OHCI guarantees operating system compati- cation and the transceiver, or physical interface bility over multiple hardware platforms, provides device. Links provide the encoding and decoding clean plug-and-play at the firmware level, and functions that allow a PC to interact with a physi- guarantees that a hardware platform has multiple cal interface device.