The Quanta Image Sensor: Every Photon Counts
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A 2000 Frames / S Programmable Binary Image Processor Chip for Real Time Machine Vision Applications
A 2000 frames / s programmable binary image processor chip for real time machine vision applications A. Loos, D. Fey Institute of Computer Science, Friedrich-Schiller-University Jena Ernst-Abbe-Platz 2, D-07743 Jena, Germany {loos,fey}@cs.uni-jena.de Abstract the inflexible and fixed instruction set. To meet that we present a so called ASIP (application specific instruction Industrial manufacturing today requires both an efficient set processor) which combines the flexibility of a GPP production process and an appropriate quality standard of (General Purpose Processor) with the speed of an ASIC. each produced unit. The number of industrial vision appli- cations, where real time vision systems are utilized, is con- tinuously rising due to the increasing automation. Assem- Embedded Vision System bly lines, where component parts are manipulated by robot 1. real scene image sensing, AD- CMOS-Imager grippers, require a fast and fault tolerant visual detection conversion and read out of objects. Standard computation hardware like PC-based 2. grey scale image image segmentation platforms with frame grabber boards are often not appro- representation priate for such hard real time vision tasks in embedded sys- 3. raw binary image image enhancement, tems. This is because they meet their limits at frame rates of representation removal of disturbance a few hundreds images per second and show comparatively ASIP FPGA long latency times of a few milliseconds. This is the result 4. improved binary image calculation of of the largely serial working and time consuming process- projections ing chain of these systems. In contrast to that we designed 5. -
CMOS Sensors Enable Phone Cameras, HD Video
CMOS Sensors Enable Phone Cameras, HD Video NASA Technology to come of age by the late 1980s. These image sensors already used in CCDs. Using this technique, he measured comprise an array of photodetecting pixels that collect a pixel’s voltage both before and after an exposure. “It’s eople told me, ‘You’re an idiot to work on charges when exposed to light and transfer those charges, like when you go to the deli counter, and they weigh the this,’” Eric Fossum recalls of his early experi- pixel to pixel, to the corner of the array, where they are container, then weigh it again with the food,” he explains. ments with what was at the time an alternate “P amplified and measured. The sampling corrected for the slight thermal charges and form of digital image sensor at NASA’s Jet Propulsion While CCD sensors are capable of producing scientific- transistor fluctuations that are latent in photodetector Laboratory (JPL). grade images, though, they require a lot of power and readout, and it resulted in a clearer image. His invention of the complementary metal oxide extremely high charge-transfer efficiency. These difficulties Because CMOS pixels are signal amplifiers themselves, semiconductor (CMOS) image sensor would go on to are compounded when the number of pixels is increased for they can each read out their own signals, rather than trans- become the Space Agency’s single most ubiquitous spinoff higher resolution or when video frame rates are sped up. ferring all the charges to a single amplifier. This lowered technology, dominating the digital imaging industries and Fossum was an expert in CCD technology—it was why voltage requirements and eliminated charge transfer- enabling cell phone cameras, high-definition video, and JPL hired him in 1990—but he believed he could make efficiency issues. -
United Health Group Capacity Analysis
Advanced Technical Skills (ATS) North America zPCR Capacity Sizing Lab SHARE Sessions 7774 and 7785 August 4, 2010 John Burg Brad Snyder Materials created by John Fitch and Jim Shaw IBM 1 © 2010 IBM Corporation Advanced Technical Skills Trademarks The following are trademarks of the International Business Machines Corporation in the United States and/or other countries. AlphaBlox* GDPS* RACF* Tivoli* APPN* HiperSockets Redbooks* Tivoli Storage Manager CICS* HyperSwap Resource Link TotalStorage* CICS/VSE* IBM* RETAIN* VSE/ESA Cool Blue IBM eServer REXX VTAM* DB2* IBM logo* RMF WebSphere* DFSMS IMS S/390* xSeries* DFSMShsm Language Environment* Scalable Architecture for Financial Reporting z9* DFSMSrmm Lotus* Sysplex Timer* z10 DirMaint Large System Performance Reference™ (LSPR™) Systems Director Active Energy Manager z10 BC DRDA* Multiprise* System/370 z10 EC DS6000 MVS System p* z/Architecture* DS8000 OMEGAMON* System Storage zEnterprise ECKD Parallel Sysplex* System x* z/OS* ESCON* Performance Toolkit for VM System z z/VM* FICON* PowerPC* System z9* z/VSE FlashCopy* PR/SM System z10 zSeries* * Registered trademarks of IBM Corporation Processor Resource/Systems Manager The following are trademarks or registered trademarks of other companies. Adobe, the Adobe logo, PostScript, and the PostScript logo are either registered trademarks or trademarks of Adobe Systems Incorporated in the United States, and/or other countries. Cell Broadband Engine is a trademark of Sony Computer Entertainment, Inc. in the United States, other countries, or both and is used under license therefrom. Java and all Java-based trademarks are trademarks of Sun Microsystems, Inc. in the United States, other countries, or both. Microsoft, Windows, Windows NT, and the Windows logo are trademarks of Microsoft Corporation in the United States, other countries, or both. -
Modeling for Ultra Low Noise CMOS Image Sensors
Thèse n° 7661 Modeling for Ultra Low Noise CMOS Image Sensors Présentée le 10 septembre 2020 à la Faculté des sciences et techniques de l’ingénieur Laboratoire de circuits intégrés Programme doctoral en microsystèmes et microélectronique pour l’obtention du grade de Docteur ès Sciences par Raffaele CAPOCCIA Acceptée sur proposition du jury Prof. E. Charbon, président du jury Prof. C. Enz, directeur de thèse Prof. A. Theuwissen, rapporteur Prof. E. Fossum, rapporteur Dr J.-M. Sallese, rapporteur 2020 Ma Nino non aver paura di sbagliare un calcio di rigore, non è mica da questi particolari che si giudica un giocatore, un giocatore lo vedi dal coraggio, dall’altruismo e dalla fantasia. — Francesco De Gregori To my family. Acknowledgements I would like to express my deep gratitude to my thesis advisor, Prof. Christian Enz. His guid- ance and support over the past few years helped me to expand my knowledge in the area of device modeling and sensor design. I am genuinely grateful for having taught me how important is to be methodical and to insist on the detail. My grateful thanks are also extended to Dr. Assim Boukhayma for his contribution and for having introduced me to the fascinating world of image sensors. His help and encouragement over the entire time of my Ph.D. studies daily motivated me to improve the quality of the research. I wish to thank Dr. Farzan Jazaeri for everything he taught me during my Ph.D. His passion for physics and device modeling has been a source of inspiration for the research. I would also like to express my deepest gratitude to Prof. -
Design and Architectures for Signal and Image Processing
EURASIP Journal on Embedded Systems Design and Architectures for Signal and Image Processing Guest Editors: Markus Rupp, Dragomir Milojevic, and Guy Gogniat Design and Architectures for Signal and Image Processing EURASIP Journal on Embedded Systems Design and Architectures for Signal and Image Processing Guest Editors: Markus Rupp, Dragomir Milojevic, and Guy Gogniat Copyright © 2008 Hindawi Publishing Corporation. All rights reserved. This is a special issue published in volume 2008 of “EURASIP Journal on Embedded Systems.” All articles are open access articles distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Editor-in-Chief Zoran Salcic, University of Auckland, New Zealand Associate Editors Sandro Bartolini, Italy Thomas Kaiser, Germany S. Ramesh, India Neil Bergmann, Australia Bart Kienhuis, The Netherlands Partha S. Roop, New Zealand Shuvra Bhattacharyya, USA Chong-Min Kyung, Korea Markus Rupp, Austria Ed Brinksma, The Netherlands Miriam Leeser, USA Asim Smailagic, USA Paul Caspi, France John McAllister, UK Leonel Sousa, Portugal Liang-Gee Chen, Taiwan Koji Nakano, Japan Jarmo Henrik Takala, Finland Dietmar Dietrich, Austria Antonio Nunez, Spain Jean-Pierre Talpin, France Stephen A. Edwards, USA Sri Parameswaran, Australia Jurgen¨ Teich, Germany Alain Girault, France Zebo Peng, Sweden Dongsheng Wang, China Rajesh K. Gupta, USA Marco Platzner, Germany Susumu Horiguchi, Japan Marc Pouzet, France Contents -
CMOS Active Pixel Image Sensors for Highly Integrated Imaging Systems
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 32, NO. 2, FEBRUARY 1997 187 CMOS Active Pixel Image Sensors for Highly Integrated Imaging Systems Sunetra K. Mendis, Member, IEEE, Sabrina E. Kemeny, Member, IEEE, Russell C. Gee, Member, IEEE, Bedabrata Pain, Member, IEEE, Craig O. Staller, Quiesup Kim, Member, IEEE, and Eric R. Fossum, Senior Member, IEEE Abstract—A family of CMOS-based active pixel image sensors Charge-coupled devices (CCD’s) are currently the dominant (APS’s) that are inherently compatible with the integration of on- technology for image sensors. CCD arrays with high fill-factor, chip signal processing circuitry is reported. The image sensors small pixel sizes, and large formats have been achieved and were fabricated using commercially available 2-"m CMOS pro- cesses and both p-well and n-well implementations were explored. some signal processing operations have been demonstrated The arrays feature random access, 5-V operation and transistor- with charge-domain circuits [1]–[3]. However, CCD’s cannot transistor logic (TTL) compatible control signals. Methods of be easily integrated with CMOS circuits due to additional on-chip suppression of fixed pattern noise to less than 0.1% fabrication complexity and increased cost. Also, CCD’s are saturation are demonstrated. The baseline design achieved a pixel high capacitance devices so that on-chip CMOS drive electron- size of 40 "m 40 "m with 26% fill-factor. Array sizes of 28 28 elements and 128 128 elements have been fabricated and ics would dissipate prohibitively high power levels for large characterized. Typical output conversion gain is 3.7 "V/e for the area arrays (2–3 W). -
A SIMD Microprocessor for Image Processing
A SIMD microprocessor for image processing Author: Zhiqiang Qiu Student ID: 20716003 Email: [email protected] Supervisor: Prof. Dr. Thomas Bräunl Computational Intelligence - Information Processing Systems (CIIPS) School of Electrical, Electronic and Computer Engineering The University of Western Australia 1 November 2013 A SIMD microprocessor for image processing Abstract The aim of this project is to design a Single Instruction Multiple Data (SIMD) microprocessor for image processing. Image processing is an important topic in computer science. There are many interesting applications based on image processing, such as stereo matching, 3D object reconstruction and edge detection. The core of image processing is matrix manipulations on the digital image. A digital image captured by a modern digital camera is made up of millions of pixels. The common challenge for most of image processing applications is the amount of data needs to be processed. It will be very slow if each pixel is processed in a sequential order. In addition, general-purpose microprocessors are highly inefficient for image processing due to their complicated internal circuit and large instruction set. One particular solution is to process all pixels simultaneously. A SIMD microprocessor with a simple instruction set can significantly increase the overall processing speed. This project focuses on the development of a SIMD image processor using software simulation. It takes a three step approach. The first step is to improve and further develop our circuit simulation software, Retro. Retro is a powerful circuit design tool with build-in real time graphical simulation. A number of improvements have been made to Retro to fulfil our design requirements. -
Traffic Management Using Image Processing and Arm Processor
International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 07 Issue: 05 | May 2020 www.irjet.net p-ISSN: 2395-0072 TRAFFIC MANAGEMENT USING IMAGE PROCESSING AND ARM PROCESSOR Bhaskar MS1, Nandana CH1, Navya S1, Pooja P1 1Department of ECE, Sai Vidya Institute of Technology, India-560064. ---------------------------------------------------------------------***--------------------------------------------------------------------- Abstract - In this paper, we aim to establish a smart and 2. With the advancement in computer technology, this system efficient traffic surveillance system which monitors the has an advantage of instantaneity, reliability and security. enormous movement of vehicles that cause traffic congestion. 3. It has easy maintenance. Here, we hope to develop a vision-based vehicle detection module that identifies the presence of vehicles and counts The rest of the paper is organized as follows: them. We achieve it with the help of Mali-C52, which is an ARM Section II: System overview based video processor which captures the real time video of Section III: System design and prototype the area of interest (AOI). This video is processed in various stages and is later interfaced with an ARM microcontroller Section IV: Conclusion which controls the traffic. II: SYSTEM OVERVIEW Key Words: Traffic congestion, Vehicle detection, MALI C52, Area of Interest (AOI) In the very first step, we obtain the real time video which is read and converted into images and then frames. This frame I: INTRODUCTION can be processed in a series of steps which are listed below: The rapid growth in the number of vehicles is a key feature of A. VEHICLE DETECTION BY BACKGROUND good economic development. -
Suchitra Sathyanarayana +1-858-717-2399 [email protected]
Suchitra Sathyanarayana +1-858-717-2399 [email protected] EDUCATION Doctor of Philosophy Nanyang Technological University, Singapore (Thesis submitted) M.Eng. (by research) Computer Eng., Nanyang Technological University, Singapore [2004-2006] B.Eng. (with Honors) Computer Eng., Nanyang Technological University, Singapore [1999-2003] RESEARCH EXPERIENCE Image Processing Architectures: Responsible for innovating high speed image processing cores by exploiting underlying parallelisms and image symmetries - (i) line feature extractor based on Hough Transform, which gives 1000x speedup; (ii) a novel parallel image rotation engine that achieves order of magnitude speedups especially for high-resolution images; (iii) low-cost pattern recognition system that achieves on-the-fly image rotation using line buffers and recognition using a simplified MLP neural network; (iv) a parallel EZW Wavelet encoding architecture that can be deployed for Haar based image compression systems. Hardware efficient techniques for Vision based Advanced Driver Assistance: As part of my PhD thesis, I developed computationally efficient techniques that detects and classifies various kinds of road markings, including lane markings, arrow markings of different types, zigzag markings, pedestrian markings etc. The proposed techniques are scale-invariant, hardware efficient and robust to complexities in road scenes such as shadows, lighting and weather changes. Vision-based Medical Applications: As part of my M.Eng (by research) thesis, I developed real-time techniques to assess the movements of camera during medical endoscopy. This included methods to infer camera rotations and longitudinal movements using image unrolling and corresponding matching of features. I am also currently involved with another PhD project on vision-based patient monitoring system, using multiple cues such as breathing and movements to infer abnormal patient behavior. -
Print Special Issue Flyer
IMPACT FACTOR 3.576 an Open Access Journal by MDPI Photon-Counting Image Sensors Guest Editors: Message from the Guest Editors Prof. Dr. Eric Fossum Dear Colleagues, [email protected] The field of photon-counting image sensors is advancing Prof. Dr. Nobukazu Teranishi rapidly with the development of various solid-state image [email protected] sensor technologies including single photon avalanche Prof. Dr. Albert Theuwissen detectors (SPADs) and deep-sub-electron read noise CMOS [email protected] image sensor pixels. This foundational platform technology will enable opportunities for new imaging modalities and Dr. David Stoppa instrumentation for science and industry, as well as new [email protected] consumer applications. Papers discussing various photon- Prof. Dr. Edoardo Charbon counting image sensor technologies and selected new [email protected] applications are presented in this all-invited Special Issue. Prof. Dr. Eric R. Fossum Prof. Dr. Edoardo Charbon Deadline for manuscript Dr. David Stoppa submissions: closed (12 February 2016) Prof. Dr. Nobukazu Teranishi Prof. Dr. Albert Theuwissen Guest Editors mdpi.com/si/6076 SpeciaIslsue IMPACT FACTOR 3.576 an Open Access Journal by MDPI Editor-in-Chief Message from the Editor-in-Chief Prof. Dr. Vittorio M.N. Passaro Sensors is a leading journal devoted to fast publication of Dipartimento di Ingegneria the latest achievements of technological developments Elettrica e dell'Informazione and scientific research in the huge area of physical, (Department of Electrical and Information Engineering), chemical and biochemical sensors, including remote Politecnico di Bari, Via Edoardo sensing and sensor networks. Both experimental and Orabona n. -
Image Processor May Be Copied by Individuals and Not - for - Profit
DISTRIBUTION RELIGION THE IMAGE PROCESSOR MAY BE COPIED BY INDIVIDUALS AND NOT - FOR - PROFIT INSTITUTIONS WITHOUT CHARGE FOR - PROFIT INSTITUTIONS WILL HAVE TO NEGOTIATE FOR PERMISSION TO COPY I VIEW MY RESPONSIBILITY TO THE EVOLUTION OF NEW CONSCIOUSNESS HIGHER THAN MY RESPONSIBILITY TO MAKE PROFIT ; I THINK CULTURE HAS TO LEARN TO USE HIGH-TEK MACHINES FOR PERSONAL AESTHETIC, .RELIGIOUS, INTUITIVE, COMPREHENSIVE, EXPLORATORY GROWTH THE DEVELOPMENT OF MACHINES LIKE THE IMAGE PROCESSOR IS PART OF THIS EVOLUTION I AM PAID BY THE STATE, AT LEAST IN PART, TO DO AND DISEMINATE THIS INFORMATION ; SO I DOI As I am sure you (who are you) understand a work like developing and expanding the Image Processor requires much money and time . The 'U' does not have much money for evolutionary work and getting of grants are almost as much work as holding down a job . Therefore, I have the feeling that if considerable monies were to be made with a copy of the Image Processor, I would like some of it . So, I am asking (not telling) that if considerable money were made, by an individual with a copy of. the Image Processor, or if a copy of the Image Processor were sold (to an individual or not-for-profit institution), I would like 20% gross profit . I Things like $100 .00 honorariums should be ignored . Of course enforcing such a request is too difficult to be bothered with . But let it be known that I consider it to be morally binding Much Love . Daniel J . Sandin Department of Art University of Illinois at Chicago Circle Box 4348 Chicago, Illinois 60680 Office phone : 312-996-8689 Lab phone: 312-996-2312 Messages : 312-996-3337 (Department of Art) NOTES ON THE AESTHETICS OF 'copying-an-Ima ge Processor' : Being a 'copier' of many things, in this case the first copier of an Image Processor, .1 trust the following notes to find meaning to . -
NASA Technologies Benefit Society
National Aeronautics and Space Administration NASA TECH N OLOGIE S BE N EFI T SOCIE T Y 2010 spinoff SPINOFF Office of the Chief Technologist On the cover: During the STS-128 space shuttle mission, a space-walking astronaut took this photograph of a portion of the International Space Station (ISS) flying high above Earth’s glowing horizon. This year marks the 10th 2010 anniversary of the ISS, and is also a year of beneficial spinoff technologies, as highlighted by the smaller images lined up against the backdrop of space. Spinoff Program Office NASA Center for AeroSpace Information Daniel Lockney, Editor Bo Schwerin, Senior Writer Lisa Rademakers, Writer John Jones, Graphic Designer Deborah Drumheller, Publications Specialist Table of Contents 7 Foreword 9 Introduction 10 International Space Station Spinoffs 20 Executive Summary 30 NASA Technologies Enhance Our Lives on Earth 32 NASA Partnerships Across the Nation 34 NASA Technologies Benefiting Society Health and Medicine Burnishing Techniques Strengthen Hip Implants ...............................................................38 Signal Processing Methods Monitor Cranial Pressure ..........................................................40 Ultraviolet-Blocking Lenses Protect, Enhance Vision ..........................................................42 Hyperspectral Systems Increase Imaging Capabilities ..........................................................44 Transportation Programs Model the Future of Air Traffic Management ......................................................48