Basic Semiconductor Physics and Technology 2

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Basic Semiconductor Physics and Technology 2 Chapter 1 Basic Semiconductor Physics and Technology 2 Typical power switching devices such as diodes, thyristors, and transistors are based on a monocrystalline group IV silicon semiconductor structure or, increasingly, a group IV polytype, silicon carbide. These semiconductor materials are distinguished by having a specific electrical conductivity, σ, somewhere between that of good conductors (>1020 free electron density) and that of good insulators (<103 free electron density). Silicon is less expensive, more widely used, and a more versatile processing material than silicon carbide, thus the electrical characteristics and processing properties of silicon are considered first, and in more detail. In pure silicon at equilibrium, the number of electrons is equal to the number of holes. The silicon is called intrinsic and the electrons are considered as negative charge-carriers. Holes and electrons both contribute CHAPTER 1 to conduction, although holes have less mobility due to the covalent bonding. Electron-hole pairs are continually being generated by thermal ionization and in order to preserve equilibrium previously generated 10 pairs recombine. The intrinsic carrier concentrations ni are equal, small (1.4x10 /cc), and highly dependent on temperature. In order to fabricate a power-switching device, it is necessary to increase greatly the free hole or electron population. This is achieved by deliberately doping the silicon, by adding specific impurities called dopants. The doped silicon is subsequently called extrinsic and as the concentration of dopant Nc Basic Semiconductor Physics increases, the resistivity ρ = 1/σ decreases. and Technology n-type:- Silicon doped with group V elements, such as As, Sb or P, will be rich in electrons compared to holes. Four of the five valence electrons of the group V dopant will take part in the covalent bonding with the neighbouring silicon atoms, while the fifth electron is only weakly attached and is relatively 'free'. The semi-conductor is called n-type because of its free negative charge-carriers. A group V dopant is called a donor, having donated an electron for conduction. The resultant electron impurity Power electronic circuits utilise power semiconductor switching devices which ideally present infinite concentration is denoted by N - the donor concentration. resistance when off, zero resistance when on, and switch instantaneously between those two states. It is D p-type:- If silicon is doped with atoms from group III, such as B, A , Ga or In, which have three valence necessary for the power electronics engineer to have a general appreciation of the semiconductor physics ℓ electrons, the covalent bonds in the silicon involving the dopant will have one covalent-bonded aspects applicable to power switching devices so as to be able to understand the vocabulary and the electron missing. The impurity atom can accept an electron because of the available thermal non-ideal device electrical phenomena. To this end, it is only necessary to attempt a qualitative description energy. The dopant is thus called an acceptor, which is ionised with a net positive charge. Silicon of switching devices and the relation between their geometry, material parameters, and physical operating doped with acceptors is rich in holes and is therefore called p-type. The resultant hole impurity mechanisms. concentration is denoted by N - the acceptor concentration. A Semiconductor Fabrication Electrons in n-type silicon and holes in p-type are called majority carriers, while holes in n-type and electrons Si, SiC, GaN in p-type are called minority carriers. In a given silicon material, at equilibrium, the product of the majority and minority carrier concentration is a constant: Types of silicon (1.19) p n n 2 (1.1) Single crystal o o i Multi crystalline where po and no are the hole and electron equilibrium carrier concentrations. Wafer processes Amorphous Si, SiC, GaN Therefore, the majority and minority concentrations are given by: 2 ni Alloying, Si for an n-type no N D therefore p o and N D (1.2) 2 ni Diffusion, Si for a p-type po N A therefore n o N A These equations show that the number of minority carriers decreases as the doping level increases. epi deposition CVD/MBE The resistivity, ρ, of doped silicon is V 11 ion implantation annealing L I (1.3) q n p J np A film deposition (1.2) -1 -1 CVD/PVD where: σ = 1/ρ = conductivity, Ω .cm Lithography (1.5) ρ = 1/σ = resistivity, Ω.cm Etching (1.6) 2 Oxidation (1.3) μn = electron mobility, cm / V-s Lift off processing (1.7) 2 μp = hole mobility, cm / V-s Resistor fabrication (1.8) -19 Isolation (1.9) q = electron charge, 1.602x10 C polysilicon deposition LP/pyrolysis -3 Wafer Cleaning (1.10) n = electron concentration, cm Planarization (1.11) p = hole concentration, cm-3 t Gettering (1.12) Lifetime control (1.13) Silicide formation (1.14) area ohmic contact (1.15) A=W×t width Processes and stages in semiconductor fabrication glassivation (1.16) W metallization (1.17) length L wire bonding (1.18) Figure 1.1. Elemental doped silicon. BWW 3 Power Electronics Chapter 1 Basic Semiconductor Physics and Technology 4 Resistance of semiconductor materials is usually expressed in terms of sheet resistance R□, which is related distribution of phosphorus can be attained by neutron radiation, commonly called neutron transmutation to resistance as follows. At a given temperature, the impurity depth xj, mobility μ, and impurity distribution doping, NTD. The neutron irradiation flux transmutes silicon atoms first into a silicon isotope with a short N(x) are related to sheet resistance by 2.62-hour half-lifetime, which then decays into phosphorus. Subsequent thermal annealing removes any 1 crystal damage caused by the irradiation. Neutrons can penetrate over 100mm into silicon, thus large silicon R (1.4) xj Ω/square crystals can be processed using the NTD technique. q N() x dx 0 The average resistivity is Rx and given a length L and width w, as defined in figure 1.1, the resistance, A p-n junction is the location in a semiconductor where the doping changes from p to n while the j R, is given by monocrystalline lattice continues undisturbed. A bipolar diode is thus created, which forms the basis of any LLL bipolar semiconductor device. RR Ω (1.5) A t w w The donor-acceptor doping junction is formed by any one of a number of process techniques, namely For parallel n-doped profiles, the resistance can be estimated by treating each layer independently: alloying, diffusion, epitaxy, ion implantation or the metallization for ohmic contacts. wt wtww t t 1 1 1 1 1 1 1 1 1 Power semiconductor device processing involves most of the following range of process possibilities. RRRtotal 1 2 .. .. ..R1 R 2 .. qni N Di t i (1.6) LLLL 1 1 1 1 i 1 Deposition is any process that grows, coats or otherwise transfers a material onto the wafer. Available Example 1.1: Resistance of homogeneously doped silicon technologies consist of physical vapour deposition (PVD), chemical vapour deposition (CVD), electrochemical deposition, molecular beam epitaxy (MBE), and atomic layer deposition. 17 3 Silicon doped with phosphorous (ND = 10 /cm ) measures 100μm by 10μm by 1μm. Calculate the sheet Removal processes are any that remove material from the wafer either in bulk or selective form and resistance and resistance between opposite faces, assuming the electron mobility at this doping level is μn = consist primarily of etch processes, both wet etching and dry etching such as reactive ion etch. 2 720cm / V-s. Doping to produce a p-type material has a hole mobility of 40% that for electrons. Recalculate Patterning covers the series of processes that shape or alter the existing shape of the deposited sheet resistance and resistance values. materials and is generally referred to as lithography. In conventional lithography, the wafer is coated with a chemical called a photoresist stepper Solution . The photoresist is exposed by a ‘ ’, a machine that focuses, aligns, and moves the mask, exposing select portions of the wafer to short wavelength UV light. The From equation (1.3), the resistivity, ρ, of doped silicon is unexposed regions are washed away by a developer solution. After etching or other processing, the 11 remaining photoresist is removed by oxygen plasma ashing or stripping. Modification of electrical properties consists of doping transistor sources and drains in diffusion q n p np furnaces and by ion implantation. These doping processes are followed by furnace annealing or in Since n >> p in the n-type silicon and assuming complete ionization advanced devices, by rapid thermal annealing which serve to activate the implanted dopants. 1 1 1 Modification of electrical properties extends to reduction of the dielectric constant in low-k insulating 0.086 Ωcm q n q N 1.6 1019 720 10 17 materials via exposure to ultraviolet light. n n D For a length of 100μm, the resistance is 1.1 Processes forming and involved in forming semiconductor devices Length L 100 104 R 0.086 8.6kΩ Area w t 10 1044 1 10 1.1.1 Alloying From equation (1.5) the sheet resistance is given by At the desired region on an n-type wafer, a small amount of p-type impurity is deposited. The wafer is then W 10 104 RRs 8.6kΩ 4 860 Ω/square heated in an inert atmosphere and a thin film of melt forms on the interface. On gradual, slow cooling, a L 100 10 continuous crystalline structure results, having a step or abrupt pn junction as shown in figure 1.2. This If the length is assumed to be one of the shorter dimensions, then for a length 10μm or 1μm, the process is not employed to form modern p-n junctions but can be used at the metallisation stage of wafer resistance is 86Ω or 0.86Ω, respectively, while the sheet resistance possibilities, depending on the fabrication.
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