38470 Shadow Valley Lane Yucaipa, CA 92399-7010, USA (909) 647-7540 www.lbaudiosystems.com [email protected]

HB-DAC1704 Version V2.0 (4 or 8 DAC Option)

1. Introduction

Why a new DAC design? There are numerous reasons for designing this new DAC:

Jitter: It is well known that reduces the sound quality. Jitter can be generated anywhere in the digital chain—transport, connections, receiver, system clock, etc. You can reduce the jitter by improving the mechanics, but the electronics are also a source of jitter, too. Normally, digital audio is transported via the SPDIF, AES/EBU, USB, etc. to the digital receiver. These interfaces transport the digital signal containing both the data and clock on a single wire (differential or coaxial). The digital receiver must split the clock from the data. Even the best chips add jitter in doing this. Maintaining less than 200 ps additional jitter is difficult. A way to overcome this problem is to resynchronize the incoming clock with a clean jitter free synchronous clock.

There are several possibilities to generate a synchronous clock. One way is to use a complex PLL design, however a PLL normally adds jitter in the digital receiver in doing clock recovery. Another way is to use a VCXO (voltage controlled crystal oscillator), but this would increase costs and complexity and jitter reduction is only addressed at one sample rate. A better method is to use a sample rate converter (SRC) with a fixed output frequency generated by a TCXO (temperature compensated low jitter crystal oscillator). The input frequency to the SRC is variable. This means the sample rate is variable (here from 44.1 kHz to 192 kHz). This concept reduces the jitter nearly to the jitter of the oscillator plus the jitter of the output stage of the SRC. If you add resynchronization after the SRC, jitter is further reduced. Here this is done by D type flip-flops which are clocked by the TCXO.

Digital filtering: For easy analogue filtering normally an 8x oversampling filter is used. But these filters add pre- and post-ringing to the signal. The sound is not so precise and clear. The sound can be slushier. In the HB-DAC1704 no traditional oversampling filters are used. Upsampling is done by a very precise interpolation in the SRC and no down-sampling filtering is needed when using the direct down- sampling feature of the high end chip (SRC4392) from Texas Instruments.

DAC: Here the very best R-2R DAC is used (PCM1704U-K). The advantage of a R-2R DAC versus a sigma-delta DAC is a much better resolution of small signals. This becomes very apparent in audio when the music is quieter and more complex. When the music is louder the ears is grows and effects like sound masking occurs. The HB-DAC1704 is available with either two or four DACs per channel to reduce and THD. Paralleling DACs also provides greater linearity. The DACs can work in single- ended (parallel) or in balanced configuration. The balanced configuration gives better noise immunity (common mode rejection).

Dual Operating Modes: Two switchable operating modes are available, SRC and NOS. The SRC mode converts (upsamples) the incoming signal sample rate to a higher fixed sampling frequency of 210.9 kHz. The signal is then directly down-sampled and resynchronized for input to the PCM1704 DACs. The NOS (non-oversampling) mode performs only a lossless format conversion of the digital signal in passing it to the PCM1704 DACs. For the AES/EBU/SPDIF inputs, the clock is taken from the digital receiver to clock the DACs directly. For the I2S input, the clock is taken from the low-jitter system clock. In the NOS mode, the jitter directly depends on the quality of the SRC4392 AES/EBU/SPDIF receiver or the quality of the I2S signal.

In total these advantages create a very precise and clear sound. Other features included are the two AES/EBU/SPDIF balanced inputs isolated with a transformer and selectable ground connection and an I2S input.

A very low noise power supply/regulator delivering ± 5V at 240mA is needed for the HB-DAC1704. It should have low noise in the lower frequency range below 1kHz. LBAudio offers very high quality I/V converters/filters and power supplies/regulators. These discrete JFET/MOSFET amplifiers offer very high resolution with the small amplitudes these DACs produce.

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38470 Shadow Valley Lane Yucaipa, CA 92399-7010, USA (909) 647-7540 www.lbaudiosystems.com [email protected]

2. Block Diagram

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3. Connection Diagram

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38470 Shadow Valley Lane Yucaipa, CA 92399-7010, USA (909) 647-7540 www.lbaudiosystems.com [email protected]

3.1 Power

The board is delivered with a power connector with colored cables. Connect RED to +5V, Blue to -5V and BLACK to Ground. The board will be destroyed if it is connected incorrectly. (The plug can only be connected one way.) Be sure that the voltages are in the specified range (+/-5V, +/-5%). There is no guarantee for reversed power connections!

3.2 AES/EBU/SPDIF Inputs

The digital audio receiver offers balanced inputs RX+ and RX–. The two AES/EBU/SPDIF inputs have signal isolation transformers. There is an option to ground the two RX– inputs between the transformers and the receiver. The ground jumper for an AES/EBU input should NOT be installed. For SPDIF input, the jumper should be installed. Figure 1 shows the simplified input schematic for AES/EBU/SPDIF. The AES/EBU input is terminated with 110 Ohm while SPDIF is terminated with 75 Ohm. Inputs can optionally be two each AES/EBU, two each SPDIF, or one of each.

Figure 1 -- Input Connection

3.3 I²S Input

The I²S input is a low voltage (3.3V) digital input. The BCK, LRCK, and SDATA should be driven with a damping resistor (100 Ohm). The BCK should also use a high quality coax cable. LRCK and SDATA signals are not so critical but a good cable termination should be used.

3.4 Analogue Out

The user can choose between a balanced current output or a single-ended (unbalanced) current output. This would allow four DACs per channel for the eight DAC version and two DACs per channel for the four DAC version. With the Balanced/Single-ended Mode Jumper connected, both channels are in balanced mode. Analog Output connector Pin 1 is the Iout + and Pin 3 is the Iout ̶ . Without jumper connected, the two DAC chips are working in parallel. Both Pin 1 and Pin 3 are Iout + and should be connected together.

3.5 Control Interface

A control board having two pushbuttons and 4 LEDs is required to control the board. Paragraph 4 provides a function description. Connect the second pins of the pushbuttons to ground (pin 8 and 9). The anodes of the LEDs must be connected to the connector pins with the cathodes connected to ground (pin 8 and 9). This is shown in figure 2.

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38470 Shadow Valley Lane Yucaipa, CA 92399-7010, USA (909) 647-7540 www.lbaudiosystems.com [email protected]

Figure 2 -- Control Interface

4. Functional Description

Most of the functionality is explained in the introduction and can be studied in the block diagram. The microcontroller (uC) is normally in total power down mode. No asynchronous clock from the uC disturbs the signals. The DACs power supplies are decoupled with low ESR ceramic and high quality electrolytic capacitors having more than four times the value as specified in the datasheet. The critical oscillator is a special very low jitter temperature compensated oscillator and has its own discrete power supply to further reduce the jitter.

The PCB is a 4 layer design to improve digital impedance requirements and to reduce the overall noise and crosstalk. See the noise specs at the end of this instruction.

4.1 uC Functionality

The main function of the uC is to initialize and configure the SRC4392, to select the different inputs, and to operate the LED display of selected functions.

4.2 Function Select

The two pushbuttons operate as follows: • Channel Select (PB1). Each push of the pushbutton changes the input channel with the default sequence being AES/EBU/SPDIF channel 1, followed by AES/EBU/SPDIF channel 2, then the I²S channel and back to the AES/EBU/SPDIF channel 1. • Non-Oversampling Mode Select (PB2). Each push on the pushbutton toggles between the NOS mode and the SRC mode. The SRC mode is the startup mode.

4.3 LED Indication

Four LEDs indicates the board status.

LED1 on: AES/EBU/SPDIF channel 1 selected LED2 on: AES/EBU/SPDIF channel 2 selected LED3 on: I2S channel selected LED4 on: NOS mode selected LED4 off: SRC mode selected

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38470 Shadow Valley Lane Yucaipa, CA 92399-7010, USA (909) 647-7540 www.lbaudiosystems.com [email protected]

5. Specifications of HB-DAC1704 Board Version V2.0

• PCB: Version V2.0, 4 Layer, Dimensions: 64.8 mm x 88 mm

• Supply voltage(s): +/-5V +/-5% regulated, low noise supply required

• Supply current: 180mA for +5VDC, 240mA for ‒5VDC (typical)

• Inputs: 2 x AES/EBU/SPDIF input, 110/75 Ohm isolated with signal transformer 1 x I²S input (header)

• Outputs analogue: Balanced Configuration: 8 DAC Version: 4 x current outputs, max. ±2.4 mA per output, stereo 4 DAC Version: 4 x current outputs, max. ±1.2 mA per output, stereo Unbalanced/Single-ended Configuration (parallel mode): 8 DAC Version: 2 x current outputs, max ±4.8mA per output, stereo 4 DAC Version: 2 x current outputs, max ±2.4 mA per output, stereo Selectable by jumper

• Control Interface: LED current to ground: 22mA maximum, short circuit protected

• Input Sample Rate: 4 kHz to 210.9 kHz

• DAC Sample Clock: 210.9kHz, or input clock rate w/o sample rate converter (selectable)

• System Clock: 27MHz, Period Jitter of oscillator typical 0.5ps rms

• Micro Controller: Always in total power down, except during channel selection or initialization

• THD: PCM1704U-K: 0.0008%

• Noise: Depends on the noise of the power supply (>120dB, typ.)

Designed by Hannes Frederiks in Germany and Handcrafted in the USA by Les Bordelon, LBAudio Systems

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6.Measurements

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7. Dimensions of Mounting Holes (in millimeters)

8. Photos

8 DAC Version 4 DAC Version Page 8