Network Protocol Design and Evaluation

Total Page:16

File Type:pdf, Size:1020Kb

Network Protocol Design and Evaluation Network Protocol Design and Evaluation 04 - Protocol Specification, Part I Stefan Rührup University of Freiburg Computer Networks and Telematics Summer 2009 Overview ‣ In the last chapter: • The development process (overview) ‣ In this chapter: • Specification • State machines and modeling languages • UML state charts and sequence diagrams • SDL and MSC (Part II) Network Protocol Design and Evaluation Computer Networks and Telematics Stefan Rührup, Summer 2009 2 University of Freiburg What are we modeling? Transitional Systems Reactive Systems input-output transformation event-driven e.g. scientific computation, compilers e.g. communication protocols, operating systems, control systems correctness criteria: correctness criteria: - termination - non-termination under normal - correctness of input-output conditions transformation - correctness of event-response actions formal models describe event-response sequences, including state information [S. Leue, Design of Reactive Systems, Lecture Notes, 2002] Network Protocol Design and Evaluation Computer Networks and Telematics Stefan Rührup, Summer 2009 3 University of Freiburg Specification with State Machines ‣ A protocol interacts with the environment • triggered by events • responds by performing actions • behaviour depends on the history of past events, i.e. the state event 1 state 1 state 2 action action event 2 ‣ state machines do not model the data flow, but the flow of control Network Protocol Design and Evaluation Computer Networks and Telematics Stefan Rührup, Summer 2009 4 University of Freiburg Specification with State Machines ‣ Why state machines? ...and not programming languages? • lack of formal semantics • risk of overspecification • requirements specification should be kept implementation-independent Network Protocol Design and Evaluation Computer Networks and Telematics Stefan Rührup, Summer 2009 5 University of Freiburg Finite State Machines ‣ Acceptors (sequence detectors) • produce a binary output (yes/no) on an input sequence • accept regular languages ‣ Transducers • Mealy machines (output determined on current state and input) • Moore machines (output determined on current state) • both models are equivalent Network Protocol Design and Evaluation Computer Networks and Telematics Stefan Rührup, Summer 2009 6 University of Freiburg Mealy Machines, Example 1 / 1 0 / 1 1 / 1 State In Out Next q0 q2 state q0 0 0 q1 state 0 / 0 0 / 0 q0 1 1 q0 q1 0 0 q2 q1 transition input / output q1 1 0 q1 q2 0 1 q2 1 / 0 q2 1 1 q0 state diagram state transition table Network Protocol Design and Evaluation Computer Networks and Telematics Stefan Rührup, Summer 2009 7 University of Freiburg Definition of a Mealy machine ‣ A Mealy state machine is a tuple (Q,q0,I,O,T,G), where • Q is a finite, non-empty set of states, • q0 ∈ Q is the initial state, • I is a finite set called the input alphabet, • O is a finite set called the output alphabet, • T is a transition function, T: S × I → S, and • G is an output function, G: S × I → O. Network Protocol Design and Evaluation Computer Networks and Telematics Stefan Rührup, Summer 2009 8 University of Freiburg Limitations of FSMs ‣ No data variables variable values and changes have to be coded into the state space → exponential state space explosion lift dial 0 dial 0 receiver q0 q1 q20 q30 dial 1 q21 q31 dial 2 dial 2 Example: dialing a telephone number q22 q32 Network Protocol Design and Evaluation Computer Networks and Telematics Stefan Rührup, Summer 2009 9 University of Freiburg Limitations of FSMs ‣ Problem with finite memory: • finite variable range • problem when modeling communication channels: - size of the channel unknown - determining buffer size = overspecification Network Protocol Design and Evaluation Computer Networks and Telematics Stefan Rührup, Summer 2009 10 University of Freiburg Limitations of FSMs ‣ Problem with concurrent FSMs • no communication channels • no synchronization • composition of interacting FSMs leads to new states and an explosion of the state space ‣ Communication protocols can be seen as concurrent state machines Network Protocol Design and Evaluation Computer Networks and Telematics Stefan Rührup, Summer 2009 11 University of Freiburg Limitations of FSMs ‣ Missing abstraction, missing composition dial digit [incomplete] dialed number has to dial digit Dial Tone Dialing be coded into states! lift receiver / play dial tone dial digit [valid] / connect hang up Idle Connecting Busy busy connected here, a group transition Talking Ringing could be used callee answers Network Protocol Design and Evaluation Computer Networks and Telematics Stefan Rührup, Summer 2009 12 University of Freiburg State machines for specification ‣ Original FSMs are not suitable for modeling and specifying processes in distributed systems ‣ Extended state machine models: • Communicating Finite State Machines • Harel statecharts (superstates, concurrent states) • Extended Finite State Machines (variables, operations, conditions) • Basis for many practical modeling and specification languages such as SDL, UML. Network Protocol Design and Evaluation Computer Networks and Telematics Stefan Rührup, Summer 2009 13 University of Freiburg Description Languages: Structure vs. Behaviour ‣ Structural languages: • describe the static, structural concept (architecture) • e.g. class diagrams, component diagrams ‣ Behavioural languages: • describe behaviour, i.e. activities, interaction • e.g. state machines and sequence diagrams Network Protocol Design and Evaluation Computer Networks and Telematics Stefan Rührup, Summer 2009 14 University of Freiburg Description Languages: Constructive vs. reflective ‣ Constructive languages: • describe information for executing the model or for (executable) code generation • e.g. state machines ‣ Reflective or assertive languages: • describe views of the model, statically or during execution • e.g. sequence diagrams [D. Harel: “Some thoughts on statecharts, 13 years later”, 1996] Network Protocol Design and Evaluation Computer Networks and Telematics Stefan Rührup, Summer 2009 15 University of Freiburg starting point CLOSED appl: passive open send: <nothing> appl: send: SYNactive open timeout starting point send: RST LISTEN CLOSED passive open appl: send: SYNsend data send: SYN, ACK appl: passive open Example:cv: RST re send: <nothing> cv: SYN; appl: re recv: SYN appl: close send: SYNactive open SYN_RCVDTCP state transition timeoutSYN_SENT send: SYN, ACK send: RST or timeout LISTEN simultaneous open active open passive open send: re<nothing>diagram appl: cv: ACK send: SYNsend data send: SYN, ACK cv: SYN, ACK re send: ACK cv: RST re cv: SYN; [Wright, Stevens: “TCP/IP Illustrated, re appl: close recv: FIN Volume 2: The Implementation”,ESTABLISHED 1995] CLOSE_WAIT recv: SYN appl: close send: FIN send: ACK SYN_RCVD SYN_SENT data transfer state send: SYN, ACK or timeout simultaneous open active open send: re<nothing> close appl: close cv: ACK send: FIN appl: send: FIN cv: SYN, ACK re send: ACK simultaneous close recv: FIN recv: ACK FIN_WAIT_1 CLOSING LAST_ACKappl: close recv: FIN send: ACK send: <nothing> ESTABLISHED CLOSE_WAIT send: FIN send: ACK re data transfer state cv: FIN, ACK passive close send: ACK recv: ACK recv: ACK close send: <nothing> send: <nothing> appl: close send: FIN appl: send: FIN recv: FIN simultaneous close FIN_WAIT_2 TIME_WAIT recv: FIN recv: ACK send: ACK FIN_WAIT_1 CLOSING LAST_ACK 2MSL timeout send: ACK send: <nothing> re active close cv: FIN, ACK passive close send: ACK recv: ACK recv: ACK normal transitions for client normal transitions for server send: <nothing> send: <nothing> appl: state transitions taken when application issues operation recv: state transitions taken when segment received send: what is sent for this transition recv: FIN FIN_WAIT_2 TIME_WAIT send: ACK 2MSL timeout TCP state transition diagram. active close Network Protocol Design and Evaluation normal transitions for client Computer Networks and Telematics Stefan Rührup, Summer 2009 normal16 transitions for server University of Freiburg appl: state transitions taken when application issues operation recv: state transitions taken when segment received send: what is sent for this transition Reprinted from TCP/IP Illustrated, Volume 2: The Implementation by Gary R. Wright and W.RichardStevens, Copyright © 1995 by Addison-Wesley Publishing Company,Inc. TCP state transition diagram. Reprinted from TCP/IP Illustrated, Volume 2: The Implementation by Gary R. Wright and W.RichardStevens, Copyright © 1995 by Addison-Wesley Publishing Company,Inc. +---------+ ---------\ active OPEN | CLOSED | \ ----------- +---------+<---------\ \ create TCB | ^ \ \ snd SYN Example: passive OPEN | | CLOSE \ \ ------------ | | ---------- \ \ create TCB | | delete TCB \ \ TCP connection V | \ \ +---------+ CLOSE | \ state diagram | LISTEN | ---------- | | +---------+ delete TCB | | rcv SYN | | SEND | | ----------- | | ------- | V +---------+ snd SYN,ACK / \ snd SYN +---------+ [RFC 793] | |<----------------- ------------------>| | | SYN | rcv SYN | SYN | | RCVD |<-----------------------------------------------| SENT | | | snd ACK | | | |------------------ -------------------| | +---------+ rcv ACK of SYN \ / rcv SYN,ACK +---------+ | -------------- | | ----------- | x | | snd ACK | V V | CLOSE +---------+ | ------- | ESTAB | | snd FIN +---------+ | CLOSE | | rcv FIN V ------- | | ------- +---------+ snd FIN / \ snd ACK +---------+ | FIN |<----------------- ------------------>| CLOSE | | WAIT-1 |------------------ | WAIT | +---------+ rcv FIN \ +---------+
Recommended publications
  • EB GUIDE Documentation Version 6.1.0.101778 EB GUIDE Documentation
    EB GUIDE documentation Version 6.1.0.101778 EB GUIDE documentation Elektrobit Automotive GmbH Am Wolfsmantel 46 D-91058 Erlangen GERMANY Phone: +49 9131 7701-0 Fax: +49 9131 7701-6333 http://www.elektrobit.com Legal notice Confidential and proprietary information. ALL RIGHTS RESERVED. No part of this publication may be copied in any form, by photocopy, microfilm, retrieval system, or by any other means now known or hereafter invented without the prior written permission of Elektrobit Automotive GmbH. ProOSEK®, tresos®, and street director® are registered trademarks of Elektrobit Automotive GmbH. All brand names, trademarks and registered trademarks are property of their rightful owners and are used only for description. Copyright 2015, Elektrobit Automotive GmbH. Page 2 of 324 EB GUIDE documentation Table of Contents 1. About this documentation ................................................................................................................ 15 1.1. Target audiences of the user documentation ......................................................................... 15 1.1.1. Modelers .................................................................................................................. 15 1.1.2. System integrators .................................................................................................... 16 1.1.3. Application developers ............................................................................................... 16 1.1.4. Extension developers ...............................................................................................
    [Show full text]
  • UML 2 Toolkit, Penker Has Also Collaborated with Hans- Erik Eriksson on Business Modeling with UML: Business Practices at Work
    UML™ 2 Toolkit Hans-Erik Eriksson Magnus Penker Brian Lyons David Fado UML™ 2 Toolkit UML™ 2 Toolkit Hans-Erik Eriksson Magnus Penker Brian Lyons David Fado Publisher: Joe Wikert Executive Editor: Bob Elliott Development Editor: Kevin Kent Editorial Manager: Kathryn Malm Production Editor: Pamela Hanley Permissions Editors: Carmen Krikorian, Laura Moss Media Development Specialist: Travis Silvers Text Design & Composition: Wiley Composition Services Copyright 2004 by Hans-Erik Eriksson, Magnus Penker, Brian Lyons, and David Fado. All rights reserved. Published by Wiley Publishing, Inc., Indianapolis, Indiana Published simultaneously in Canada No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, scanning, or otherwise, except as permitted under Section 107 or 108 of the 1976 United States Copyright Act, without either the prior written permission of the Publisher, or authorization through payment of the appropriate per-copy fee to the Copyright Clearance Center, Inc., 222 Rose- wood Drive, Danvers, MA 01923, (978) 750-8400, fax (978) 646-8700. Requests to the Pub- lisher for permission should be addressed to the Legal Department, Wiley Publishing, Inc., 10475 Crosspoint Blvd., Indianapolis, IN 46256, (317) 572-3447, fax (317) 572-4447, E-mail: [email protected]. Limit of Liability/Disclaimer of Warranty: While the publisher and author have used their best efforts in preparing this book, they make no representations or warranties with respect to the accuracy or completeness of the contents of this book and specifically disclaim any implied warranties of merchantability or fitness for a particular purpose.
    [Show full text]
  • UML Profile for Communicating Systems a New UML Profile for the Specification and Description of Internet Communication and Signaling Protocols
    UML Profile for Communicating Systems A New UML Profile for the Specification and Description of Internet Communication and Signaling Protocols Dissertation zur Erlangung des Doktorgrades der Mathematisch-Naturwissenschaftlichen Fakultäten der Georg-August-Universität zu Göttingen vorgelegt von Constantin Werner aus Salzgitter-Bad Göttingen 2006 D7 Referent: Prof. Dr. Dieter Hogrefe Korreferent: Prof. Dr. Jens Grabowski Tag der mündlichen Prüfung: 30.10.2006 ii Abstract This thesis presents a new Unified Modeling Language 2 (UML) profile for communicating systems. It is developed for the unambiguous, executable specification and description of communication and signaling protocols for the Internet. This profile allows to analyze, simulate and validate a communication protocol specification in the UML before its implementation. This profile is driven by the experience and intelligibility of the Specification and Description Language (SDL) for telecommunication protocol engineering. However, as shown in this thesis, SDL is not optimally suited for specifying communication protocols for the Internet due to their diverse nature. Therefore, this profile features new high-level language concepts rendering the specification and description of Internet protocols more intuitively while abstracting from concrete implementation issues. Due to its support of several concrete notations, this profile is designed to work with a number of UML compliant modeling tools. In contrast to other proposals, this profile binds the informal UML semantics with many semantic variation points by defining formal constraints for the profile definition and providing a mapping specification to SDL by the Object Constraint Language. In addition, the profile incorporates extension points to enable mappings to many formal description languages including SDL. To demonstrate the usability of the profile, a case study of a concrete Internet signaling protocol is presented.
    [Show full text]
  • Complete Code Generation from UML State Machine
    Complete Code Generation from UML State Machine Van Cam Pham, Ansgar Radermacher, Sebastien´ Gerard´ and Shuai Li CEA, LIST, Laboratory of Model Driven Engineering for Embedded Systems, P.C. 174, Gif-sur-Yvette, 91191, France Keywords: UML State Machine, Code Generation, Semantics-conformance, Efficiency, Events, C++. Abstract: An event-driven architecture is a useful way to design and implement complex systems. The UML State Machine and its visualizations are a powerful means to the modeling of the logical behavior of such an archi- tecture. In Model Driven Engineering, executable code can be automatically generated from state machines. However, existing generation approaches and tools from UML State Machines are still limited to simple cases, especially when considering concurrency and pseudo states such as history, junction, and event types. This paper provides a pattern and tool for complete and efficient code generation approach from UML State Ma- chine. It extends IF-ELSE-SWITCH constructions of programming languages with concurrency support. The code generated with our approach has been executed with a set of state-machine examples that are part of a test-suite described in the recent OMG standard Precise Semantics Of State Machine. The traced execution results comply with the standard and are a good hint that the execution is semantically correct. The generated code is also efficient: it supports multi-thread-based concurrency, and the (static and dynamic) efficiency of generated code is improved compared to considered approaches. 1 INTRODUCTION Completeness: Existing tools and approaches mainly focus on the sequential aspect while the concurrency The UML State Machine (USM) (Specification and of state machines is limitedly supported.
    [Show full text]
  • Mutating UML State Machine Behavior with Semantic Mutation Operators
    Mutating UML State Machine Behavior with Semantic Mutation Operators Anna Derezinska a and Łukasz Zaremba Institute of Computer Science, Warsaw University of Technology, Nowowiejska 15/19, Warsaw, Poland Keywords: Model-Driven Software Development, State Machine, Code Generation, Mutation Testing, Framework for Executable UML (FXU), C#. Abstract: In Model-Driven Software Development (MDSD), an application can be built using classes and their state machines as source models. The final application can be tested as any source code. In this paper, we discuss a specific approach to mutation testing in which modifications relate to different variants of behavioural features modelled by UML state machines, while testing deals with standard executions of the final application against its test cases. We have proposed several mutation operators aimed at mutating behaviour of UML state machines. The operators take into account event processing, time management, behaviour of complex states with orthogonal regions, and usage of history pseudostates. Different possible semantic interpretations are associated with each operator. The operators have been implemented in the Framework for eXecutable UML (FXU). The framework, that supports code generation from UML classes and state machines and building target C# applications, has been extended to realize mutation testing with use of multiple libraries. The semantic mutation operators have been verified in some MDSD experiments. 1 INTRODUCTION satisfying selected criteria (Jia and Harman, 2011). In a standard mutation testing process, syntactic Model-Driven Software Development (MDSD) can changes, so-called mutations, are injected into a be aimed at production of high quality software in a source code and supposed to be detected by test cases.
    [Show full text]
  • A Formalism for Specifying Model Merging Conflicts Mohammadreza Sharbaf, Bahman Zamani, Gerson Sunyé
    A Formalism for Specifying Model Merging Conflicts Mohammadreza Sharbaf, Bahman Zamani, Gerson Sunyé To cite this version: Mohammadreza Sharbaf, Bahman Zamani, Gerson Sunyé. A Formalism for Specifying Model Merging Conflicts. System Analysis and Modelling (SAM) conference, Oct 2020, Virtual Event, Canada. 10.1145/3419804.3421447. hal-02930770 HAL Id: hal-02930770 https://hal.archives-ouvertes.fr/hal-02930770 Submitted on 4 Sep 2020 HAL is a multi-disciplinary open access L’archive ouverte pluridisciplinaire HAL, est archive for the deposit and dissemination of sci- destinée au dépôt et à la diffusion de documents entific research documents, whether they are pub- scientifiques de niveau recherche, publiés ou non, lished or not. The documents may come from émanant des établissements d’enseignement et de teaching and research institutions in France or recherche français ou étrangers, des laboratoires abroad, or from public or private research centers. publics ou privés. A Formalism for Specifying Model Merging Conflicts Mohammadreza Sharbaf ∗ Bahman Zamani Gerson Sunyé MDSE Group, University of Isfahan MDSE Group, University of Isfahan LS2N, University of Nantes Isfahan, Iran Isfahan, Iran Nantes, France [email protected] [email protected] [email protected] ABSTRACT sites. Each of the participants focuses on specific aspects of the Verifying the consistency of model merging is an important step to- system and locally modifies only a particular part of the model. wards the support for team collaboration in software modeling and When participants deliver locally modified models, those need to evolution. Since merging conflicts are inevitable, this has triggered be integrated into a common relevant model for continuing the soft- intensive research on conflict management in different domains.
    [Show full text]
  • Activity Diagrams & State Machines
    2IW80 Software specification and architecture Activity diagrams & State machines Alexander Serebrenik This week sources Slides by Site by David Meredith, Kirill Fakhroutdinov Aalborg University, DK GE Healthcare, USA Before we start… True or False? 1. A web server can be an actor in a use case diagram. 2. Guarantee is an action that initiates the use case. 3. Use case “Assign seat” includes the use case “Assign window seat”. 4. Generalization is represented by an arrow with a hollow triangle head. 5. Every use case might involve only one actor. / SET / W&I 24-2-2014 PAGE 2 Before we start… T, unless it is a part of the system True or False? you want to model 1. A web server can be an actor in a use case diagram. Guarantee is a postcondition. An action that initiates the use case is called “trigger”. 2. Guarantee is an action that initiates the use case. 3. Use case “Assign seat” includes the use case “Assign window seat”. 4. Generalization is represented by an arrow with a hollow triangle head. 5. Every use case might involve only one actor. / SET / W&I 24-2-2014 PAGE 3 Before we start… True or False? 1. A web server can be an actor in a use case diagram. 2. GuaranteeNo, the correct is an relationaction that here initiates is extension the use (<<extend>>); case. <<include>> suggests that “Assign window seat” is always called whenever “Assign seat” is executed. 3. Use case “Assign seat” includes the use case “Assign window seat”. 4. Generalization is represented by an arrow with a hollow triangle head.
    [Show full text]
  • Institution-Based Encoding and Verification of Simple UML
    View metadata, citation and similar papers at core.ac.uk brought to you by CORE provided by Cronfa at Swansea University Institution-based Encoding and Verification of Simple UML State Machines in CASL/SPASS Tobias Rosenberger1;2, Saddek Bensalem2, Alexander Knapp3, and Markus Roggenbach1 1 Swansea University, U.K. ft.rosenberger.971978; [email protected] 2 Université Grenoble Alpes, France [email protected] 3 Universität Augsburg, Germany [email protected] Abstract. We present a new approach on how to provide institution-based seman- tics for UML state machines. Rather than capturing UML state machines directly # as an institution, we build up a new logical framework MD into which UML # state machines can be embedded. A theoroidal comorphism maps MD into the Casl institution. This allows for symbolic reasoning on UML state machines. By utilising the heterogeneous toolset HeTS that supports Casl, a broad range of verification tools, including the automatic theorem prover Spass, can be combined in the analysis of a single state machine. 1 Introduction As part of a longstanding line of research [9,10,19,8], we set out on a general programme to bring together multi-view system specification with UML diagrams and heterogeneous specification and verification based on institution theory, giving the different system views both a joint semantics and richer tool support. Institutions, a formal notion of a logic, are a principled way of creating such joint semantics. They make moderate assumptions about the data constituting a logic, give uniform notions of well-behaved translations between logics and, given a graph of such translations, automatically give rise to a joint institution.
    [Show full text]
  • Precise Semantics of UML State Machines (PSSM)
    An OMG® Executable UML® Publication Precise Semantics of UML State Machines (PSSM) Version 1.0 __________________________________________________ OMG Document Number: formal/2019-05-01 Date: May 2019 Normative reference: https://www.omg.org/spec/PSSM/1.0 Machine readable file(s): https://www.omg.org/PSSM/20181101 Normative: https://www.omg.org/spec/PSSM/20181101/PSSM_Syntax.xmi http s ://www.omg.org/spec/PSSM/20181101/PSSM_Semantics.xmi https://www.omg.org/spec/PSSM/20181101/PSSM_TestSuite.xmi _________________________________________________ Copyright © 2016 Airbus Group Copyright © 2016, 2018 Commissariat á l'Energie Atomique et Alternatives (CEA) Copyright © 2016, 2018 Data Access Technologies, Inc. (Model Driven Solutions) Copyright © 2016 LieberLieber Software Copyright © 2017, 2019 Object Management Group, Inc. Copyright © 2016 No Magic, Inc. Copyright © 2016 Simula Research Laboratory USE OF SPECIFICATION - TERMS, CONDITIONS & NOTICES The material in this document details an Object Management Group specification in accordance with the terms, conditions and notices set forth below. This document does not represent a commitment to implement any portion of this specification in any company's products. The information contained in this document is subject to change without notice. LICENSES The companies listed above have granted to the Object Management Group, Inc. (OMG) a nonexclusive, royalty-free, paid up, worldwide license to copy and distribute this document and to modify this document and distribute copies of the modified version. Each of the copyright holders listed above has agreed that no person shall be deemed to have infringed the copyright in the included material of any such copyright holder by reason of having used the specification set forth herein or having conformed any computer software to the specification.
    [Show full text]
  • Partial Reconfiguration in the Field of Logic Controllers Design 353
    INTL JOURNAL OF ELECTRONICS AND TELECOMMUNICATIONS, 2013, VOL. 59, NO. 4, PP. 351–356 Manuscript received November 3, 2013; revised December, 2013. DOI: 10.2478/eletel-2013-0042 Partial Reconfiguration in the Field of Logic Controllers Design Michał Doligalski and Arkadiusz Bukowiec Abstract—The paper presents method for logic controllers Context switching techniques presented in the paper, provide multi context implementation by means of partial reconfigura- adaptation of control algorithm of the production process. tion. The UML state machine diagram specifies the behaviour Context is the alternative specification (version) of particu- of the logic controller. Multi context functionality is specified at the specification level as variants of the composite state. lar function provided by logic control algorithm. Alternative Each composite state, both orthogonal or compositional, de- context is required when production process has two or more scribes specific functional requirement of the control process. alternative formulas, e.g. ingredients may be in the form of The functional decomposition provided by composite states raw material or semi-finished product. It’s not necessary to is required by the dynamic partial reconfiguration flow. The remodel whole control algorithm but only some parts should state machines specified by UML state machine diagrams are transformed into hierarchical configurable Petri nets (HCfgPN). be adjusted to actual conditions. HCfgPN are a Petri nets variant with the direct support of the exceptions handling mechanism. The paper presents places- oriented method for HCfgPN description in Verilog language. II. PARTIAL RECONFIGURATION In the paper proposed methodology was illustrated by means of Classical design flow of LCs implemented in the FPGA simple industrial control process.
    [Show full text]
  • Transforming Erlang Finite State Machines
    Transforming Erlang finite state machines D´anielLuk´acs,Melinda T´oth,Istv´anBoz´o [email protected], [email protected], [email protected] ELTE E¨otv¨osLor´andUniversity Faculty of Informatics Budapest, Hungary Abstract Model driven development approaches help to alleviate the abstraction gap between high-level design and actual implementation, to aid design, development and maintenance of industrial scale software systems. To provide automatic, easily usable tools for stakeholders, model driven development essentially relies on efficient and expressive translations between the program source code and the model. We present a declarative, rule-based approach to deterministically transform Erlang program sources that satisfy a certain syntactical constraint, into valid UML models of state machines. The transforma- tion relies only on static analysis techniques, and the produced model conforms to the state machine metamodel defined in OMG UML 2.0. 1 Introduction In industrial settings there is an always present necessity to use large software applications with over millions of lines of source code. During design, development and maintenance of software, managing the complexity emerging from these large volumes becomes a critical issue in order to realise a successful product lifecycle. The most important resource needed to manage complexity is relevant, up-to-date information, commonly manifested as the design, development and user documentations. As the software evolves during its development and usage, documentations also have to be actualised to mirror the collective knowledge that was incorporated in the system during its changes. To implement this resource intensive process with the highest efficiency, organisations concerned with software development employ various automatic software analysis tools and machine processable documents to support the developers in creating documentations and keeping them up to date.
    [Show full text]
  • Transformation of UML State Machine Diagram Into Graph Database to Generate Test Cases
    IT 20 081 Examensarbete 30 hp November 2020 Transformation of UML State Machine Diagram into Graph Database to Generate Test Cases Mohammad El-Musleh Institutionen för informationsteknologi Department of Information Technology Abstract Transformation of UML State Machine Diagram into Graph Database to Generate Test Cases Mohammad El-Musleh Teknisk- naturvetenskaplig fakultet UTH-enheten The manual approach in software testing is considered as expensive, error-prone, and time-consuming activity since it Besöksadress: depends highly on the test engineers. As well, the process of Ångströmlaboratoriet Lägerhyddsvägen 1 software testing requires proper planning and resources to design Hus 4, Plan 0 the test cases. For this reason, any approach that can be used to enhance or automate the current testing process is necessary. Postadress: Box 536 751 21 Uppsala This thesis introduces an approach to transform the Unified Modeling Language (UML) behavioral state machines diagram into a Telefon: graph database inside Neo4j, a graph database software. Moreover, 018 – 471 30 03 a framework is proposed that fetches test data from the graph Telefax: database. 018 – 471 30 00 Based on the similarity between the state machine notation and the Hemsida: nodes and edges (with properties) in graph databases, a set of http://www.teknat.uu.se/student rules for representation is presented in this thesis. Along with a framework based on GRANDstack (full-stack framework), the framework should use the pre-built graph database together with other technologies to generate test cases from the inserted requirements specification. A proof-of-concept is implemented to demonstrate the proposed framework. By using a dedicated schema, the fetched data is matched with the expected results.
    [Show full text]