Lawrence Butcher Reports on Recent Developments in ECU Technology and Their Impact on Engine Design

The main circuit board from a programmable competition ECU. The appearance of SoC (system on chip) devices will see the size and complexity of these units fall New chips on the block Lawrence Butcher reports on recent developments in ECU technology and their impact on engine design n RET 46 (May 2010), we gave you a general overview of ECU These advances have led to design challenges, however, such as technology, looking at the overall design and implementation of packaging the growing number of I/Os effi ciently – an ever-present control processes in a modern internal combustion engine context. challenge in the space- and weight-conscious world of motorsport. The intention here is to expand on that, and investigate some of the Research into engine control systems is extensive, to say the least, Ikey advances in ECU design in recent years. so this article is not intended to be comprehensive, but hopefully it As the control of the internal combustion engine becomes ever will provide an insight into some areas of improvement that are not more advanced, with processes such as gasoline direct injection and immediately obvious to the casual observer. constantly variable valve timing becoming common, ECUs have had to evolve to cope with these extra demands. Key to meeting these Processors demands has been an increase in processing power and speed, which The heart of an ECU is one or more CPUs (central processing units), have allowed not only a greater capacity for input and output (I/O) which are responsible for carrying out the calculations required to run an data (see glossary page 68), but also faster and more accurate control engine, as well as tasks such as managing integration with other vehicle of an engine’s operating parameters. systems and controlling processes such as data logging. The software 64 64-72 ECU-EMS (v.GR).indd 64 15/03/2012 11:07 FOCUS : ENGINE CONTROL UNITS instructions for these tasks are generally stored on dedicated memory chips, and the CPUs ‘read’ the instructions in order to carry out the tasks. “One modern processor As engine control strategies become more complex, requiring ECUs to have a growing number of I/Os, it is inevitable that more computing would be able to fulfil the power will be needed to handle the additional data and calculations. As one ECU specialist comments, “It is always nice to have more processing power, but we never have trouble finding ways to use it roles of all the processors up.” In terms of improving processing capability in an ECU, both the power of the CPU and the way it is used are important. in a 1980s Formula One An engineer from a manufacturer of motorsport ECUs recounts taking a look at a 1980s Formula One unit. Inside it was a host of different processors, each handling an individual task, with another ECU many times over” standalone processor to coordinate them. Given the technology at the time, each processor would have had, compared to today, a very low clock speed – the rate at which a processor can complete a processing a time, so scheduling one task at the wrong point can slow down the cycle – of less than 1 MHz; by comparison, modern microprocessors completion of another. Improvements in the operating systems that run in ECUs will normally have a clock speed of anything up to 300 MHz, the processors now allow for tasks to be scheduled in such a way that meaning that one modern processor would be able to fulfil the roles of the power of a particular chip is used optimally, meaning that a single- these multiple processors many times over. core processor can perform more efficiently than ever, although this is To clarify, a processor’s clock speed is normally determined by the not always enough. Enter the dual-core processor. frequency of an oscillator crystal, which typically produces a fixed As its name suggests, a dual-core processor has two cores integrated sinusoidal waveform called the reference frequency signal. Electronic into a single chip. This means that different computing tasks can be circuitry translates it into a square wave of the same frequency (or, in a carried out in parallel by the same chip, without them interfering CPU multiplier, some fixed multiple of the reference frequency) and a with each other. While the chip may have the same ‘clock speed’ as distribution network inside the CPU then carries the wave to all parts a single-core unit, its processing power is now far superior. Chips are of the chip that need it. In this context, the use of the word ‘speed’ (as also available with more than two cores – the most powerful CPUs in physical movement) should not be confused with frequency or its used in high-performance computing applications can have anything corresponding clock speed. Thus, the term ‘clock speed’ or ‘processor up to eight – but in terms of those used in ECUs, dual cores are speed’ is a misnomer. the current norm (although some control units used in mainstream A processor is programmed to look after tasks in a prescribed order, production cars do feature more than two cores). meaning that prioritising functions is vital when writing the code that There are a number of ways to use the additional processing power controls them. A single-core chip can carry out only one calculation at of a dual-core chip. The most obvious is for dealing with what are known as ‘embarrassingly parallel’ tasks. In parallel computing, an embarrassingly parallel workload (or problem) is one for which little or no effort is required to separate the problem to be solved into a number of parallel tasks. This is often the case where there is no dependency (or communication) between the two parallel tasks. These tasks present a relatively simple proposition from a coding perspective, thanks to the programmer not having to worry too much about scheduling the tasks between cores. The second approach is to use both cores simultaneously, allowing for a greater number of software tasks to be processed more quickly. This, however, means that the scheduling of processor operations needs to be very carefully managed to ensure that the available processing power is used efficiently. This in turn means that programs need to be written specifically for parallel computing A 32-bit dual-core microcontroller similar to those operations, presenting a greater coding workload and used in the current generation of Formula One ECUs (Courtesy of Freescale Semiconductor) a higher chance of creating bottlenecks in the throughput of data. t 65 64-72 ECU-EMS (v.GR).indd 65 15/03/2012 11:07 FOCUS : ENGINE CONTROL UNITS from a single core, its complexity must increase fourfold. In general, the increased complexity essentially equals the increase in power consumption. As shown in the chart (left), the lowest power consumption increase results from using two CPUs running at the same frequency. The other options of increasing the number of logic gates in a chip or increasing the frequency (speed) all result in higher power consumption. From a packaging This chart shows the relationship between the power consumption and performance of different arrangements of processors. Note that as the speed and number of logic gates increases on a and integration perspective, a dual-core processor provides the best single processor, the power consumption increases at a far greater rate than computing power compromise in terms of processing speed and power consumption. (Courtesy of Freescale Semiconductor) Programmable chips Where a dual-core processor is used in this way, the two cores will An ECU receives a plethora of information about engine operating generally share a single memory source, on which the relevant parameters and other events on a car, such as data from wheel speed programming data is stored. sensors for traction control purposes. This information will generally Two areas where multi-core processors have really proved a benefit be in analogue form, often as a voltage value of 0-5 V in the case of to ECU designers is in the implementation of data logging and in most automotive sensors, which needs to be converted to digital form error checking of systems. While the importance of data logging will so that the CPU can use it. be covered in more detail below, the use of a dual-core processor That means using a signal processor and other data handling makes its integration into an ECU more straightforward than with a devices, which in the past would always have been custom-made t single-core device. In an ECU with only one, single-core processor, the CPU would WHAT IS AN FPGA? be responsible for looking after the myriad of engine calculations as well as running the programming relating to data logging functions. A field-programmable gate array (FPGA) is a semiconductor With a dual-core CPU, engine operations can be dealt with by one device that can be programmed after manufacturing. Instead of core while the data logging can be handled by the other, while still being restricted to a predetermined hardware function, it allows providing the data logging program access to the memory address you to program product features and functions, adapt to new containing the engine programming data. Not only does this make standards and reconfigure hardware for specific applications even after the product has been installed ‘in the field’. The use of FPGAs for simpler task scheduling for the programmers, it also makes it less in ECUs is by no means universal, but at the very high end, where likely that the data logging operations will interfere with the general rapid development is often necessary, they are fairly common.

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