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Downloaded for Personal Non-Commercial Research Or Study, Without Prior Permission Or Charge Bissland, Lesley (1996) Hardware and software aspects of parallel computing. PhD thesis http://theses.gla.ac.uk/3953/ Copyright and moral rights for this thesis are retained by the author A copy can be downloaded for personal non-commercial research or study, without prior permission or charge This thesis cannot be reproduced or quoted extensively from without first obtaining permission in writing from the Author The content must not be changed in any way or sold commercially in any format or medium without the formal permission of the Author When referring to this work, full bibliographic details including the author, title, awarding institution and date of the thesis must be given Glasgow Theses Service http://theses.gla.ac.uk/ [email protected] Hardware and Software aspects of Parallel Computing BY Lesley Bissland A thesis submitted to the University of Glasgow for the degree of Doctor of Philosophy in the Faculty of Science Department of Chemistry January 1996 © L. Bissland 1996 Abstract Parallel computing has developed in an attempt to satisfy the constant demand for greater computational power than is available from the fastest processorsof the time. This has evolved from parallelism within a single Central ProcessingUnit to thousands of CPUs working together.The developmentof both novel hardware and software for parallel multiprocessor systemsis presentedin this thesis. A general introduction to parallel computing is given in Chapter 1. This covers the hardware design conceptsused in the field such as vector processors,array processors and multiprocessors. The basic principles of software engineering for parallel machines (i. e. decomposition, mapping and tuning) are also discussed. Part 1 (Chapters 2,3 and 4) is concerned with the development of hardware for multiprocessor systems. Some of the concepts used in digital hardware design are introduced in Chapter 2. These include the fundamentalsof digital electronics such as logic gates and flip-flops as well as the more complicated topics of rom and programmablelogic. It is often desirable to change the network topology of a multiprocessor machine to suit a particular application. The third chapter describes a circuit switching scheme that allows the user to alter the network topology prior to computation. To achieve this, crossbar switches are connected to the nodes, and the host processor (a PC) programs the crossbar switches to make the desired connections between the nodes. The hardware and software required for this system is described in detail. Whilst this design allows the topology of a multiprocessor system to be altered prior to computation, the topology is still fixed during program run-time. Chapter 4 presents a system that allows the topology to be altered during run-time. The nodes send connection requests to a control processor which programs a crossbar switch connected to the nodes. This system allows every node in a parallel computer to communicate directly with every other node. The hardware interface between the nodes and the control processor is discussed in detail, and the software on the control processor is also described. i Part 2 (Chapters 5 6) is and of this thesis concerned with the parallelisation of a large Chapter 5 describes molecular mechanics program. the fundamentals of molecular mechanics such as the steric energy equation and its components, force field parameterisationand energy minimisation. The implementation of a novel programming (COMFORT) and hardware (the 131308) environment into a parallel molecular mechanics (MM) program is presented in Chapter 6. The structure of the sequential version of the MM program is detailed, before discussing the implementation of the parallel version using COMFORT and the BB08. ii Table of Contents Abstract i ................................................................ Table Contents iii of ......................................................... List Figures of ........................................................... vii List Tables of ............................................................ xi Acknowledgements ....................................................... xii Chapter 1: Introduction Parallel Computing 1 to ................................. 1.1 What is Parallel Computing? 1 ........................................... 1.2 Why 2 parallel computing? ............................................. 1.2.1 Problems in 2 parallel computing ..................................... 1.3 Sequential 3 models of computation ...................................... 1.3.1 Von Neumann 3 model ............................................. 1.3.21iarvard Architecture 4 ............................................. 1.3.3 Data-Flow Computations 4 .......................................... 1.4 Parallel Concepts 5 .................................................... 1.4.1 Pipelining 5 . ..................................................... 1.4.2 Vector Processors 6 ............................................... 1.4.3 Array Processors 7 ................................................ 1.4.4 Multiprocessors 7 ................................................. 1.4.4.1 Shared 7 memory multiprocessors . .............................. 1.4.4.2 Distributed 8 memory multiprocessors ........................... Multi-Workstations 11 1.4.5 .............................................. Which 12 1.4.6 parallel methodology? ...................................... for 12 1.5 Taxonomies parallel computers ...................................... Flynn's 12 1.5.1 taxonomy ............................................... 1.5.2 Feng's 14 taxonomy ................................................ Handler's 14 1.5.3 taxonomy .............................................. 1.5.4 Skillicorn's 15 taxonomy ............................................ Parallel Software Engineering 16 1.6 .......................................... 1.6.1 The basic for parallel 17 principles of software engineering machines. ........ 1.6.1.1 Decomposition 18 ............................................ Decomposition 19 1.6.1.2 Perfectly Parallel .............................. 1.6.1.3 Domain Decomposition 19 ..................................... 1.6.1.4 Control Decomposition 20 ...................................... 1.6.1.5 Granularity 21 ............................................... 1.6.1.6 Mapping 22 ................................................. 1.6.1.7 Tuning 22 ................................................... 1.6.2 Operating Systems 22 ............................................... 1.6.3 Parallel Development Tools 25 ........................................ 1.6.3.1 Parallel Languages 25 ......................................... 1.6.3.2 Compilers 25 ................................................ 1.6.3.3 Parallel Programming Environments 25 ........................... Key Developments in Computing 30 1.7 Parallel ................................. 1.7.1 The 30 earliest parallel machines ...................................... 1.7.2 The first SIMD 31 machines . ......................................... 1.7.3 The first MIMD 31 machines ......................................... iii 1.7.4 GFLOP parallel machines ......................................... 32 1.8 Conclusions ........................................................ 33 References ............................................................. 34 Part1 .................................................................. 36 Chapter 2: Concepts in Digital Electronics .................................... 37 2.1 Basic Digital Electronics .............................................. 37 2.1.1 Logic Levels ................................................... 37 2.1.2 Logic Gates .................................................... 38 2.1.2.1 Buses logic 44 and tri-state ..................................... 2.2 Rom Programmable Logic Devices 45 and .................................. 2.2.1 ROM 45 ......................................................... 2.2.2 Programmable Logic 47 ............................................. 2.2.3 Programming PLDs PROMs 50 and .................................... 2.2.4 CUPL language 50 programming ...................................... 2.2.4.1 CUPL 51 sourcecode ......................................... 2.2.4.2 CUPL 57 simulator ........................................... 2.2.4.3 JEDEC format 59 ............................................. 2.3 Summary 63 .......................................................... References 63 ............................................................. Chapter 3: Design Programmable Circuit Switched Network 64 of a ................... 3.1 Interprocessor Communication 64 ......................................... 3.1.1 Packet Switching 64 ................................................ 3.1.2 Circuit Switching 65 ................................................ 3.1.3 Wormhole Routing 65 .............................................. 3.2 INMOS 66 products .................................................... 3.2.1 INMOS C004 66 ................................................... 3.2.1.1 Switch Implementation ...................................... 67 3.2.1.2 INMOS OSLinks .......................................... 67 3.2.1.3 System Services 68 ........................................... 3.2.2 INMOS T-800 68 transputer .......................................... 3.2.3 C012 Link Adaptors 71 .............................................. Hardware for Static Circuit Switched Network 3.3 ............................. 73 3.3.1 Hardware
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