Intel® Xeon® Processor E7-8800/4800/2800 Product
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Intel® Xeon® Processor E7- 8800/4800/2800 Product Families Datasheet Volume 2 of 2 April 2011 Document Number: 325120-001 INFORMATIONLegal Lines and Disclaimers IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The Intel® Xeon® Processor E7-8800/4800/2800 Product Families may contain design defects or errors known as errata, which may cause the product to deviate from published specifications. Current characterized errata are available upon request. Intel® AES-NI requires a computer system with an AES-NI enabled processor, as well as non-Intel software to execute the instructions in the correct sequence. AES-NI is available on select Intel® processors. For availability, consult your reseller or system manufacturer. For more information, see http://software.intel.com/en-us/articles/intel-advanced-encryption-standard- instructions-aes-ni/ Enhanced Intel SpeedStep Technology: See the Processor Spec Finder at http://ark.intel.com or contact your Intel representative for more information. Intel® 64 architecture 64-bit computing on Intel architecture requires a computer system with a processor, chipset, BIOS, operating system, device drivers and applications enabled for Intel® 64 architecture. Performance will vary depending on your hardware and software configurations. Consult with your system vendor for more information. Intel® Virtualization Technology requires a computer system with an enabled Intel® processor, BIOS, virtual machine monitor (VMM) and, for some uses, certain computer system software enabled for it. Functionality, performance or other benefits will vary depending on hardware and software configurations and may require a BIOS update. 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All Rights Reserved. 2 Datasheet Volume 2 of 2 Contents 1Introduction..............................................................................................................7 1.1 Intel® Xeon® Processor E7-8800/4800/2800 Product Families Features......................7 1.2 Terminology and Conventions ...............................................................................9 1.2.1 Abbreviations ..........................................................................................9 1.3 Notational Conventions ...................................................................................... 11 1.3.1 Hexadecimal and Binary Numbers ............................................................ 11 2 Intel Xeon Processor E7-8800/4800/2800 Product Families Architecture ............... 13 2.1 Introduction ..................................................................................................... 13 2.1.1 Intel® Xeon® Processor 7500 Series-Based Platform Overview ..................... 14 2.2 Intel Xeon Processor E7-8800/4800/2800 Product Families Components (Boxes) ....... 15 3 Address Map............................................................................................................ 17 3.1 NodeID Generation............................................................................................ 17 3.1.1 DRAM Decoder....................................................................................... 17 3.1.2 I/O Decoder Map.................................................................................... 18 3.2 Intel® Trusted Execution Technology (Intel® TXT) ................................................. 19 3.2.1 Key Concepts......................................................................................... 19 4 LLC Coherence Engine (Cbox) and Caching Agent (Sbox)......................................... 21 4.1 Last Level Cache ............................................................................................... 21 4.1.1 LLC Major Features................................................................................. 22 4.2 RTID Generation ............................................................................................... 22 5 Home Agent and Global Coherence Engine (Bbox) ................................................... 25 5.1 Tracker Allocation Modes.................................................................................... 25 5.1.1 The Tracker Modes ................................................................................. 26 5.2 Directory Assisted Snoopy (DAS)......................................................................... 27 5.3 IO Directory Cache (IODC) ................................................................................. 27 6 System Configuration Controller (Ubox) .................................................................. 29 6.1 Introduction ..................................................................................................... 29 7 Memory Controller (Mbox)....................................................................................... 31 7.1 New Features on Intel Xeon Processor E7-8800/4800/2800 Product Families ............. 31 7.2 Memory Controller (Mbox) Support ...................................................................... 31 7.3 Double Device Data Correction (DDDC) ................................................................ 32 7.3.1 DDDC flow overview ............................................................................... 32 7.3.2 DDDC Constraints .................................................................................. 32 7.4 Leaky Bucket Error Counters............................................................................... 32 7.4.1 Per Rank Memory Error Counter ............................................................... 32 7.4.2 Error Flow Counters................................................................................ 32 7.5 Partial Memory Mirroring .................................................................................... 33 7.5.1 Usage Model.......................................................................................... 33 7.5.2 Overview .............................................................................................. 33 7.6 Mirroring Mode Restrictions................................................................................. 35 7.7 Intel® Dynamic Power Technology (Intel® DPT) .................................................... 35 7.7.1 Memory Power States ............................................................................. 36 8Physical Layer (Pbox).............................................................................................. 37 8.1 Intel Xeon Processor E7-8800/4800/2800 Product Families Pbox Functional Overview 37 8.2 Intel® SMI Port specific deltas............................................................................. 37 8.3 Intel® QPI Port specific deltas ............................................................................. 37 9 Power Management Architecture (Wbox) ................................................................ 39 9.1 Thermal Management ........................................................................................ 39 Datasheet Volume 2 of 2 3 9.1.1 Thermal Monitoring - 2 (TM2)...................................................................39 9.1.2 Thermal Monitoring - 1 (TM1) and T-state..................................................39 9.1.3 THERMTRIP# .........................................................................................40