DOCSLIB.ORG

Overveld Van J IM9906 AF SE Scriptie Pure

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Overveld Van J IM9906 AF SE Scriptie Pure MASTER'S THESIS Abstractions for software communication Programming protocols in typescript van Overveld, J. (Jan) Award date: 2020 Link to publication General rights Copyright and moral rights for the publications made accessible in the public portal are retained by the authors and/or other copyright owners and it is a condition of accessing publications that users recognise and abide by the legal requirements associated with these rights. • Users may download and print one copy of any publication from the public portal for the purpose of private study or research. • You may not further distribute the material or use it for any profit-making activity or commercial gain • You may freely distribute the URL identifying the publication in the public portal ? Take down policy If you believe that this document breaches copyright please contact us at: [email protected] providing details and we will investigate your claim. Downloaded from https://research.ou.nl/ on date: 27. Sep. 2021 Open Universiteit www.ou.nl ABSTRACTIONS FOR SOFTWARE COMMUNICATION PROGRAMMING PROTOCOLS IN TYPESCRIPT THESIS Author Jan van Overveld Student number Date of defence 7 February 2020 ABSTRACTIONS FOR SOFTWARE COMMUNICATION PROGRAMMING PROTOCOLS IN TYPESCRIPT by Jan van Overveld in partial fulfillment of the requirements for the degree of Master of Science in Software Engineering at the Open University Student number 851669922 Faculty Faculty of Management, Science and Technology Institute Open University of the Netherlands Course IM9906 Graduation assignment Master program Master’s Programme in Software Engineering Supervisor dr. ir. Sung-Shik Jongmans Open University Chairman Prof. dr. M. C. J. D. van Eekelen Open University ABSTRACT More software parallelization results in more software communication and therefore the need for software communication protocols. Protocol logic in a program is also called the coordination concern. Separating this coordination concern from the regular computation concern in a distributed application can result in higher quality software code. This can be achieved by providing a software engineer facilities for programming protocols based on a global protocol definition. Not only will the coordination be separated from the compu- tation concern, but the defined protocol can also be statically validated. Generating the coordination layer for a distributed application also saves time and reduces programming errors instead of implementing this layer manually. This thesis reports on research for adding software protocol abstractions to the pro- gramming language TypeScript. TypeScript is a statically compiled and typed version of the programming language JavaScript, which is a popular language for programming dis- tributed applications. Various concrete abstractions that are needed for the protocol abstraction layer are di- vided over three conceptual layers. The first conceptual layer provides abstractions needed for starting the protocol and a role based messaging system. The second layer provides a programming interface for each distributed process that is part of the protocol. This in- terface will enable static protocol validation and with a professional development environ- ment, facilities like code statement completion and code navigation will be present. The third layer provides the global protocol definition with the corresponding programming syntax, through an external DSL. A runtime facility for starting up the protocol, to make sure all involved distributed soft- ware processes are present, is called the Mediator. This Mediator role collects the physical address details of all the protocol involved roles and delivers this information to these roles. After this startup process the Mediator dies and the protocol has started for the involved protocol roles. Messages are specified and can be continuously received, but processed when a role is ready for a specific message. Static protocol validation is based on state machine simulation per role. The generated API will have objects for all states, and the methods of these objects represent the transitions between states. These transitions can only be made once, which is checked at runtime to guarantee protocol safety. Performance penalty tests indicate a low decrease of performance due to the extra abstraction layer, and this happens only when the amount of messages increase to high volumes. Normally the implementation of the coordination concern of a distributed application can be error prone, but with a generated coordination layer and static validation, protocol constraints are enforced and therefore errors are reduced. 2 CONTENTS List of Figures 5 1 Introduction6 1.1 Distributed systems....................................6 1.2 Software protocol.....................................7 1.3 Separation of Concerns (SoC)..............................7 1.4 Protocol languages....................................7 1.5 Master research......................................8 1.5.1 RQ1: what abstractions.............................9 1.5.2 RQ2: protocol engine...............................9 1.5.3 RQ3: message passing..............................9 1.5.4 RQ4: GPL or DSL.................................9 1.5.5 RQ5: performance penalty........................... 10 1.6 Contribution........................................ 10 2 Preliminaries 11 2.1 Protocol abstractions................................... 11 2.1.1 Behavioral abstractions............................. 12 2.1.2 Oracle Workflow.................................. 12 2.1.3 Scribble....................................... 13 2.1.4 Jolie......................................... 15 2.1.5 Architecture of software protocols....................... 18 2.2 TypeScript......................................... 19 2.2.1 Introduction.................................... 19 2.2.2 JavaScript...................................... 20 2.2.3 TypeScript, JavaScript that scales....................... 23 2.2.4 Node.js, one language to rule them all.................... 24 3 Results 26 3.1 Alice and Bob........................................ 27 3.2 Layer one, role based communication......................... 32 3.2.1 Mediator...................................... 33 3.2.2 Messages store................................... 35 3.2.3 Alice and Bob implemented with layer one facilities............ 36 3.3 Layer two, static protocol validation.......................... 39 3.3.1 Local perspective state machines....................... 39 3.3.2 JSON with local perspectives.......................... 41 3.3.3 Role implementation in TypeScript...................... 42 3.3.4 Additional comments.............................. 46 3 4 CONTENTS 3.4 Layer three, global protocol definition......................... 46 3.5 Conclusion......................................... 47 3.5.1 API generating process.............................. 48 3.5.2 Complexity..................................... 48 4 Conclusion 52 4.1 RQ1:What abstractions.................................. 52 4.2 RQ2:Protocol engine................................... 53 4.3 RQ3:Message passing................................... 54 4.4 RQ4:GPL or DSL...................................... 55 4.5 RQ5:Performance penalty................................ 55 4.6 Validation and conclusion................................ 59 4.7 Project scope........................................ 60 4.8 Evaluation, discussion and future work........................ 60 Glossary 61 Bibliography 62 Academic............................................. 62 Non-academic.......................................... 64 A Appendix code examples 65 A.1 Message server....................................... 65 A.2 Message client....................................... 66 A.3 Global objects....................................... 66 A.4 Message store....................................... 69 A.5 Message definitions.................................... 70 A.6 Generated API for Alice.................................. 71 A.7 Generated API for Bob.................................. 73 A.8 Perfect number global protocol definition...................... 75 LISTOF FIGURES 2.1 Scribble framework overview............................. 14 2.2 Alice and Bob global protocol............................. 14 2.3 Local perspective of Alice............................... 16 2.4 Local perspective of Bob................................ 16 2.5 TypeScript a superset of JavaScript.......................... 19 2.6 The JavaScript eventloop............................... 21 2.7 TypeScript a superset of ECMAScript........................ 23 3.1 Layered abstraction architecture for distributed software communication.. 27 3.2 Alice and Bob global protocol............................. 28 3.3 Mediator role responsible for protocol startup................... 33 3.4 Local perspective of Alice and Bob.......................... 40 3.5 Protocol statically checked and statement completion.............. 44 3.6 Protocol data type inference.............................. 45 3.7 Local perspective of Fred............................... 48 3.8 State diagram for Bob when dealing with an extra role.............. 49 3.9 Sequence diagram of Alice, Bob and Fred example................ 51 4.1 Performance graph with amount of numbers divided in groups of 100..... 57 4.2 Performance graph with amount of numbers divided in groups of 1000.... 58 4.3 Performance graph with amount of numbers divided in groups of 10000... 58 5 1 INTRODUCTION It is very likely that software processes will become increasingly concurrent
Load more

Recommended publications
  • A Hardware Abstraction Layer in Java
    A Hardware Abstraction Layer in Java MARTIN SCHOEBERL Vienna University of Technology, Austria STEPHAN KORSHOLM Aalborg University, Denmark TOMAS KALIBERA Purdue University, USA and ANDERS P. RAVN Aalborg University, Denmark Embedded systems use specialized hardware devices to interact with their environment, and since they have to be dependable, it is attractive to use a modern, type-safe programming language like Java to develop programs for them. Standard Java, as a platform independent language, delegates access to devices, direct memory access, and interrupt handling to some underlying operating system or kernel, but in the embedded systems domain resources are scarce and a Java virtual machine (JVM) without an underlying middleware is an attractive architecture. The contribution of this paper is a proposal for Java packages with hardware objects and interrupt handlers that interface to such a JVM. We provide implementations of the proposal directly in hardware, as extensions of standard interpreters, and finally with an operating system middleware. The latter solution is mainly seen as a migration path allowing Java programs to coexist with legacy system components. An important aspect of the proposal is that it is compatible with the Real-Time Specification for Java (RTSJ). Categories and Subject Descriptors: D.4.7 [Operating Systems]: Organization and Design—Real-time sys- tems and embedded systems; D.3.3 [Programming Languages]: Language Classifications—Object-oriented languages; D.3.3 [Programming Languages]: Language Constructs and Features—Input/output General Terms: Languages, Design, Implementation Additional Key Words and Phrases: Device driver, embedded system, Java, Java virtual machine 1. INTRODUCTION When developing software for an embedded system, for instance an instrument, it is nec- essary to control specialized hardware devices, for instance a heating element or an inter- ferometer mirror.
    [Show full text]
  • Modeling of Hardware and Software for Specifying Hardware Abstraction
    Modeling of Hardware and Software for specifying Hardware Abstraction Layers Yves Bernard, Cédric Gava, Cédrik Besseyre, Bertrand Crouzet, Laurent Marliere, Pierre Moreau, Samuel Rochet To cite this version: Yves Bernard, Cédric Gava, Cédrik Besseyre, Bertrand Crouzet, Laurent Marliere, et al.. Modeling of Hardware and Software for specifying Hardware Abstraction Layers. Embedded Real Time Software and Systems (ERTS2014), Feb 2014, Toulouse, France. hal-02272457 HAL Id: hal-02272457 https://hal.archives-ouvertes.fr/hal-02272457 Submitted on 27 Aug 2019 HAL is a multi-disciplinary open access L’archive ouverte pluridisciplinaire HAL, est archive for the deposit and dissemination of sci- destinée au dépôt et à la diffusion de documents entific research documents, whether they are pub- scientifiques de niveau recherche, publiés ou non, lished or not. The documents may come from émanant des établissements d’enseignement et de teaching and research institutions in France or recherche français ou étrangers, des laboratoires abroad, or from public or private research centers. publics ou privés. Modeling of Hardware and Software for specifying Hardware Abstraction Layers Yves BERNARD1, Cédric GAVA2, Cédrik BESSEYRE1, Bertrand CROUZET1, Laurent MARLIERE1, Pierre MOREAU1, Samuel ROCHET2 (1) Airbus Operations SAS (2) Subcontractor for Airbus Operations SAS Abstract In this paper we describe a practical approach for modeling low level interfaces between software and hardware parts based on SysML operations. This method is intended to be applied for the development of drivers involved on what is classically called the “hardware abstraction layer” or the “basic software” which provide high level services for resources management on the top of a bare hardware platform.
    [Show full text]
  • A Full Stack Approach to FPGA Integration in the Cloud
    This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/MM.2018.2877290, IEEE Micro THEME ARTICLE: HARDWARE ACCELERATION Galapagos: A Full Stack Approach to FPGA Integration in the Cloud Naif Tarafdar Field-Programmable Gate Arrays (FPGAs) have University of Toronto shown to be quite beneficial in the cloud due to their Nariman Eskandari energy-efficient application-specific acceleration. University of Toronto These accelerators have always been difficult to use Varun Sharma University of Toronto and at cloud scale, the difficulty of managing these Charles Lo devices scales accordingly. We approach the University of Toronto challenge of managing large FPGA accelerator Paul Chow clusters in the cloud using abstraction layers and a University of Toronto new hardware stack that we call Galapagos. The hardware stack abstracts low-level details while providing flexibility in the amount of low-level access users require to reach their performance needs. Computing today has evolved towards using large-scale data centers that are the basis of what many call the cloud. Within the cloud, large-scale applications for Big Data and machine learn- ing can use thousands of processors. At this scale, even small efficiency gains in performance and power consumption can translate to significant amounts. In the data center, power consump- tion is particularly important as 40 % of the costs are due to power and cooling [1]. Accelerators, which are more efficient for classes of computations, have become an important approach to ad- dressing both performance and power efficiency.
    [Show full text]
  • W4118 Operating Systems OS Overview
    W4118 Operating Systems OS Overview Junfeng Yang Outline OS definitions OS abstractions/concepts OS structure OS evolution What is OS? A program that acts as an intermediary between a user of a computer and the computer hardware. User App stuff between OS HW Two popular definitions Top-down perspective: hardware abstraction layer , turn hardware into something that applications can use Bottom-up perspective: resource manager/coordinator , manage your computers resources OS = hardware abstraction layer standard library OS as virtual machine E.g. printf(hello world), shows up on screen App can make system calls to use OS services Why good? Ease of use : higher level of abstraction, easier to program Reusability : provide common functionality for reuse E.g. each app doesnt have to write a graphics driver Portability / Uniformity : stable, consistent interface, different OS/version/hardware look same E.g. scsi/ide/flash disks Why abstraction hard? What are the right abstractions ??? Too low level ? Lose advantages of abstraction Too high level? All apps pay overhead, even those dont need Worse, may work against some apps E.g. Database Next: example OS abstractions Two popular definitions Top-down perspective: hardware abstraction layer, turn hardware into something that applications can use Bottom-up perspective: resource manager/coordinator , manage your computers resources OS = resource manager/coordinator Computer has resources, OS must manage. Resource = CPU, Memory, disk, device, bandwidth, Shell ppt gcc browser System Call Interface CPU Memory File system scheduling management management OS Network Device Disk system stack drivers management CPU Memory Disk NIC Hardware OS = resource manager/coordinator (cont.) Why good? Sharing/Multiplexing : more than 1 app/user to use resource Protection : protect apps from each other, OS from app Who gets what when Performance : efficient/fair access to resources Why hard? Mechanisms v.s.
    [Show full text]
  • Vypracovane Otazky K Bakalarskym Statnicim
    Učební texty k státní bakalářské zkoušce Obecná informatika študenti MFF 15. augusta 2008 1 Vážený študent/čitateľ, toto je zbierka vypracovaných otázok pre bakalárske skúšky Informatikov. Otáz- ky boli vypracované študentmi MFF počas prípravy na tieto skúšky, a teda zatiaľ neboli overené kvalifikovanými osobami (profesormi/dokotorandmi mff atď.) - preto nie je žiadna záruka ich správnosti alebo úplnosti. Väčšina textov je vypracovaná v čestine resp. slovenčine, prosíme dodržujte túto konvenciu (a obmedzujte teda používanie napr. anglických textov). Ak nájdete ne- jakú chybu, nepresnosť alebo neúplnú informáciu - neváhajte kontaktovať adminis- trátora alebo niektorého z prispievateľov, ktorý má write-prístup k svn stromu, s opravou :-) Podobne - ak nájdete v „texteÿ veci ako ??? a TODO, znamená to že danú informáciu je potrebné skontrolovať, resp. doplniť... Texty je možné ďalej používať a šíriť pod licenciou GNU GFDL (čo pre všet- kých prispievajúcich znamená, že musia súhlasiť so zverejnením svojich úprav podľa tejto licencie). Veríme, že Vám tieto texty pomôžu k úspešnému zloženiu skúšok. Hlavní writeři :-) : • ajs • andree – http://andree.matfyz.cz/ • Hydrant • joshis / Petr Dvořák • kostej • nohis • tuetschek – http://tuetschek.wz.cz/ Úvodné verzie niektorých textov vznikli prepisom otázok vypracovaných „pí- somne na papierÿ, alebo inak ne-TEX-ovsky. Autormi týchto pôvodných verzií sú najmä nasledujúce osoby: gASK, Grafi, Kate (mat-15), Nytram, Oscar, Stando, xSty- ler. Časť je prebratá aj z pôvodných súborkových textov... Všetkým patrí naša/vaša vďaka. 2 Obsah 1 Logika 4 1.1 Logika – jazyk, formule, sémantika, tautologie . 4 1.2 Rozhodnutelnost, splnitelnost, pravdivost a dokazatelnost . 6 1.3 Věty o kompaktnosti a úplnosti výrokové a predikátové logiky . 11 1.4 Normální tvary výrokových formulí, prenexní tvary formulí prediká- tové logiky .
    [Show full text]
  • Web Applications and the Hardware Abstraction Layer
    Web Applications Dilles, 09 Web Applications and the Evolution of the Hardware Abstraction Layer Jacob Dilles George Mason University March 15 2009 A computer is defined as a machine that manipulates data according to a list of instructions, however it has come to mean something more. Operating a modern Core class possessor that can perform 2.4 billion 64-bit operations per second (Intel Corporation, 2009) by listing one instruction at a time would not be very useful. However the first 1960 era computers, like the ENIAC, were only programmable with machine- code instructions entered by hand using switches and patch cables. This was not a significant problem at the time, when the longest program was 304 batch-operated instructions, took days to write and 5 to 10 seconds to run, and the punched card reader limited data input rate to 250 bytes per second. (Ballistic Research Laboratories, 1955). However computers grew more capable at an exponential rate while steadily decreasing in cost. By 1970 machines, like the relativity affordable DEC PDP-7 that were capable of fairly advanced timesharing, expedited the development of the operating system - an interface between the physical computer hardware and an abstract environment that allows more than one program to be run simultaneously. Due to the wide variety of hardware architecture at the time, early operating systems had to be written for a specific machine, and were not consistent or interchangeable between computer manufactures and models. In 1973 the Unix operating system developed at Bell Laboratories was ported from PDP-11/20 assembly to the C programming language, and 1 Web Applications Dilles, 09 could be used on any machine with a C compiler with minimal modification.
    [Show full text]
  • 42 a Hardware Abstraction Layer in Java
    1 A Hardware Abstraction Layer in Java 2 MARTIN SCHOEBERL, Vienna University of Technology 3 STEPHAN KORSHOLM, Aalborg University 4 TOMAS KALIBERA, Purdue University 5 ANDERS P. RAVN, Aalborg University 6 Embedded systems use specialized hardware devices to interact with their environment, and since they 7 have to be dependable, it is attractive to use a modern, type-safe programming language like Java to de- 8 velop programs for them. Standard Java, as a platform-independent language, delegates access to devices, 9 direct memory access, and interrupt handling to some underlying operating system or kernel, but in the 10 embedded systems domain resources are scarce and a Java Virtual Machine (JVM) without an underlying 11 middleware is an attractive architecture. The contribution of this article is a proposal for Java packages 12 with hardware objects and interrupt handlers that interface to such a JVM. We provide implementations 13 of the proposal directly in hardware, as extensions of standard interpreters, and finally with an operating 14 system middleware. The latter solution is mainly seen as a migration path allowing Java programs to co- 15 exist with legacy system components. An important aspect of the proposal is that it is compatible with the 16 Real-Time Specification for Java (RTSJ). 42 17 Categories and Subject Descriptors: D.4.7 [Operating Systems]: Organization and Design—Real-time 18 systems and embedded systems; D.3.3 [Programming Languages]: Language Constructs and Features— 19 Input/output 20 General Terms: Languages, Design 21 Additional Key Words and Phrases: Device driver, embedded system, Java, Java virtual machine 22 ACM Reference Format: 23 Schoeberl, M., Korsholm, S., Kalibera, T., and Ravn, A.
    [Show full text]
  • Operating System Abstraction Layer (OSAL)
    Operating System Abstraction Layer (OSAL) Flight Software Workshop Nicholas J Yanchik November 6,2007 GSFC GSFC Code 582 - Flight Software Branch 1 1/06/07 Page 1 Agenda What is the OSAL? Where does it fit in our current FSW architecture? How does it work? Directory structure What functionality does the OSAL provide? OSAL releases Metrics Open Source Software Future Plans GSFC Code 582 - Flight Software Branch 1 1/06/07 Page 2 What Is The OSAL And What Are Its Benefits? What is the Operating System Abstraction Layer? - A small layer of software that allows programs to run on many different operating systems and hardware platforms - Independent of the underlying OS & hardware - Self-contained Why do we want it? - Removes dependencies from any one operating system - Promotes portable, reusable flight software - Core FSW can be built for multiple processors and operating systems - Example: different missions require different hardware & operating system What does it do? - Allows developers to write and maintain one version of code - Allows for easy reuse across different missions with different hardware - Bonus: Allows for desktop development of flight software; reduces impact of potential hardware delays GSFC Code 582 - Flight Software Branch 11/06/0 7 Page 3 Where Does It Fit in Our Current Core Flight Executive ( cFE ) Real Time Operating System Drivers Board Support Package Flight Computer Hardware GSFC Code 582 - Flight Software Branch 1 1/06/07 Page 4 How Does It Work? OS Abstraction Layer call to create Implementation for Implementation for Implementation for VxWorks Implemented by make files Compiles in only the files needed for a specific OSlarchitecture GSFC Code 582 - Flight Software Branch 1 1/06/07 Page 5 Directory Structure OS type( linux, rtems, vxworks,os x) arch 10platform (coldfire, ppc, x86) 1 board (mac, mcp750) 1 os (rtems, vxworks) LD bsp, exe GSFC Code 582 - Flight.
    [Show full text]
  • Security Across Abstraction Layers: Old and New Examples
    2020 IEEE European Symposium on Security and Privacy Workshops (EuroS&PW) Security across abstraction layers: old and new examples Frank Piessens Dept. of Computer Science KU Leuven Leuven, Belgium [email protected] Abstract—A common technique for building ICT systems is Structured Programming Language to build them as successive layers of abstraction: for instance, Compiler the Instruction Set Architecture (ISA) is an abstraction of User-level Instruction Set Architecture the hardware, and compilers or interpreters build higher Operating system level abstractions on top of the ISA. Privileged Instruction Set Architecture The functionality of an ICT application can often be Processor understood by considering only a single level of abstraction. Hardware description language For instance the source code of the application defines the functionality using the level of abstraction of the source pro- Figure 1. A stack of abstraction layers gramming language. Functionality can be well understood by just studying this source code. the resulting ICT systems. So-called layer-below attacks, Many important security issues in ICT system however where an attacker exploits implementation details of lower are cross-layer issues: they can not be understood by con- layers to attack one of the upper layers have been common sidering the system at a single level of abstraction, but they multiple and have been among the most dangerous attacks over the require understanding how levels of abstraction are history of computing. Important examples include: implemented. Attacks may rely on, or exploit, implementa- tion details of one or more layers below the source code level 1) memory corruption attacks [1] that can take over of abstraction.
    [Show full text]
  • 60 Years of Mastering Concurrent Computing Through Sequential Thinking Sergio Rajsbaum, Michel Raynal
    60 Years of Mastering Concurrent Computing through Sequential Thinking Sergio Rajsbaum, Michel Raynal To cite this version: Sergio Rajsbaum, Michel Raynal. 60 Years of Mastering Concurrent Computing through Sequential Thinking. ACM SIGACT News, Association for Computing Machinery (ACM), 2020, 51 (2), pp.59-88. 10.1145/3406678.3406690. hal-03162635 HAL Id: hal-03162635 https://hal.archives-ouvertes.fr/hal-03162635 Submitted on 17 Jun 2021 HAL is a multi-disciplinary open access L’archive ouverte pluridisciplinaire HAL, est archive for the deposit and dissemination of sci- destinée au dépôt et à la diffusion de documents entific research documents, whether they are pub- scientifiques de niveau recherche, publiés ou non, lished or not. The documents may come from émanant des établissements d’enseignement et de teaching and research institutions in France or recherche français ou étrangers, des laboratoires abroad, or from public or private research centers. publics ou privés. 60 Years of Mastering Concurrent Computing through Sequential Thinking ∗ Sergio Rajsbaumy, Michel Raynal?;◦ yInstituto de Matemáticas, UNAM, Mexico ?Univ Rennes IRISA, 35042 Rennes, France ◦Department of Computing, Hong Kong Polytechnic University [email protected] [email protected] Abstract Modern computing systems are highly concurrent. Threads run concurrently in shared-memory multi-core systems, and programs run in different servers communicating by sending messages to each other. Concurrent programming is hard because it requires to cope with many possible, unpre- dictable behaviors of the processes, and the communication media. The article argues that right from the start in 1960’s, the main way of dealing with concurrency has been by reduction to sequential reasoning.
    [Show full text]
  • Developing Programs Using the Hardware Abstraction Layer, Nios II
    6. Developing Programs Using the Hardware Abstraction Layer January 2014 NII52004-13.1.0 NII52004-13.1.0 This chapter discusses how to develop embedded programs for the Nios® II embedded processor based on the Altera® hardware abstraction layer (HAL). This chapter contains the following sections: ■ “The Nios II Embedded Project Structure” on page 6–2 ■ “The system.h System Description File” on page 6–4 ■ “Data Widths and the HAL Type Definitions” on page 6–5 ■ “UNIX-Style Interface” on page 6–5 ■ “File System” on page 6–6 ■ “Using Character-Mode Devices” on page 6–8 ■ “Using File Subsystems” on page 6–15 ■ “Using Timer Devices” on page 6–16 ■ “Using Flash Devices” on page 6–19 ■ “Using DMA Devices” on page 6–25 ■ “Using Interrupt Controllers” on page 6–30 ■ “Reducing Code Footprint in Embedded Systems” on page 6–30 ■ “Boot Sequence and Entry Point” on page 6–37 ■ “Memory Usage” on page 6–39 ■ “Working with HAL Source Files” on page 6–44 The application program interface (API) for HAL-based systems is readily accessible to software developers who are new to the Nios II processor. Programs based on the HAL use the ANSI C standard library functions and runtime environment, and access hardware resources with the HAL API’s generic device models. The HAL API largely conforms to the familiar ANSI C standard library functions, though the ANSI C standard library is separate from the HAL. The close integration of the ANSI C standard library and the HAL makes it possible to develop useful programs that never call the HAL functions directly.
    [Show full text]
  • Simplifying Software Development To
    Simple and efficient software development with the SimpleLink™ MCU platform Henry Wiechman Embedded Processor Software Marketing and Strategy Texas Instruments Adrian Fernandez Microcontroller Development Experience Manager Texas Instruments Overview The software challenges associated with embedded systems development have grown significantly in recent years. These systems continue to add advanced functionality with higher speed interfaces and multiple connectivity options, driving the need for more sophisticated scheduling algorithms and increased power consumption and code size. End-product needs are also changing rapidly as companies strive to serve multiple markets with different adaptations of their base product. As time-to-market windows shrink, developers need a robust software foundation with intuitive levels of abstraction and operating system support to enable faster creation of applications. This foundation should support a broad portfolio of devices that can easily reuse application code so that initial investments can be ported to a variety of products with varying system requirements. The SimpleLink™ microcontroller (MCU) software development kit (SDK) is a complete set of validated, fully documented drivers, stacks and code examples that enable engineers to develop innovative and differentiated applications with the SimpleLink connected-MCU family from Texas Instruments (TI). This powerful SDK provides a cohesive and consistent experience by packaging essential software components and easy-to-use examples in one comprehensive package. Everything a customer needs to quickly and efficiently develop new applications using an ARM® Cortex®-M-based MCU from TI is included in the SDK, from the drivers and communication stacks to an OS kernel. The SDK is well integrated into the development environment, leveraging the graphical configuration capabilities of SysConfig, a unified configuration software tool, to speed initial development while making advanced debug capabilities easily accessible.
    [Show full text]