DOCSLIB.ORG

Adapting the Reconfigurable Spacecube Processing

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Adapting the Reconfigurable Spacecube Processing Adapting the Reconfigurable SpaceCube Processing System for Multiple Mission Applications David Petrick, Daniel Espinosa, Robin Ripley, Gary Crum, Alessandro Geist, and Thomas Flatley NASA Goddard Space Flight Greenbelt, MD 20771 [email protected] Abstract—This paper highlights the methodology and slower computer currently used on ISS, as the main avionics effectiveness of adapting the reconfigurable SpaceCube system for two upcoming ISS experiment campaigns. This paper will to solve complex application requirements for a variety of show how we quickly reconfigured the SpaceCube system to space flight missions. SpaceCube is a reconfigurable, modular, meet the more stringent reliability requirements. compact, multi-processing platform for space flight applications demanding extreme processing power. The SpaceCube system is suitable for most mission applications, TABLE OF CONTENTS particularly those that are computationally and data intensive such as instrument science data processing. We will show how 1. INTRODUCTION ............................................... 1 the SpaceCube hybrid processing architecture is used to meet 2. HYBRID FLIGHT COMPUTING ......................... 2 data processing performance requirements that traditional flight processors cannot meet. 3. SPACECUBE V1.0 DESCRIPTION ...................... 2 4. MISSION USE CASES........................................ 6 This paper discusses the flexible computational architecture of 5. CONCLUSIONS ............................................... 17 the SpaceCube system and its inherent advantages over other avionics systems. The SpaceCube v1.0 processing system 6. FUTURE WORK ............................................. 17 features two commercial Xilinx Virtex-4 FX60 Field REFERENCES .................................................... 17 Programmable Gate Arrays (FPGA), each with two embedded BIOGRAPHY ...................................................... 18 PowerPC405 processors. The FPGAs are mounted in an innovative back-to-back method, which reduces the size of the circuit board design while maintaining the added benefit of two FPGAs. All SpaceCube v1.0 cards are 4” x 4”, yielding a 1. INTRODUCTION small, yet powerful hybrid computing system. The SpaceCube is a family of Field Programmable Gate Array architecture exploits the Xilinx FPGAs, PowerPCs, and (FPGA) based on-board science data processing systems necessary support peripherals to maximize system flexibility. Adding to the flexibility, the entire system is modular. Each developed at the NASA Goddard Space Flight Center card conforms to a custom mechanical standard that allows (GSFC) [1]. The goal of the SpaceCube program is to stacking multiple cards in the same box. provide 10x to 100x improvements in on-board computing power while lowering relative power consumption and cost. This paper will detail the use of SpaceCube in multiple space SpaceCube is based on the Xilinx Virtex family of FPGAs, flight applications including the Hubble Space Telescope which include processor, FPGA and digital signal Servicing Mission 4 (HST-SM4), an International Space processing (DSP) resources. These processing elements are Station (ISS) radiation test bed experiment, and the main leveraged to produce a hybrid science data processing avionics subsystem for two separate ISS attached payloads. platform that accelerates the execution of science data Each mission has had varying degrees of data processing complexities, performance requirements, and external processing algorithms by distributing computational interfaces. We will show the methodology used to minimize the functions among the elements. This approach enables the changes required to the physical hardware, FPGA designs, implementation of complex on-board functions that were embedded software interfaces, and testing. previously limited to ground based systems, such as on- board product generation, data reduction, calibration, This paper will summarize significant results as they apply to classification, event/feature detection, data mining and real- each mission application. In the HST-SM4 application we time autonomous operations. The system is fully utilized the FPGA resources to accelerate portions of the image reconfigurable in flight, including data parameters, software processing algorithms more than 25 times faster than a and FPGA configuration, through either ground standard space processor in order to meet computational speed requirements. For the ISS radiation on-orbit demonstration, commanding file transfers or autonomously in response to the main goal is to show that we can rely on the commercial detected events/features in the instrument data stream. FPGAs and processors in a space environment. We describe our FPGA and processor radiation mitigation strategies that Background have resulted in our eight PowerPCs being available and error The SpaceCube processing system was started at GSFC in free for more than 99.99% of the time over the period of four years. This positive data and proven reliability of the 2006 with Internal Research and Development (IRAD) SpaceCube on ISS resulted in the Department of Defense program funding [2]. A series of internal prototype (DoD) selecting SpaceCube, which is replacing an older and demonstrations to NASA officials showcased the U.S. Government work not protected by U.S. copyright 1 computational power and its inherent reconfigurable architectures are very hard to design and intrinsically advantages over typical space processors. NASA expensive to change such that they are portable to multiple recognized the clear potential of the technology, and missions, dynamic functional requirements, or new post- provided the funding needed to increase the technology launch mission objectives or corrections. readiness level (TRL) for space flight applications. Specifically, the Hubble Space Telescope Servicing Mission A new approach is needed to meet the increasing challenges 4 management team infused SpaceCube as the main required by space processing systems. A hybrid computing avionics for an experimental payload called Relative system that combines multiple processors, reconfigurable Navigation Sensors (RNS) [3]. The use of SpaceCube FPGAs, flexible interface options, with a modular within the RNS system will be described in detail later in architecture is the solution that will bridge the gap between this paper. today’s avionics requirements and yesterday’s typical stand- alone sequential processing architecture. A hybrid The version of the SpaceCube that was initially developed computing architecture is able to retain the function of a in the 2006-2009 timeframe is known as SpaceCube v1.0. multi-purpose computer that runs typical C&DH and Follow-on versions have been developed [1]; however the G&NC. However, in addition to these types of tasks, it has design and use of SpaceCube v1.0 will be the focus of this the advantage of supporting computationally complex tasks paper. that require FPGA co-processors to handle math such as FFT, matrix manipulation, parallel floating point operations, 2. HYBRID FLIGHT COMPUTING or implementing an advanced interface such as CameraLink, Spacewire, gigabit Ethernet, or support the implementation There is a growing need for higher performance processing of a custom interface. systems for space. Instrument precision and speed capabilities are rapidly evolving which levies tougher The modularity of such a system allows for the quick electrical interfacing and data bandwidth requirements on adaptation to changing avionics requirements. A modular the computing node of the system. In addition, on-board system, for example, can support adding a bulk memory processing of the data products, in some cases in real-time, card, a custom electrical interface, or expand the I/O is now a common requirement. bandwidth required. A modular and reconfigurable system yields a high probability of using the same basic avionics On-board processing improves system efficiency and package for different mission applications, or follow-on functionality in two areas. First, by allowing the spacecraft missions, even if interface and computing requirements are to preprocess data products on board, a smaller or drastically different. compressed data volume per data set can be sent to ground, which increases the amount of time an instrument can be SpaceCube fits the need of a hybrid, reconfigurable, turned on and collecting data. It is typical for high data rate modular space processing system. This paper will show science instruments to constrain their data collection to 10- how cost and schedule can be reduced by reusing the same 20% of the mission time to fit within the limited downlink basic system for new missions. Reuse of hardware bandwidth. This problem continues to grow as instrument architecture greatly reduces the amount of up front Non capabilities increase. Second, it enables for applications on Recurring Engineering (NRE) costs and time associated board the spacecraft to make autonomous decisions on the with building a new system with new requirements from the processed data products. This ability opens up a much more ground up. challenging range of mission objectives that can be targeted for space applications. 3. SPACECUBE V1.0 DESCRIPTION Typical space processing systems generally consist of a The SpaceCube v1.0 system is a compact, modular, low single radiation hardened processor such as the BAE power, reconfigurable multiprocessing platform for space RAD750, Aeroflex LEON3FT, BroadReach
Load more

Recommended publications
  • S P a C E C U B E Spacecube V3.0 Mini
    https://ntrs.nasa.gov/search.jsp?R=20190028775 2019-09-26T19:38:05+00:00Z National Aeronautics and Space Administration SpaceCube v3.0 Mini NASA Next-Generation Data-Processing System for Advanced CubeSat Applications Cody G. Brewer Science Data Processing Branch Software Engineering Division NASA - Goddard Space Flight Center Greenbelt, MD, USA The Twelfth Space Computing Conference S p a c e C u b e July 2019 www.nasa.gov Acronyms Acronym Definition BL-TMR BYU-LANL TMR SEL Single-Event Latchup cFE Core Flight Executive SEM Soft Error Mitigation cFS Core Flight System Spacecraft Supercomputing for Image and Video Center for High-performance Reconfigurable SSIVP Processing CHREC Computing STP-Hx Space Test Program Houston CPU Central Processing Unit TID Total Ionizing Dose CSP CHREC/CubeSat Space Processor TMR Triple Modular Redundancy DSP Digital Signal Processor TRL Technology Readiness Level ELC ExPRESS Logistics Carrier UVSC Ultraviolet Spectro-Coronagraph EM Engineering Model FF Flip-Flop FLT Flight FPGA Field Programmable Gate Array FSM Finite State Machine GMSEC Goddard Mission Services Evolution Center GOPS Giga-Operations Per Second ISA Instruction Set Architecture LEO low-Earth Orbit MGT Multi-Gigabit Transceiver MIPS Million instructions per second NSF National Science Foundation ORS Operationally Responsive Space PCB Printed Circuit Board RE Recuring Engineering SBC Single-Board Computer SCIENCE DATA PROCESSING BRANCH • Code 587 • NASA GSFC 2 SpaceCube v3.0 Mini - NASA Goddard Space Flight Center – July 2019 Outline 1 Introduction
    [Show full text]
  • Highlights of Dod Research on the ISS
    Highlights of DoD Research on the ISS Jim McLeroy Senior Project Engineer DoD Human Spaceflight Payloads Office Houston, Texas 27 June 2012 © The Aerospace Corporation 2010 Executive Summary • The Department of Defense has flown over 270 Experiments on NASA’s Human Spaceflight Vehicles on the Space Shuttle and the International Space Station • The Space Test Program has used every human spaceflight launch vehicle or spacecraft for launch and operations • The Space Test Program accomplishes its mission through a small, cost effective, highly successful team working together with NASA and the International Partners 2 DoD Human Spaceflight Payloads Office • Mission Statement: The DoD Space Test Program-Houston office is the single face to NASA for all DoD payloads on the International Space Station, and other human-rated launch vehicles, both domestic and International Partner – Provide timely space flight for DoD payloads • Assure payload is ready for flight and completes mission objectives • Provide project management support to complete the NASA safety and integration processes • Provide technical integration support to maximize the efficiency and effectiveness of payload design, schedule, and cost Mission: To fly payloads 3 DoD Team at Houston • Houston is unique… • Manned aspect brings great flexibility but also unique safety requirements • Constant high level of interaction with NASA required • “Hands on” approach • Small unit, many projects, “experiment to data” in relatively short period • Return of items from space Launch Site Fabrication Training Operations and Testing Processing DoD personnel are engaged across all these functions 4 DoD Firsts in Human Spaceflght • 1st DoD payload on Shuttle mission STS-4 in 1982 • 1st internal DoD payload on Mir • 1st internal payload on ISS (MACE II, 2000) • 1st external payload on ISS (MISSE 1&2, 2001) • 1st U.S.
    [Show full text]
  • Customer Innovation Issue Xcellxcelljournaljournal SOLUTIONS for a PROGRAMMABLE WORLD
    2010 Customer Innovation Issue XcellXcelljournaljournal SOLUTIONS FOR A PROGRAMMABLE WORLD 85,000 to 2.5 Billion Transistors and Beyond: CELEBRATING CUSTOMER INNOVATION www.xilinx.com/xcell/ Development kits help ramp up new Spartan®-6 or Virtex®-6 FPGA designs Avnet Electronics Marketing introduces three new development kits based on the Xilinx Targeted Design Platform (TDP) methodology. Designers now have access to the silicon, software tools and reference designs needed to quickly ramp up new designs. This New baseboards for Spartan®-6 approach accelerates time-to-market and allows you to focus on and Virtex®-6 FPGAs creating truly differentiated products. » Spartan-6LX16EvaluationKit » Spartan-6 LX150T Development Kit Critical to the TDP methodology is the FPGA Mezzanine Card » Virtex-6 LX130T Development Kit (FMC) from the VITA standards body. Avnet has collaborated with several industry-leading semiconductor manufacturers to create a host of FMC modules that add functionality and interfaces to the New FMC Modules for Baseboards new baseboards, allowing for easy customization to meet design- » Dual Image Sensor FMC specific requirements. » DVI I/O FMC » Industrial Ethernet FMC Learn more about the new Spartan-6 and Virtex-6 FPGA baseboards and FMC modules designed by More are soon to be released! Avnet at www.em.avnet.com/drc 1 800 332 8638 ©Avnet, Inc. 2010. All rights reserved. AVNET is a registered trademark of Avnet, Inc. www.em.avnet.com DNV6F6PCIe Six powerful Virtex®-6 FPGAs, up to 24 Million ASIC gates, clock speeds to 710 Mhz: this new board races ahead of last generation solutions. The Dini Group has implemented new Xilinx V6 technology in an easy to use PCIe hosted or stand alone board that features: • 4 DDR3 SODIMMs, up to 4GB per socket • Hosted in a 4-lane PCIe, Gen 1 slot • 4 Serial-ATA ports for high speed data transfer • Easy configuration via PCIe, USB, or GbE • Three independent low-skew global clock networks The higher gate count FPGAs, with 700 MHz LVDS chip to chip interconnects, provide easier logic partitioning.
    [Show full text]
  • Spacecube V3.0 NASA Next-Generation High-Performance Processor for Science Applications
    National Aeronautics and Space Administration SpaceCube v3.0 NASA Next-Generation High-Performance Processor for Science Applications Christopher Wilson, PhD Science Data Processing Branch Software Engineering Division NASA - Goddard Space Flight Center Greenbelt, MD, USA 33rd Annual Conference on Small Satellites SpaceCube August 2019 www.nasa.gov Outline 1 Introduction to SpaceCube 2 SpaceCube v3.0 Processor Card Overview 3 SpaceCube Comparisons and Features 4 Software and Applications 5 Conclusions SCIENCE DATA PROCESSING BRANCH • Code 587 • NASA GSFC 2 SpaceCube v3.0 - NASA Goddard Space Flight Center – August 2019 Science Data Processing Branch Embedded Processing Group (EPG) EPG Group Specializes in Embedded Development • Hardware acceleration of algorithms and applications • Intelligence, autonomy, and novel architectures • Flight software integration for development platforms • Advanced architectures and research platforms Advanced Platforms for Spaceflight • SpaceCube v2.0 and v2.0 Mini • SpaceCube v3.0 and v3.0 Mini • SpaceCube Mini-Z and Mini-Z45 Key Tools and Skills • Flight Software: cFE/cFS, driver integration, flight algorithms • GSE: COSMOS, GMSEC, system testbeds • FPGA Design: Hardware acceleration, fault-tolerant structures • Mission Support: Supporting flight cards, algorithm development • On-board Autonomy and Analysis: deep-learning and machine- learning frameworks, unique architectures SpaceCube v2.0 SCIENCE DATA PROCESSING BRANCH • Code 587 • NASA GSFC 3 SpaceCube v3.0 - NASA Goddard Space Flight Center – August
    [Show full text]
  • Spacecube V2.0 Space Flight Hybrid Reconfigurable Data Processing
    SpaceCube v2.0 Space Flight Hybrid Reconfigurable Data Processing System David Petrick, Alessandro Geist, Dennis Albaijes, Milton Davis, Pietro Sparacino, Gary Crum, Robin Ripley, Jonathan Boblitt, and Thomas Flatley NASA Goddard Space Flight Greenbelt, MD 20771 [email protected] Abstract—This paper details the design architecture, design methodology, and the advantages of the SpaceCube v2.0 high Finally, this paper will describe how this system is being used performance data processing system for space applications. to solve the extreme challenges of a robotic satellite servicing The purpose in building the SpaceCube v2.0 system is to create mission where typical space-rated processors are not sufficient a superior high performance, reconfigurable, hybrid data enough to meet the intensive data processing requirements. processing system that can be used in a multitude of The SpaceCube v2.0 is the main payload control computer and applications including those that require a radiation hardened is required to control critical subsystems such as autonomous and reliable solution. The SpaceCube v2.0 system leverages rendezvous and docking using a suite of vision sensors and seven years of board design, avionics systems design, and space object avoidance when controlling two robotic arms. For this flight application experiences. This paper shows how application three SpaceCube processing systems are required, SpaceCube v2.0 solves the increasing computing demands of each with two processor cards. space data processing applications that cannot be attained with a standalone processor approach. TABLE OF CONTENTS The main objective during the design stage is to find a good 1. INTRODUCTION ............................................... 1 system balance between power, size, reliability, cost, and data 2.
    [Show full text]
  • Application of Spacecube in a Space Flight System
    Application of SpaceCube in a Space Flight System Dave Petrick NASA/GSFC Code 587 9/1/2009 Note: This is the HANDOUT version of this presentation 1 MAPLD 2009 - Session A SpaceCube Development Team Mike Lin Steve Queen GSFC Radiation Group Walt Bradley John Vaneepoel Dave Petrick Dwaine Molock GSFC Parts Group Gordon Seagrave Jane Marquart Orbital Sciences John Godfrey Dan Grogan Northrup Grumman Beverly Settles Clara Hollenhorst Jackson and Tull Tracy Price Terecita Mayorga Advanced Optical Systems Gary Crum Varsha Patel Robin Ripley Krystal Kennedy SEAKR Dan Espinosa Miles Newman CRI Alessandro Geist Jack Lorenz Dorian Seagrave Quang Nguyen Wayne Greenwood Matt Owens Frank Cepollina Pietro Sparacino Tom Flatley Darryl Younger Giri Nadendla Richard Hicks Madhu Kadari Ed Hicks Bo Naasz Steve Judy Will Clement MAPLD 2009 - Session A 2 GSFC SpaceCube • Small, light-weight, reconfigurable multi-processor platform for space flight applications demanding extreme processing capabilities • Based on Xilinx Virtex 4 FX60 FPGAs, 2 per processor card • Stackable architecture Flight Box Mechanical: 7.5-lbs, 5”x5”x7” Power: 37W (HST Application) 3 MAPLD 2009 - Session A SpaceCube Processor Card • General: 4”x4” card, Back-to-Back FPGAs (x2), 7W typical power • Memory: 1GB SDRAM, 1GB Flash, 16KB SRAM, 16KB PROM • Interfaces: 20 bi-dir differential signals, JTAG • Backplane: Power, 42 single-ended, 8 LVDM, 2 I2C, POR SDRAM256MB Diff RX SDRAM512MB Diff RX QuadRX QuadTX SDRAM FLASH LVDM LVDM Xilinx Aeroflex QuadTX Xilinx Aeroflex V4FX60 UT6325 LVDM V4FX60
    [Show full text]
  • S P a C E C U B E Spacecube V3.0 Mini
    National Aeronautics and Space Administration SpaceCubeSpaceCube v3.0v3.0 MiniMini NASA Next-Generation Data-Processing System for Advanced CubeSat Applications Christopher Wilson, PhD Science Data Processing Branch Software Engineering Division NASA - Goddard Space Flight Center Greenbelt, MD, USA NASA Electronic Parts and Packaging S p a c e C u b e (NEPP) Program 2019 Electronics Technology Workshop June 2019 www.nasa.gov Acronyms Acronym Definition BL-TMR BYU-LANL TMR cFE Core Flight Executive cFS Core Flight System CPU Central Processing Unit CSP CHREC/CubeSat Space Processor DSP Digital Signal Processor FF Flip-Flop FPGA Field Programmable Gate Array FSM Finite State Machine ISA Instruction Set Architecture LEO low-Earth Orbit MGT Multi-Gigabit Transceiver PCB Printed Circuit Board RE Recuring Engineering SBC Single-Board Computer SEL Single-Event Latchup SEM Soft Error Mitigation TID Total Ionizing Dose TMR Triple Modular Redundancy SCIENCE DATA PROCESSING BRANCH • Code 587 • NASA GSFC 2 SpaceCube v3.0 Mini - NASA Goddard Space Flight Center – June 2019 Outline 1 Introduction 2 SpaceCube Overview • SpaceCube Introduction • SpaceCube Approach • Mini Design Philosophy • Lessons Learned 3 SmallSat / CubeSats for Space • SmallSat/CubeSat Challenge • Xilinx Space-grade Devices • Kintex UltraScale • Soft-Core Processors 4 SpaceCube v3.0 Mini • Configuration Schemes • Fault-Tolerant Operation • Specification SCIENCE DATA PROCESSING BRANCH • Code 587 • NASA GSFC 3 SpaceCube v3.0 Mini - NASA Goddard Space Flight Center – June 2019 Goals,
    [Show full text]
  • A Family of Reconfigurable Hybrid On-Board Science Data Processors
    SpaceCube: A Family Of Reconfigurable Hybrid On-Board Science Data Processors Thomas P. Flatley Head, Science Data Processing Branch Software Engineering Division NASA - Goddard Space Flight Center Greenbelt, MD USA NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2012) Nuremberg/Erlangen, Germany June 25-28, 2012 GODDARD SPACE FLIGHT CENTER The Challenge The next generation of NASA science missions will require “order of magnitude” improvements in on-board computing power Mission Enabling Science Algorithms & Applications • Real-time Wavefront Sensing • Real-time “Situational and Control Awareness” • On-Board Data Volume • Intelligent Data Compression Reduction • Real-time Calibration / • Real-time Image Processing Correction • Autonomous Operations • On-Board Classification • On-Board Product Generation • Inter-platform Collaboration • Real-time Event / Feature Detection 2 GODDARD SPACE FLIGHT CENTER Our Approach • The traditional path of developing radiation hardened flight processor will not work … they are always one or two generations behind • Science data does not need to be 100% perfect, 100% of the time, especially if you can collect 100x MORE DATA using radiation tolerant* processing components • Accept that radiation induced upsets will happen occasionally … and just deal with them • Target 10x to 100x improvement in “MIPS/watt” *Radiation tolerant – susceptible to radiation induced upsets (bit flips) but not radiation induced destructive failures (latch-up) 3 GODDARD SPACE FLIGHT CENTER Our Solution SpaceCube: a high
    [Show full text]
  • 288485612.Pdf
    https://ntrs.nasa.gov/search.jsp?R=20200000976 2020-03-28T19:06:31+00:00Z EXPLORATION AND SPACE COMMUNICATIONS PROJECTS DIVISION National A erona Space Ad . u r_1cs and m,rnstrat ion .,. .· .·.·.' ~~_J·:: GSFC Annual SCaN Technology Review November 5th, 2019 SpaceCube On-Board Processor Update Dr. Christopher Wilson – Science Data Processing Branch/587 ......, • 41; EXPLORATION AND SPACE COMMUNICATIONS PROJECTS DIVISION NASA GODDARD SPACE FLIGHT CENTER 1 NASA GODDARD SPACE FLIGHT CENTER Outline I. Background II. Introduction III. Roadmap IV. FY19 Accomplishments and Key Highlights V. Infusion VI. Challenges VII. Ongoing and Future Work VIII.Conclusion EXPLORATION AND SPACE COMMUNICATIONS PROJECTS DIVISION 2 NASA GODDARD SPACE FLIGHT CENTER Background Challenge The next generation of NASA science and exploration missions will require “order of magnitude” improvements in on-board computing power … Mission Enabling Science Algorithms & Applications • Real-time Sensing and Control • On-Board Classification • On-Board Data Volume Reduction • Real-time “Situational Awareness” • Real-time Image Processing • “Intelligent Instrument” • Autonomous Operations Data Selection / Compression • On-Board Product Generation • Real-time Calibration / Correction • Real-time Event / Feature Detection • Inter-platform Collaboration EXPLORATION AND SPACE COMMUNICATIONS PROJECTS DIVISION 3 NASA GODDARD SPACE FLIGHT CENTER Background (continued) Our Approach The traditional path of developing radiation-hardened flight processor will not work … they are always
    [Show full text]
  • 2015 Program Book (Pdf)
    2015 ROTARY NATIONAL AWARD FOR SPACE ACHIEVEMENT 3 Col. ROBERT D. CABANA 2015 National Space Trophy Recipient The Rotary Military Career National Award After graduation for Space Achieve- from the Naval Acad- ment (RNASA) emy, Cabana attended Foundation takes the Basic School in great pleasure Quantico, Virginia, and in recognizing Colonel Robert D. completed Naval Flight Cabana, USMC (Ret.), Director Officer training in Pen- of NASA’s Kennedy Space Center sacola, Florida, in 1972. (KSC) and former NASA astronaut He served as an A-6 as the recipient of the prestigious bombardier/navigator 1977 – Cabana receiving the DAR 2015 National Space Trophy. As with Marine Air Wings Award for top Marine to complete Director, Cabana manages all in Cherry Point, North Naval Flight Training in 1976 NASA facilities and activities at Carolina and Iwakuni, (Cabana Photo) Robert D. Cabana, Direc- KSC. Japan. tor Kennedy Space Center He returned to (NASA Photo) Nominated Pensacola in 1975 for pilot training and was designated a Cabana was nominated Naval Aviator in September 1976, earning the Daughters by NASA Johnson Space Center of the American (JSC) Director Dr. Ellen Ochoa, former JSC Director Michael Revolution award L. Coats, and Dr. Michael D. Griffin, Chairman and Chief as the top Ma- Executive Officer (CEO) of Schafer Corporation “for his- ex rine to complete ceptional leadership and executive guidance in leading the flight training evolution of the NASA Kennedy Space Center as the world’s that year. He was premier multiuser spaceport in support of NASA’s explora- then assigned to tion goals.” the Second Ma- Rick Hieb, Vice President of Lockheed Martin Civil Pro- rine Aircraft Wing grams, also nominated Cabana “for outstanding leadership, in Cherry Point, commitment, vision and public North Carolina, service benefiting America’s se- 1978 - Cabana piloting VMA (AW) 332 where he flew A-6 curity and our Nation’s human (Cabana Photo) Intruders.
    [Show full text]
  • Overview of NASA GSFC Cubesat Activities
    Overview of NASA GSFC CubeSat Activities Thomas P. Flatley Head, Science Data Processing Branch Software Engineering Division NASA - Goddard Space Flight Center Greenbelt, MD USA 10th Annual CubeSat Developer’s Workshop Cal Poly, San Luis Obispo, CA April 24-26, 2013 GODDARD SPACE FLIGHT CENTER Goddard Space Flight Center GSFC is the largest combined organization of scientists and engineers in the United States dedicated to increasing knowledge of the Earth, the Solar System, and the Universe via observations from space Established in 1959 as NASA’s first Space Flight Center • End-to-End Science and Technology Missions capabilities • Integrated Science, Engineering, and Project Management • Nearly 300 Missions – from the world’s first weather satellite (1960) to Hubble Space Telescope servicing and beyond • Communication and Navigation systems for NASA and National Programs • 5500+ Scientists and Engineers Our Mission: We do Earth and Space Science Missions • Conception, development, deployment, and operation of science and technology missions • Address fundamental questions in Earth and Space Science • Deliver data and information to the public in ways that they can use it • Identify and aggressively pursue technology advancements that enable science breakthroughs GSFC has built more in-house spacecraft than any other NASA center! 2 GODDARD SPACE FLIGHT CENTER NASA Goddard Facilities • Goddard Space Flight Center, Maryland • Wallops Flight Facility, Virginia • IV&V Facility, West Virginia WFF • Goddard Institute for Space Studies, New
    [Show full text]
  • Advanced Hybrid On-Board Science Data Processor - Spacecube 2.0
    Advanced Hybrid On-Board Science Data Processor - SpaceCube 2.0 Tom Flatley Head, Science Data Processing Branch Software Engineering Division NASA - Goddard Space Flight Center Earth Science Technology Forum June 23, 2011 1 GODDARD SPACE FLIGHT CENTER On-Board Data Processing For ESDS Era Missions On-Board Processing Hybrid Science Data Processing • Data Volume Reduction • CPU • Image Processing • FPGA • Autonomous Operations • DSP • Product Generation • Event / Feature Detection GSFC SpaceCube On-Board Processor • Real-time / Direct Broadcast • 10x-100x computing performance • Docking / Servicing • Lower power (MIPS/watt) • Compression • Lower cost (commercial parts) • Calibration / Correction • Radiation tolerant (not hardened) • Classification • Software upset mitigation • Inter-platform collaboration 2 GODDARD SPACE FLIGHT CENTER SpaceCube Family Overview Unit Mission Notes Specs Stats Status Flight Hubble Relative Navigation Size: 5”x5”x7” 2009 SpaceCube 4”x4” card Servicing Sensors Experiment Wt: 7.5 lbs 1.0a (2) Virtex4 Mission 4 STS-125 May 2009 Pwr: 37W Size: 5”x5”x7” Flight SpaceCube MISSE-7 added RS-485, RHBS, 4”x4” card In Wt: 7.5 lbs 1.0b (ISS) STS-129 Nov 2009 (2) Virtex4 Pwr: 32W Implementation DEXTRE Final Original RNS unit, Size: 5”x5”x7” SpaceCube Pointing 4”x4” card w/added 1553 & Wt: 7.5 lbs 1.0c Package (2) Virtex4 Ethernet Pwr: 40W of stages (ISS) adds GigE & SATA, Size: 5”x5”x4” SpaceCube SMART 4”x4” card commercial parts, Wt: 4 lbs 1.5 (DoD/ORS) (1) Virtex5 sounding rocket flight Pwr: < 20W Earth/Space Development
    [Show full text]