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Présentation Powerpoint AHPC 2020 Klosterneuburg 21-02-2020 sipearl.com European-processor-initiative.eu P. Notton, Bio : EPI G.M. / SiPearl CEO • Academic • Engineer, Supelec (FR) (1993, Major in Signal Processing) • Executive MBA Essec (FR) & Mannheim (DE) (2008) • Business https://www.linkedin.com/in/pnotton/ • 1994-2000: HW, SW, Design, Integration for Digital TV - Thomson, Canal+ - France, USA • 2000-2005: Support, Marketing- LSI Logic, now Avago – Zarlink Semi., now Intel. France, UK • 2006-2014: VP Marketing, Associate, SetTopBox and TV, Mstar Semi. (now Mediatek). UK, Taiwan. From Startup to IPO and M&A with Mediatek of US$4B • #1 WW on TV (>200Mu per year). #3 WW on STB. 1st Secure chips in Asia. • 2014-2016: ST Micro, Group VP and GM Consumer Products Division (2400pers, WW P&L). • STB (Audio/Video/CPU/GPU/Security/Heavy SW and ecosystem) • Consumer Asics • 150mm2 Docis3.1 (28FD) / 90mm2 UHD STB (28FD) / 40mm2 HD STB (28FD) Directly involved or in charge of more than 1 Billion chips with an $4-$20 ASP Left an Exec position in ST to drive the next big Adventure in Europe and lead the future European Intel Semiconductor industry background Market Size Around $400B and growing Intel : $70B in sales Selected Numbers TSMC (#1 foundry) : Market cap = US$B260 ASML (Tools for foundries) : Market cap = US$70B (google “Trump ASML Huawei”) Copyright © SiPearl 2019 Event/Recipient/Place/Date EPI UPDATE AHPC2020 PHILIPPE NOTTON / GM EPI – SIPEARL CEO HPC for But… Source: https://ec.europa.eu/newsroom/dae/document.cfm?doc_id=54437 EUROPEAN PROCESSOR INITIATIVE EC expectations from ICT-42 & EPI value proposal Technology drive EPI expected impacts (as per EC request) High Performance Computing needs for Exascale ▶ Get a world class processor machines and beyond for the Exascale machines supplied by EuroHPC in 2023 Connected mobility, Advanced Driver ▶ Develop a sustainable Assistance Systems (ADAS) & Edge computing needs beyond 2023 economic model EPI is an H2020 program but with Servers, Cloud, Edge Low Power CPU needs industrial mindset & product delivery oriented Business drive THE EPI STORY, PART 1 THE EPI STORY, PART 2 THE EPI STORY, PART 3 THE EPI STORY, PART 4 SO NOW LET’S HAVE THIS EU SOLUTION READY ! WHAT IS BEHIND EPI AND WHERE ARE WE GOING ? Copyright © European Processor Initiative 2020. AHPC2020 27 EPI PARTNERS SIPEARL = EPI FABLESS COMPANY ONE OF THE LONG TERM VISION: FAR BEYOND HPC: END2END SECURITY - FROM THE AUTOMOTIVE SYSTEM TO THE CLOUD Secure channel WHAT ARE THE CHALLENGES ? (BEYOND THE INITIAL « MISSION IMPOSSIBLE » ITEMS) Copyright © European Processor Initiative 2020. AHPC2020 What is “really” good Intel bought MobileEye for $15B (2017) Semiconductor Companies value Intel bought Habana Labs for $2B (2019) Nvidia bought Mellanox for $6.9B (2019) Microprocessor is THE big cookie in terms of engineering Very complex development In Semiconductor engineering Top Notch technology … and Europe is out of it , for finished goods (at least up to now) Part of our Key Words CyberSecurity, BigData, AI, Sovereignty, DeepLearning, Quantum, Adas, Edge EU (>1B€) budget for EuroHPC Our supporters Actual geo-politics in favour of data protection and sovereignty Copyright © SiPearl 2019 Event/Recipient/Place/Date What is “tough” While Research has…. … tons of idea to rebuild the world … working in a different time dimension Combined “Research” and Semiconductor industry is… “Industrial project” … over expensive and not doing anything for free … not really “startup” centric in Europe … seen as technology for “grand’pa” and dirty (i.e, let’s do SW and Web SW) You burn cash for years The fun of “deep-tech” like Product may work semiconductor Product may have the expected performance Product may have a customer Investors are running away… in Europe The fun of “semiconductor But in USA over the past years, $4B invested for AI hardware…. (not to mention SW budget) investment” China invested $150B to develop a real semiconductor industry European market Is wide open to non-European competitors (example of solar panels) The budget EPI EU H2020 budget has to be completed with private budget (>100M€+) Copyright © SiPearl 2019 Event/Recipient/Place/Date But it happens…. Closure of 1st financial Q2-2020 round Exec team is joining SiPearl Q1-2020 Major announcement with Arm SiPearl becomes Sept-2019 EPI industrial hand 6,2M€ raised June-2019 SiPearl is incorporated Dec-2018 EPI kick-off EPI kick off 80M€ H2020 allocations 80M€ allocation IP / Architecture initiated European Processor Initiative 2017-2018 consortium setup Copyright © SiPearl 2019 Event/Recipient/Place/Date And the EU (and far beyond) press is following us… 22| 06/05/2020 | © SIPEARL Project Confidentiel – Peut evoluer pour amélioration BUT, WHAT’S THE TECH’ AND HPC STRATEGY BEHIND EPI ? Copyright © European Processor Initiative 2020. AHPC2020 Cambrian explosion Achieving performance through specialization 5/6/2020 Courtesy Steve Scott Cray CTO TOP10 OVER THE LAST 10 YEARS 2009 – Nov. 2014 – Nov. 2019 – Nov. (Post) Exascale CPU only 9 5 2 0 CPU + ACC. 1 5 8 10 WHY? SOME OBVIOUS REASONS… Linpack AI END OF MOORE’ LAW 1/ Gate density (million gates/mm2) 80.00 70.00 3 nm 60.00 x11 in gate 50.00 density 5 nm 40.00 30.00 7 nm 20.00 Cost & density increase Cost 10 nm 16 nm 10.00 28 nm 40 nm 65 nm 0.00 Geometry (logarithmetics) AI END OF MOORE’ LAW 2/ Energy per switch (femto Joule /gate switch) 10.00 /9 in energy per switch 65 nm 1.00 40 nm 28 nm 16 nm 10 nm 0.10 Power figure increase figure Power 7 nm 5 nm 3 nm AI 0.01 END OF MOORE’ LAW & NEEDS FOR DATA PROCESSING 3/ More Computing Power: → Higher density (more gates) Basic Needs Less power consumption → Newer silicon process per gate Impact 1 Development cost higher and higher to cover density need and power consumption Impact 2 Find more money, engineers and development time Impact 3 Or be creative and move to 2.5D design ? Copyright © SiPearl 2019 Event/Recipient/Place/Date HPC BEFORE ARTIFICIAL INTELLIGENCE Theoretical model HPC Application Results HPC WITH ARTIFICIAL INTELLIGENCE Theoretical model HPC Application Results Results Big Data AI HPC & AI AT EXASCALE: IT’S ALL ABOUT WORKFLOWS (1/2) X86 Edge Edge Computing Computing X86 Public Clouds Realtime data Realtime data processing processing Theoritical model HPC Application SUMMIT sunway taihulight FUGAKU Results Results Big Data AI HPC & AI AT EXASCALE: IT’S ALL ABOUT WORKFLOWS (2/2) Edge Edge Computing Computing Public Clouds Realtime data Realtime data processing processing European approach ✓ EU Architecture ✓ EU HW ✓ EU SW ✓ Handle all complexity the others don’t know how to ? Legacy X86 RHEA (ARM) RHEA +ACC. RHEA + GPU RHEA + *** (ARM+Risc-V) (ARM+Nvidia/AMD) (ARM+Common Platform) HPC & AI AT EXASCALE: IT’S ALL ABOUT WORKFLOWS (2/2) Edge Edge Computing Computing Public Clouds Realtime data Realtime data processing processing European approach ✓ EU Architecture ✓ EU HW ✓ EU SW ✓ Handle all complexity the others don’t know how to Compiler CPU CPU CPU CPU CPU Legacy X86 RHEA (ARM) RHEA +ACC RHEA + GPU RHEA + *** ACC. A ACC. B (ARM+RiscACC. C-V) (ARM+NvidiaACC. D/AMD) (ARM+CommonACC. Platform)E THE DEVELOPER / USER STANDPOINT Compiler (unified front-end) OPENMP 5.0 / OpenCL / OPENACC / OPENAPI Specific backend Target A Target B Target C Target D Target E RHEA RHEA RHEA RHEA RHEA ACC. A ACC. B ACC. C ACC. D ACC. E ACC. A ACC. B ACC. C ACC. D ACC. E ACC. A ACC. B ACC. C ACC. D ACC. E ACC. A ACC. B ACC. C ACC. D ACC. E EVIDENCE: INTEL OVERALL STRATEGY IN HPC, CLOUD, EDGE Intel own accelerator developments: CPU - Accelerator interface: - GPU (Artic Sound) - CXL - CSA Accelerator companies acquired by Intel or with intel in their Capital, in the last years: - Altera - Habana - Mobileye X86 - Untether AI* (Toronto, Ontario, Canada) User environment: - SambaNova Systems* (Palo Alto, - Intel Compiler California, U.S.) - OneAPI - Zhuhai EEasy Technology Co. Ltd.* (Zhuhai, China) - … LESSONS LEARNED PROFILE FOR EXASCALE SOLUTIONS Main changes The CPU has to be well balanced - Holistic view of data from IoT to Supercomputers. - peak performance is not important - Hybrid in-house / cloud - Agility (FP64 for HPC, BF16 for deep learning) is crucial - Workflow everywhere - Data transfer is crucial ➔ Cover day to day needs and for all compute not fitting well in ACC Modularity is a must have. One does not fit all Keep overall architecture simple Several accelerators, typically one per module ➔ one CPU to unify all accelerators Performance comes from accelerators Keep end user life simple - 1 CPU only - LLVM + GCC + OPENMP 5.0 - Keep it open! TECHNOLOGY & ROADMAP Copyright © European Processor Initiative 2020. AHPC2020 COMMON PLATFORM VISION: FEDERATE ACCELERATORS Interposer function Value proposition +60 potential ACC. (non exhaustive) SIPEARL RHEA chip Embedded memory (like HBM) HBM Chiplet Low cost chip from AI start-ups HBM AI Chiplet Chiplet AI Start-up Crypto Quantum or accelerator Accelerator photonics accelerator Interposer for integration THE COMMON OPEN PLATFORM IS THE EUROPEAN STANDARD FOR MANAGING EXTREME SPECIALIZATION CONCEPT OF COMMON PLATFORM : INTERPOSER & MULTI-CHIPLET HBM HBM HBM HBM Chiplet #2 Chiplet #1 Silicon interposer (passive) Package substrate CONCEPT OF COMMON PLATFORM : INTERPOSER & MULTI-CHIPLET CPU Accelerator(s) HBM HBM HBM Chiplet #1 Chiplet #2 HBM 65mm Silicon interposer (passive) Package substrate 65mm HETEROGENEOUS INTEGRATION I/O coherent Accelerators Traditional GP-GPU, interconnect and to the storage PCIe/CXLPCIe links links Package substrate
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