DOCSLIB.ORG

DPR Based AES/SM4 Encryption Highly Efficient Implementation

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
DPR Based AES/SM4 Encryption Highly Efficient Implementation Proceedings of the World Congress on Engineering and Computer Science 2018 Vol I WCECS 2018, October 23-25, 2018, San Francisco, USA DPR Based AES/SM4 Encryption Highly Efficient Implementation Qiangjia Bi, Ning Wu, Fang Zhou and Yasir consumes more area and reduces the performance of the Abstract—This paper presents an efficient hardware circuit because of the memory. It uses the additional circuit to implementation of Advance Encryption Standard (AES) and implement the two encryption schemes but only one SM4 algorithms on Xilinx Virtex 7 FPGA by exploiting the algorithm can be used in one instance of time in [7]. It costs feature of dynamic partial reconfiguration (DPR) to optimize additional area and increased power consumption. S-Box on composite field arithmetic (CFA). We utilize delay aware common sub-expression elimination (DACSE) scheme to Since both of the cipher algorithm AES and SM4 are using reduce overall area consumption by sharing the multiplicative MI as a computing unit which is the most complex function inverse (MI) over GF(28) and eliminating the redundant for reducing the chip area of S-Box. Our design shares the circuitry. Our results reveal that hardware resources i.e. slices multiplicative inverse (MI) over GF(28) based on dynamic are minimized by 21.6%, and frequency is improved by 27.9%. partial reconfiguration (DPR) technology. In order to further In addition to that efficiency of our implementation is improved improve implementation efficiency, composite field by 62.70 Mbps/slices which is higher than the previously proposed design. arithmetic (CFA) and delay aware common sub-expression elimination (DACSE) have been employed in our S-Box Index Terms—AES, SM4, Substitution Box(S-Box), DPR design. The rest of the paper is organized as follows: Section II introduces the S-Box algorithm of AES and SM4. Section III I. INTRODUCTION describes the optimized implementation of S-Box circuit. HE Advanced Encryption Standard (AES) is widely Meanwhile, the detailed CFA, DACSE algorithm and DPR Tused in various applications of information security as an technology is discussed. Section IV shows the results and encryption algorithm [1], [2]. SM4 is the first block cipher evaluation of our design along with comparison to other algorithm released by the Chinese National Cipher design schemes. Finally, Section V concludes this paper. Management Committee Office and it is usually used in wireless security of local area network products [3]. Large II. REVIEW OF S-BOX ALGORITHM number of products use these two algorithms to implement The algebraic expression of S-Box of AES and SM4 is encryption of data. Most applications are using them shown as (1) respectively [8], [9]. independently; and without any optimization that leads to Zx() I x M V more on chip area consumption. Therefore, it is significant to (1) Sx() IxACAC optimize these algorithms used in the wireless sensor networks and other resource limited applications. Where I is the multiplicative inverse (MI) over GF(28) S-Box is a nonlinear function and the fundamental which can be reused by AES and SM4, x is the input of computing unit of AES and SM4, that occupies most of area S-Box. M is the affine matrix and V is row vector of AES and power consumption in circuits. For AES it occupies S-Box. A is the affine matrix and C is row vector of SM4 about 75% area of the round transformation [4]. Hence it is S-Box. Z(x) and S(x) are the output of S-Box of AES and important to analyze the S-Box and optimize the logic. SM4 respectively. M and V are shown in (2). A and C are The design and optimization of S-Box have been studied in shown in (3). detail. Shared memory scheme is used to design a 11111000 0 reconfigurable S-Box for different cipher algorithms that 01111100 1 provide more flexibility in [5], [6]. However, their design 00111110 1 00011111 0 Manuscript received July 02, 2018; revised July 25, 2018. This work was M , V supported by the National Science Foundation of China (No.61774086, 10001111 0 No.61376025), the Fundamental Research Funds for the Central Universities 11000111 0 (NS2017023) and the Natural Science Foundation of Jiangsu Province 11100011 1 (BK20160806). Q. B. is with the College of Electronic and Information Engineering, 11110001 1 Nanjing University of Aeronautics and Astronautics, Nanjing, 211100, China (e-mail: [email protected]). (2) N. W. is with the College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing, 211100, China (e-mail: [email protected]). F. Z and Yasir is with the College of Electronic and Information Engineering Nanjing University of Aeronautics and Astronautics, Nanjing, 211100, China. ISBN: 978-988-14048-1-7 WCECS 2018 ISSN: 2078-0958 (Print); ISSN: 2078-0966 (Online) Proceedings of the World Congress on Engineering and Computer Science 2018 Vol I WCECS 2018, October 23-25, 2018, San Francisco, USA 11100101 1 shown in Fig.2. 4 2 11110010 1 The composite filed MI over GF((2 ) ) needs three 01111001 0 multiplication, two addition, one square multiply coefficient and one multiplicative inverse. All sub-calculation are 4 bit 10111100 1 A , C (3) input and 4 bit output in finite field GF(24). 01011110 0 00100111 0 10010111 1 4 2 4 Ah () ×υI Bh 11001011 1 ()-1 III. DESIGN AND OPTIMIZATION OF MI 4 4 Al Bl A. Using CFA to optimize MI over GF(28) 8 Since the calculation of the MI over GF(2 ) is very Fig. 2. MI over GF((24)2) complex, we introduce CFA to reduce the hardware 8 Following section shows the calculation of multiplication, complexity by mapping the MI over GF(2 ) into composite 4 4 2 addition, square multiply coefficient and MI in GF(2 ). field GF((2 ) ). In order to achieve this transformation, we a) Multiplication over GF(24) need to optimize the equation (1), that is expressed as: Computing the multiplication, we assume that a and b are ZM(x) 1 XV1 elements over GF(24). They can be described as: 1 (4) a=a3ω3+ a2ω2+ a1ω+ a0, b=b3ω3+ b2ω2+ b1ω+ b0 (8) S(x) A TTAXC1 C where {a3, a2, a1, a0, b3, b2, b1, b0} ∈ GF(2). So the Where δ, T is the mapping matrix and the δ-1, T-1 is the expression of multiplication can be shown in (9) and inverse of mapping matrix. We can calculate them using cabmod(f2 (x)) . MATLAB based on the irreducible polynomials. cababababababab331133003211222 The structure of S-Box computing process is shown as Fig.1. The structure on the upper half of Fig.1 is for AES cabababababab2311320022211 c (9) S-Box while bottom half shows SM4 S-Box. The MI over cabababababab1311310013322 GF((24)2) in the middle is the MI which need to be optimized. c0322331132200 abababababab As the set of equation (9) shows, the multiplication needs 25AND gates and 21 XOR gates. b) Addition over GF(24) In finite field, the addition is just XOR of the corresponding bit so the addition of GF(24) is relatively simple. It just needs 4 XOR gates, the expression is shown in (10). Fig. 1. S-Box computing process dab333 8 In finite field, the irreducible polynomials of GF(2 ) of dab222 4 2 dab (10) AES is (5). In the composite field GF((2 ) ) using (6) as dab111 irreducible polynomials internally. dab000 843 (5) 4 Px28 x x x x1 c) Constant Multiplied by Square over GF(2 ) 2 Based on the multiplication we calculated the square GF2:42 f y y y 1 (6) operation shown in (11). GFfxxxxx2:4 432 1 ha 2 32 2 Where v={0010} . v is the coefficient of the GF(2 ) 2 haa221 2 ha (11) irreducible polynomial. Modification of this polynomial haa132 affects the design the circuit. For SM4, it has a little different haa020 irreducible polynomial in finite field GF(28). When it Because v is a constant {0010} . We calculate v with the converts to composite field it still needs the irreducible 2 square operation. And it cost nothing. polynomials (6). 8 ea31 Based on the first equation in (6), the MI over GF(2 ) is calculated in the following expression: 2 ea23 ea * v (12) 1 12 ea10 A AAAAAAAhhllhhl (7) ea = BB B 02 lh 4 ∈ 4 d) Multiplicative Inverse over GF(2 ) Where A can be expressed as A=Ah+γAl, Ah, Al GF(2 ), p In finite field, it has 21 p . So in B is the output of MI that can be expressed as B=Bh+γBl, Bh, 1,GF 2 4 4 2 4 Bl ∈GF(2 ). The main architecture of MI over GF((2 ) )as GF(2 ), the calculation of multiplicative inverse is ISBN: 978-988-14048-1-7 WCECS 2018 ISSN: 2078-0958 (Print); ISSN: 2078-0966 (Online) Proceedings of the World Congress on Engineering and Computer Science 2018 Vol I WCECS 2018, October 23-25, 2018, San Francisco, USA 114 . We transfer the calculation from multiplicative Raa132 inverse to multiplication. The expression is shown in (13). Raa RRa 231 711SaR 11 5 f3320310312021aaa aaa aa aa a a Raa330 RRa810 ,, SRS271 (18) f aaa aaa aa aa a a Raa RaR 3320210201031 421936 SRS 1 381 f afaaaaaaaaaaaaa 3 321 310 210 30 21 (13) Rab RaR 520 10 2 6 aa a Raa 20 1 610 f aaa aaa aa aa a a 3321320312010 fSaRR32218 It needs 27 AND gates and 21 XOR gates. 1 fSaRR32359 fa (19) TABLE I f312389 SRRRR GATES CONSUMPTION AFTER CFA fSaRR31007 Computing Unit AND gate XOR gate The overall hardware consumption of MI over GF(24) is 10 Multiplication 25 21 AND gates and 16 XOR gates and the critical path is Addition 0 4 3TXOR+2TAND.
Load more

Recommended publications
  • Environmental DNA Reveals the Fine-Grained and Hierarchical
    www.nature.com/scientificreports OPEN Environmental DNA reveals the fne‑grained and hierarchical spatial structure of kelp forest fsh communities Thomas Lamy 1,2*, Kathleen J. Pitz 3, Francisco P. Chavez3, Christie E. Yorke1 & Robert J. Miller1 Biodiversity is changing at an accelerating rate at both local and regional scales. Beta diversity, which quantifes species turnover between these two scales, is emerging as a key driver of ecosystem function that can inform spatial conservation. Yet measuring biodiversity remains a major challenge, especially in aquatic ecosystems. Decoding environmental DNA (eDNA) left behind by organisms ofers the possibility of detecting species sans direct observation, a Rosetta Stone for biodiversity. While eDNA has proven useful to illuminate diversity in aquatic ecosystems, its utility for measuring beta diversity over spatial scales small enough to be relevant to conservation purposes is poorly known. Here we tested how eDNA performs relative to underwater visual census (UVC) to evaluate beta diversity of marine communities. We paired UVC with 12S eDNA metabarcoding and used a spatially structured hierarchical sampling design to assess key spatial metrics of fsh communities on temperate rocky reefs in southern California. eDNA provided a more‑detailed picture of the main sources of spatial variation in both taxonomic richness and community turnover, which primarily arose due to strong species fltering within and among rocky reefs. As expected, eDNA detected more taxa at the regional scale (69 vs. 38) which accumulated quickly with space and plateaued at only ~ 11 samples. Conversely, the discovery rate of new taxa was slower with no sign of saturation for UVC.
    [Show full text]
  • On the Design and Performance of Chinese OSCCA-Approved Cryptographic Algorithms Louise Bergman Martinkauppi∗, Qiuping He† and Dragos Ilie‡ Dept
    On the Design and Performance of Chinese OSCCA-approved Cryptographic Algorithms Louise Bergman Martinkauppi∗, Qiuping Hey and Dragos Iliez Dept. of Computer Science Blekinge Institute of Technology (BTH), Karlskrona, Sweden ∗[email protected], yping95 @hotmail.com, [email protected] Abstract—SM2, SM3, and SM4 are cryptographic standards in transit and at rest [4]. The law, which came into effect authorized to be used in China. To comply with Chinese cryp- on January 1, 2020, divides encryption into three different tography laws, standard cryptographic algorithms in products categories: core, ordinary and commercial. targeting the Chinese market may need to be replaced with the algorithms mentioned above. It is important to know beforehand Core and ordinary encryption are used for protecting if the replaced algorithms impact performance. Bad performance China’s state secrets at different classification levels. Both may degrade user experience and increase future system costs. We present a performance study of the standard cryptographic core and ordinary encryption are considered state secrets and algorithms (RSA, ECDSA, SHA-256, and AES-128) and corre- thus are strictly regulated by the SCA. It is therefore likely sponding Chinese cryptographic algorithms. that these types of encryption will be based on the national Our results indicate that the digital signature algorithms algorithms mentioned above, so that SCA can exercise full SM2 and ECDSA have similar design and also similar perfor- control over standards and implementations. mance. SM2 and RSA have fundamentally different designs. SM2 performs better than RSA when generating keys and Commercial encryption is used to protect information that signatures. Hash algorithms SM3 and SHA-256 have many design similarities, but SHA-256 performs slightly better than SM3.
    [Show full text]
  • A Framework for Fully-Simulatable H-Out-Of-N Oblivious Transfer
    1 A Framework For Fully-Simulatable h-Out-Of-n Oblivious Transfer Zeng Bing, Tang Xueming, and Chingfang Hsu ✦ Abstract—We present a framework for fully-simulatable h-out-of-n where i1 < i2 <...<ih 6 n. The receiver expects to oblivious transfer (OT n) with security against non-adaptive malicious h get the messages mi1 ,mi2 ,...,mih without leaking any adversaries. The framework costs six communication rounds and costs information about his private input, i.e., the h positive at most 40n public-key operations in computational overhead. Com- integers he holds. The sender expects all new knowledge pared with the known protocols for fully-simulatable oblivious transfer that works in the plain mode (where there is no trusted common learned by the receiver from their interaction is at most reference string available) and proven to be secure under standard h messages. Obviously, the OT most literature refer to is 2 n model (where there is no random oracle available), the instantiation OT1 and can be viewed as a special case of OTh . based on the decisional Diffie-Hellman assumption of the framework is Considering a variety of attack we have to confront the most efficient one, no matter seen from communication rounds or n in real environment, a protocol for OTh with security computational overhead. against malicious adversaries (a malicious adversary Our framework uses three abstract tools, i.e., perfectly binding com- mitment, perfectly hiding commitment and our new smooth projective may act in any arbitrary malicious way to learn as much hash. This allows a simple and intuitive understanding of its security.
    [Show full text]
  • Trusted Platform Module Library Part 1: Architecture TCG Public Review
    Trusted Platform Module Library Part 1: Architecture Family “2.0” Level 00 Revision 01.50 September 18, 2018 Committee Draft Contact: [email protected] Work in Progress This document is an intermediate draft for comment only and is subject to change without notice. Readers should not design products based on this document. TCG Public Review Copyright © TCG 2006-2019 TCG Trusted Platform Module Library Part 1: Architecture Licenses and Notices Copyright Licenses: Trusted Computing Group (TCG) grants to the user of the source code in this specification (the “Source Code”) a worldwide, irrevocable, nonexclusive, royalty free, copyright license to reproduce, create derivative works, distribute, display and perform the Source Code and derivative works thereof, and to grant others the rights granted herein. The TCG grants to the user of the other parts of the specification (other than the Source Code) the rights to reproduce, distribute, display, and perform the specification solely for the purpose of developing products based on such documents. Source Code Distribution Conditions: Redistributions of Source Code must retain the above copyright licenses, this list of conditions and the following disclaimers. Redistributions in binary form must reproduce the above copyright licenses, this list of conditions and the following disclaimers in the documentation and/or other materials provided with the distribution. Disclaimers: THE COPYRIGHT LICENSES SET FORTH ABOVE DO NOT REPRESENT ANY FORM OF LICENSE OR WAIVER, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, WITH RESPECT TO PATENT RIGHTS HELD BY TCG MEMBERS (OR OTHER THIRD PARTIES) THAT MAY BE NECESSARY TO IMPLEMENT THIS SPECIFICATION OR OTHERWISE. Contact TCG Administration ([email protected]) for information on specification licensing rights available through TCG membership agreements.
    [Show full text]
  • Introduction to the Commercial Cryptography Scheme in China
    Introduction to the Commercial Cryptography Scheme in China atsec China Di Li Yan Liu [email protected] [email protected] +86 138 1022 0119 +86 139 1072 6424 6 November 2015, Washington DC, U.S. © atsec information security, 2015 Disclaimer atsec China is an independent lab specializing in IT security evaluations. The authors do not represent any Chinese government agency or Chinese government-controlled lab. All information used for this presentation is publicly available on the Internet, despite the fact that most of them are in Chinese. 6 November 2015, Washington DC, U.S. 2 Agenda § Background on commercial cryptography in China § Product certification list § Published algorithms and standards § Certification scheme § Conclusions 6 November 2015, Washington DC, U.S. 3 What is “Commercial Cryptography”? 6 November 2015, Washington DC, U.S. 4 OSCCA and Commercial Cryptography − What is “Commercial Cryptography” in China? − “Commercial Cryptography” is a set of algorithms and standards used in the commercial area, e.g. banks, telecommunications, third party payment gateways, enterprises, etc. … − In this area, only “Commercial Cryptography” certified products can be used. − Constituted by the Chinese Academy of Science (CAS) − Issued and regulated by the Office of the State Commercial Cryptography Administration (OSCCA) − Established in 1999 − Testing lab setup in 2005 6 November 2015, Washington DC, U.S. 5 OSCCA Certified Product List Certified product list (1322 items): http://www.oscca.gov.cn/News/201510/News_1310.htm 6 November 2015, Washington DC, U.S. 6 Certified Products and Its Use − Security IC chip − Password keypad − Hardware token including Public Key Infrastructure (PKI), One Time Password (OTP), and its supporting system − Hardware security machine / card − Digital signature and verification system − IPSEC / SSL VPN Gateway − Value Added Tax (VAT) audit system 6 November 2015, Washington DC, U.S.
    [Show full text]
  • S-Box Optimization for SM4 Algorithm
    Proceedings of the World Congress on Engineering and Computer Science 2017 Vol I WCECS 2017, October 25-27, 2017, San Francisco, USA S-box Optimization for SM4 Algorithm Yuan Zhu, Fang Zhou, Ning Wu, Yasir derivation process. In [4]-[5], S-boxes based on polynomial Abstract—This paper proposes a highly optimized S-box of basis and normal basis were introduced. Their optimizations SM4 algorithm for low-area and high-speed embedded for S-box focused on the hardware overhead at the cost of application. A novel methodology is adopted for S-box throughput. Therefore, when the SM4 algorithm is used for implementation based on Composite Field Arithmetic (CFA) and mixed basis. The optimization result shows that the S-box high-throughput and area-constrained devices, a short-delay based on mixed basis has shorter critical path than S-boxes and compact S-box is required for SM4 hardware based on normal basis and polynomial basis. Compared with implementation. previous works, the mixed basis based S-box proposed in this This study focuses on the optimization of S-box for SM4 paper can achieve the shortest critical path. Besides, the and the major contributions include: 2 2 operations over GF((2 ) ) and the constant matrix Coalescence design and implementation based on CFA multiplications are optimized by Delay-Aware Common Sub-expression Elimination (DACSE) algorithm. ASIC technology [6] and mixed basis [7]. 2 2 implementation using static 180 nm @ 1.8 V yield an area The MI over GF((2) ) and constant matrix reduction of 35.57% as compared to direct implementation.
    [Show full text]
  • Unbalanced Sharing: a Threshold Implementation of SM4
    SCIENCE CHINA Information Sciences May 2021, Vol. 64 159102:1–159102:3 . LETTER . https://doi.org/10.1007/s11432-018-9794-6 Unbalanced sharing: a threshold implementation of SM4 Man WEI1,2,3, Siwei SUN1,2,3*, Zihao WEI1,2,3 & Lei HU1,2,3 1State Key Laboratory of Information Security, Institute of Information Engineering, Chinese Academy of Sciences, Beijing 100093, China; 2Data Assurance and Communication Security Research Center, Chinese Academy of Sciences, Beijing 100093, China; 3 School of Cyber Security, University of Chinese Academy of Sciences, Beijing 100049, China Received 3 November 2018/Accepted 20 February 2019/Published online 19 March 2021 Citation Wei M, Sun S W, Wei Z H, et al. Unbalanced sharing: a threshold implementation of SM4. Sci China Inf Sci, 2021, 64(5): 159102, https://doi.org/10.1007/s11432-018-9794-6 Dear editor, ent input variables are split into different numbers of shares In recent years, we have witnessed a rapid development still maintains the three essential properties for TIs. Such of the side-channel attacks, which deviate from the tradi- a scheme is named an unbalanced sharing scheme. Taking the multiplication function y = f(x1,x2) = x1x2 as an ex- tional block-box model and exploit the leakages of crypto- 1 1 1 1 2 ample, we split x into 3 shares (x1,x2,x3), and x into 5 graphic devices. Among those attacks, the so-called differen- 2 2 2 2 2 tial power analysis (DPA) exploiting the correlation between shares (x1,x2,x3,x4,x5), and the sharing is given by the instantaneous power consumption and the sensitive in- 1 1 2 2 2 2 2 2 y1 = x2 + x3x2 + x3 + x4 + x5 + x4 + x5, termediate values of a cryptographic algorithm is one of the 1 2 2 2 2 1 2 2 most powerful techniques [1].
    [Show full text]
  • Iso/Iec 18033-3:2010 Dam 2
    DRAFT AMENDMENT ISO/IEC 18033-3:2010 DAM 2 ISO/IEC JTC 1/SC 27 Secretariat: DIN Voting begins on: Voting terminates on: 2018-07-19 2018-10-11 Information technology — Security techniques — Encryption algorithms — Part 3: Block ciphers AMENDMENT 2: SM4 Technologies de l'information — Techniques de sécurité — Algorithmes de chiffrement — Partie 3: Chiffrement par blocs AMENDEMENT 2: . iTeh STANDARD PREVIEW ICS: 35.030 (standards.iteh.ai) ISO/IEC 18033-3:2010/DAmd 2 https://standards.iteh.ai/catalog/standards/sist/b9d423fe-1fde-4195-82d8- a232c08c09b0/iso-iec-18033-3-2010-damd-2 THIS DOCUMENT IS A DRAFT CIRCULATED FOR COMMENT AND APPROVAL. IT IS THEREFORE SUBJECT TO CHANGE AND MAY NOT BE REFERRED TO AS AN INTERNATIONAL STANDARD UNTIL PUBLISHED AS SUCH. IN ADDITION TO THEIR EVALUATION AS BEING ACCEPTABLE FOR INDUSTRIAL, This document is circulated as received from the committee secretariat. TECHNOLOGICAL, COMMERCIAL AND USER PURPOSES, DRAFT INTERNATIONAL STANDARDS MAY ON OCCASION HAVE TO BE CONSIDERED IN THE LIGHT OF THEIR POTENTIAL TO BECOME STANDARDS TO WHICH REFERENCE MAY BE MADE IN Reference number NATIONAL REGULATIONS. ISO/IEC 18033-3:2010/DAM 2:2018(E) RECIPIENTS OF THIS DRAFT ARE INVITED TO SUBMIT, WITH THEIR COMMENTS, NOTIFICATION OF ANY RELEVANT PATENT RIGHTS OF WHICH THEY ARE AWARE AND TO PROVIDE SUPPORTING DOCUMENTATION. © ISO/IEC 2018 ISO/IEC 18033-3:2010/DAM 2:2018(E) iTeh STANDARD PREVIEW (standards.iteh.ai) ISO/IEC 18033-3:2010/DAmd 2 https://standards.iteh.ai/catalog/standards/sist/b9d423fe-1fde-4195-82d8- a232c08c09b0/iso-iec-18033-3-2010-damd-2 COPYRIGHT PROTECTED DOCUMENT © ISO/IEC 2018 All rights reserved.
    [Show full text]
  • Introduction to the Commercial Cryptography Scheme in China
    Introduction to the Commercial Cryptography Scheme in China atsec China Di Li Yan Liu [email protected] [email protected] +86 138 1022 0119 +86 139 1072 6424 18 May 2016 © atsec information security, 2016 Disclaimer atsec China is an independent lab specializing in IT security evaluations. The authors do not represent any Chinese government agency or Chinese government- controlled lab. All information used for this presentation is publicly available on the Internet, despite the fact that most of them are in Chinese. 18 May 2016, Ottawa, Ontario, Canada 2 Agenda ▪ Background on commercial cryptography in China ▪ Product certification list ▪ Published algorithms and standards ▪ Certification scheme ▪ Conclusions 18 May 2016, Ottawa, Ontario, Canada 3 What is “Commercial Cryptography”? 18 May 2016, Ottawa, Ontario, Canada 4 OSCCA and Commercial Cryptography ● What is “Commercial Cryptography” in China? − “Commercial Cryptography” is a set of algorithms and standards used in the commercial area, e.g. banks, telecommunications, third party payment gateways, enterprises, etc. … − In this area, only “Commercial Cryptography” certified products can be used. − Constituted by the Chinese Academy of Science (CAS) − Issued and regulated by the Office of the State Commercial Cryptography Administration (OSCCA) − Established in 1999 − Testing lab setup in 2005 18 May 2016, Ottawa, Ontario, Canada 5 OSCCA Certified Product List Certified product list (1509 items): Until 2016-02-29 http://www.oscca.gov.cn/News/201603/News_1321. htm Sequence Product Product
    [Show full text]
  • A New Compact Hardware Architecture of S-Box for Block Ciphers AES and SM4
    LETTER IEICE Electronics Express, Vol.14, No.11, 1–6 A new compact hardware architecture of S-Box for block ciphers AES and SM4 Yaoping Liu1a), Ning Wu1b), Xiaoqiang Zhang2, and Fang Zhou1 1 College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing 210016, China 2 College of Electrical Engineering, Anhui Polytechnic University, Wuhu 241000, China a) [email protected] b) [email protected] Abstract: In this paper, a new compact implementation of S-Box based on composite field arithmetic (CFA) is proposed for block ciphers AES and SM4. Firstly, using CFA technology, the multiplicative inverse (MI) over GF(28) is mapped into GF((24)2) and the new architecture of S-Box is designed. Secondly, the MI over GF(24) is optimized by Genetic algorithm (GA), and the multiplication over GF(24) and the constant matrix multi- plications are optimized by delay-aware common sub-expression elimination (DACSE) algorithm. Finally, compared with the direct implementation, the area reduction of MI over GF((24)2) and the new S-Box are up to 49.29% and 43.80%, severally. In 180 nm 1.8 V COMS technology, compared to the synthesized results of AES S-Box and SM4 S-Box, the area and power consumption of the new S-Box are reduced by 24.76% and 38.54%, respectively. Keywords: advanced encryption standard (AES), SM4, S-Box, composite field arithmetic (CFA) Classification: Integrated circuits References [1] L. Fu, et al.: “A low-cost UHF RFID tag chip with AES cryptography engine,” Secur. Commun. Netw. 7 (2014) 365 (DOI: 10.1002/sec.723).
    [Show full text]
  • SM4 Block Cipher Algorithm
    SM4 Block Cipher Algorithm Content 1 Scope ............................................................................................................................... 1 2 Terms and Definitions .................................................................................................. 1 3 Symbols and Acronyms ................................................................................................ 1 4 Algorithm Structure ..................................................................................................... 1 5 Key and Key Parameters .............................................................................................. 2 6 Round Function � ......................................................................................................... 2 6.1 Round Function Structure ....................................................................................... 2 6.2 Permutation � ............................................................................................................ 2 7 Algorithm Description ................................................................................................. 3 7.1 Encryption .................................................................................................................... 3 7.2 Decryption .................................................................................................................... 3 7.3 Key Expansion ............................................................................................................
    [Show full text]
  • A Compact Implementation of SM4 Encryption and Decryption Circuit
    Proceedings of the World Congress on Engineering and Computer Science 2019 WCECS 2019, October 22-24, 2019, San Francisco, USA A Compact Implementation of SM4 Encryption and Decryption Circuit Xiangli Bu, Ning Wu, Fang Zhou, Muhammad Rehan Yahya, Fen Ge implementation, it is of great significance to study the Abstract—For the scenarios with moderate data throughput hardware circuit implementation of the SM4 algorithm. and low area overhead, this paper designs a compact SM4 Recently, lots of research have being done on the encryption and decryption algorithm circuit based on reusing implementation of small-area SM4 algorithm circuits. the S-box in key schedule and round transformation. In Reusing the S-box in the encryption and decryption part to addition, the area of proposed circuit could be further reduced by Composite Field Approach and optimizing the critical path achieve the goal of reducing the area is proposed in [1]. of the circuit by dividing timing. Finally, the design of state However, it fails to fully optimize the circuit structure and machine that controls the encryption and decryption process is reduce the critical path length of the circuit. Since the S-box is presented. Under the SMIC 0.18μm CMOS process, the the only nonlinear operation in the SM4 algorithm [9], it acts 2 synthesized circuit occupies only 0.057 mm of resources. on each round of encryption and decryption operations and Compared with other implementations, the proposed design has key schedule, so the hardware implementation performance of a higher ratio of throughput/gate, which is very suitable for low area overhead applications such as smart IC cards.
    [Show full text]