Pdf 146.00K An12

Application Note 12 October 1985 Circuit Techniques for Clock Sources Jim Williams Almost all digital or communication systems require some network shown is a replacement for this function. Figure 1d form of clock source. Generating accurate and stable clock is a version using two gates. Such circuits are particularly signals is often a difficult design problem. vulnerable to spurious operation but are attractive from a Quartz crystals are the basis for most clock sources. The component count standpoint. The two linearly biased gates combination of high Q, stability vs time and temperature, provide 360 degrees of phase shift with the feedback path and wide available frequency range make crystals a coming through the crystal. The capacitor simply blocks price-performance bargain. Unfortunately, relatively little DC in the gain path. Figure 1e shows a circuit based on information has appeared on circuitry for crystals and discrete components. Contrasted against the other cir- engineers often view crystal circuitry as a black art, best cuits, it provides a good example of the design flexibility left to a few skilled practitioners (see box, “About Quartz and certainty available with components specified in the Crystals”). linear domain. This circuit will oscillate over a wide range of crystal frequencies, typically 2MHz to 20MHz. In fact, the highest performance crystal clock circuitry does demand a variety of complex considerations and subtle The 2.2k and 33k resistors and the diodes compose a implementation techniques. Most applications, however, pseudo current source which supplies base drive. don’t require this level of attention and are relatively easy At 25°C the base current is: to serve. Figure 1 shows five (5) forms of simple crystal 1.2V –1V clocks. Types 1a through 1d are commonly referred to BE = 18µA as gate oscillators. Although these types are popular, 33k they are often associated with temperamental operation, To saturate the transistor, which would stop the oscilla- spurious modes or outright failure to oscillate. The pri- tor, requires VCE to go to near zero. The collector current mary reason for this is the inability to reliably identify the necessary to do this is: analog characteristics of the gates used as gain elements. 5V It is not uncommon in circuits of this type for gates from IC(sat) = = 5mA different manufacturers to produce markedly different 1k circuit operation. In other cases, the circuit works, but is with 18μA of base drive a beta of: influenced by the status of other gates in the same pack- 5mA age. Other circuits seem to prefer certain gate locations = 278 is required 18µA within the package. In consideration of these difficulties, gate oscillators are generally not the best possible choice in At 1mA the DC beta spread of 2N3904’s is 70 to ≅210. a production design; nevertheless, they offer low discrete The transistor should not saturate...even at supply volt- component count, are used in a variety of situations, and ages below 3V. bear mention. Figure 1a shows a CMOS Schmitt trigger biased into its linear region. The capacitor adds phase shift In similar fashion, the effects of temperature may also and the circuit oscillates at the crystal resonant frequency. be determined. Figure 1b shows a similar version for higher frequencies. VBE vs temperature over 25°C – 70°C is: The gate gives inverting gain, with the capacitors providing additional phase shift to produce oscillation. In Figure 1c, a –2.2mV/°C • 45° = –99mV. TTL gate is used to allow the 10MHz operating frequency. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear The low input resistance of TTL elements does not allow Technology Corporation. All other trademarks are the property of their respective owners. the high value, single resistor biasing method. The R-C-R an12fa AN12-1 Application Note 12 100kHz 1MHz 68pF 0.25μF 1k 68pF 2M 6.8M 74LS04 1k 74C14 4049 OUT OUT OUT 10MHz 68pF 43pF 68pF 68pF 68pF (1a) (1b) (1c) 0.1μF 1k 3k 5V 74LS041200pF 74LS04 1k 5V OUT 20MHz 5MHz 2.2k OUT 33k 2N3904 22pF ALL CRYSTALS PARALLEL RESONANT AT-CUT TYPES 100pF (1d) (1e) AN-12 F01 Figure 1. Typical Gate Oscillators and the Preferred Discrete Unit The compliance voltage of the current source will move: to the crystal’s resonance, the crystal “steals” energy from 2 • –2.2mV/°C • 45°C = –198mV. the RC, forcing it to run at the crystal’s frequency. The crystal activity is readily apparent in Trace A of Figure 3, Hence, a first order compensation occurs: which is the LT®1011’s “–” input. Trace B is the LT1011’s –198mV – 99mV = –99mV total shift. output. In circuits of this type, it is important to ensure that enough current is available to quickly start the crystal This remaining –99mV over temperature causes a shift resonating while simultaneously maintaining an RC time in base current: constant of appropriate frequency. Typically, the free run- 0.6V ning frequency should be set 5% to 10% above crystal 25°C current = = 18µA 33k resonance with a resistor feedback value calculated to allow about 100μA into the capacitor-crystal network. This 0.5V 70°C current = = 15µA type of circuit is not recommended for use above a few 33k hundred kHz because of comparator delays. 18µA – 15µA = 3µA 50k This 3μA shift (about 16%) provides a compensation for transistor h shift with temperature, which moves about 0UT FE – 20% from 25°C to 70°C. Thus the circuit’s behavior over 1k 85kHz 100pF LT1011 5V temperature is quite predictable. The resistor, diode and + V tolerances mean that only first order compensations 10k BE 10k for VBE and hFE over temperature are appropriate. 5V Figure 2 shows another approach. This circuit uses a 10k standard RC-comparator multivibrator circuit with the AN-12 F02 crystal connected directly across the timing capacitor. Because the free running frequency of the circuit is close Figure 2. Crystal Stabilized Relaxation Oscillator an12fa AN12-2 Application Note 12 Figures 4a and 4b use another comparator based approach. crystals operate in overtone mode. Because of this, oscil- In Figure 4a, the LT1016 comparator is set up with DC lation can occur at multiples of the desired frequency. The negative feedback. The 2k resistors set the common mode damper network rolls off gain at high frequency, insuring level at the device’s positive input. Without the crystal, proper operation. the circuit may be considered as a very wideband (50GHz All of the preceding circuits will typically provide tem- GBW) unity gain follower biased at 2.5V. With the crystal perature coefficients of 1ppm/°C with long term (1 year) inserted, positive feedback occurs and oscillation com- stability of 5ppm to 10ppm. Higher stability is achievable mences. Figure 4a is useful with AT-cut fundamental mode with more attention to circuit design and control of tem- crystals up to 10MHz. Figure 4b is similar, but supports perature. Figure 5 shows a Pierce class circuit with fine oscillation frequencies to 25MHz. Above 10MHz, AT-cut frequency trimming provided by the paralleled fixed and 5V 5V 1MHz TO 10MHz 10MHz TO 25MHz 2k CRYSTAL 2k (AT CUT) 22Ω 5V 5V + 820pF A = 1V/DIV V V + + Q + Q 2k LT1016 2k LT1016 B = 5V/DIV OUTPUT OUTPUT – Q – Q GND GND LATCH LATCH – V V – 2k 0.068μF 200pF 2k AN-12 F03 10μs/DIV AN-12 F04a AN-12 F04b Figure 3. Figure 2’s Waveforms Figure 4a. 1MHz to 10MHz Figure 4b. 10MHz to 25MHz Crystal Oscillator Crystal Oscillator 5V MAIN 15V 15V OUT TO SUPPLY LT1005 “OSCILLATOR READY” AND MAIN 5V POWER 0.1μF 10k 5.6k AUX VCONTROL Q2 OUT Q3 2N3904 33pF 5V 2N3904 10k 1000pF 1N914 OUTPUT 10pF (50Ω) 34.8k 34.8k 100k 15V 15V 8.2μF 100pF – + Q1 R SELECT 3k 2N3904 TYPICAL LT1001 600Ω + 1N914 2N6387 5.6k 330pF –15V DARLINGTON 3.3k 0.1μF RT THERMAL FEEDBACK 34.8k Oscillator 8.2k 22M * TRW MAR-6 RESISTOR 0.01μF RT = YELLOW SPRINGS INST. #44014 75°C = 35.39k 2k = BLILEY #BG61AH-55, 75°C TURNING POINT. 5MHz FREQUENCY Oven Control AN-12 F05 Figure 5. Ovenized Oscillator an12fa AN12-3 Application Note 12 variable capacitors. The transistor provides 180° of phase system the clock is associated with. For the crystal and shift with the loop components adding another 180°, circuit values specified, this clock will drift less than resulting in oscillation. The LT1005 voltage regulator and 1 × 10–9 over 0°C to 70°C with a time drift of 1 part the LT1001 op amp are used in a precision temperature 10–9 week. servo to control crystal temperature. The LT1001 extracts The oven approach to removing temperature effects of the differential bridge signal and drives the Darlington crystal clock frequency is the most effective and in wide stage to power the heater, which is monitored by the use. Ovens do, however, require substantial power and thermistor. In practice, the sensor is tightly coupled to warm-up time. In some situations, this is unacceptable. the heater. The RC feedback values should be optimized Another approach to offsetting temperature effects is for the thermal characteristics of the oven. In this case, to measure ambient temperature and insert a scaled the oven was constructed of aluminum tube stock 3" long compensation factor into the crystal clock’s frequency × 1" wide × 1/8" thick. The heater windings were dis- trimming network. This open loop correction technique tributed around the cylinder and the assembly placed relies on matching the clock frequency vs temperature within a small insulating Dewar flask. This allows 75°C characteristic, which is quite repeatable.

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