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Tensor Computation: a New Framework for High-Dimensional Problems In ACCEPTED BY IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATEDCIRCUITSANDSYSTEMS, VOL. XX,NO.XX,XX2016 1 Tensor Computation: A New Framework for High-Dimensional Problems in EDA Zheng Zhang, Kim Batselier, Haotian Liu, Luca Daniel and Ngai Wong (Invited Keynote Paper) Abstract—Many critical EDA problems suffer from the curse modeling, simulation and optimization problems, whose per- of dimensionality, i.e. the very fast-scaling computational burden formance heavily relies on effective numerical implementa- produced by large number of parameters and/or unknown tion. Very often, numerical modeling or simulation core tools variables. This phenomenon may be caused by multiple spatial or temporal factors (e.g. 3-D field solvers discretizations and are called repeatedly by many higher-level EDA tools such multi-rate circuit simulation), nonlinearity of devices and circuits, as design optimization and system-level verification. Many large number of design or optimization parameters (e.g. full- efficient matrix-based and vector-based algorithms have been chip routing/placement and circuit sizing), or extensive process developed to address the computational challenges in EDA. variations (e.g. variability/reliability analysis and design for Here we briefly summarize a small number of examples among manufacturability). The computational challenges generated by such high dimensional problems are generally hard to handle the numerous research results. efficiently with traditional EDA core algorithms that are based In the context of circuit simulation, modified nodal analy- on matrix and vector computation. This paper presents “tensor sis [2] was proposed to describe the dynamic network of a computation” as an alternative general framework for the de- general electronic circuit. Standard numerical integration and velopment of efficient EDA algorithms and tools. A tensor is a linear/nonlinear equation solvers (e.g., Gaussian elimination, high-dimensional generalization of a matrix and a vector, and is a natural choice for both storing and solving efficiently high- LU factorization, Newton’s iteration) were implemented in dimensional EDA problems. This paper gives a basic tutorial on the early version of SPICE [1]. Driven by communication tensors, demonstrates some recent examples of EDA applications IC design, specialized RF simulators were developed for (e.g., nonlinear circuit modeling and high-dimensional uncer- periodic steady-state [3]–[7] and noise [8] simulation. Iterative tainty quantification), and suggests further open EDA problems solvers and their parallel variants were further implemented where the use of tensor computation could be of advantage. to speed up large-scale linear [9]–[11] and nonlinear circuit simulation [12], [13]. In order to handle process variations, I. INTRODUCTION both Monte Carlo [14], [15] and stochastic spectral meth- ods [16]–[26]) were investigated to accelerate stochastic circuit A. Success of Matrix & Vector Computation in EDA Hystory simulation. The advancement of fabrication technology and the de- Efficient models were developed at almost every design velopment of Electronic Design Automation (EDA) are two level of hierarchy. At the process level, many statistical and engines that have been driving the progress of semiconductor learning algorithms were proposed to characterize manufac- industries. The first integrated circuit (IC) was invented in turing process variations [27]–[29]. At the device level, a 1959 by Jack Kilby. However, until the early 1970s designers huge number of physics-based (e.g., BSIM [30] for MOS- could only handle a small number of transistors manually. The FET and RLC interconnect models) and math-based model- idea of EDA, namely designing electronic circuits and systems ing frameworks were reported and implemented. Math-based arXiv:1610.04272v1 [cs.NA] 13 Oct 2016 automatically using computers, was proposed in the 1960s. approaches are also applicable to circuit and system-level Nonetheless, this idea was regarded as science fiction until problems due to their generic formulation. They start from SPICE [1] was released by UC Berkeley. Due to the success a detailed mathematical description [e.g., a partial differen- of SPICE, numerous EDA algorithms and tools were further tial equation (PDE) or integral equation describing device developed to accelerate various design tasks, and designers physics [31]–[33] or a dynamic system describing electronic could design large-scale complex chips without spending circuits] or some measurement data, then generate compact months or years on labor-intensive work. models by model order reduction [34]–[42] or system iden- The EDA area indeed encompasses a very large variety tification [43]–[46]. These techniques were further extended of diverse topics, e.g., hardware description languages, logic to problems with design parameters or process uncertain- synthesis, formal verification. This paper mainly concerns ties [47]–[55]. computational problems in EDA. Specifically, we focus on Thanks to the progress of numerical optimization [56]– [58], a lot of algorithmic solutions were developed to solve Z. Zhang and L. Daniel are with Department of Electrical Engineering and EDA problems such as VLSI placement [59], routing [60], Computer Science, Massachusetts Institute of Technology (MIT), Cambridge, MA. E-mails: {z zhang, luca}@mit.edu logic synthesis [61] and analog/RF circuit optimization [62], K. Batselier and N. Wong are with Department of Electrical and [63]. Based on design heuristics or numerical approximation, Electronic Engineering, the University of Hong Kong. E-mails: {kimb, the performance of many EDA optimization engines were nwong}@eee.hku.hk H. Liu is with Cadence Design Systems, Inc. San Jose, CA. E-mail: improved. For instance, in analog/RF circuit optimization, [email protected] posynomial or polynomial performance models were extracted ACCEPTED BY IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATEDCIRCUITSANDSYSTEMS, VOL. XX,NO.XX,XX2016 2 to significantly reduce the number of circuit simulations [64]– by choosing the best values of d design parameters (e.g. [66]. the sizes of all transistors). When the performance metric is a strongly nonlinear and discontinuous function of B. Algorithmic Challenges and Motivation Examples design parameters, sweeping the whole parameter space Despite the success in many EDA applications, conven- is possibly the only feasible solution. Even if a small tional matrix-based and vector-based algorithms have certain number of samples are used for each parameter, a huge intrinsic limitations when applied to problems with high number of simulations are required to explore the whole dimensionality. These problems generally involve an extremely parameter space. large number of unknown variables or require many sim- • Variability-Aware Design Automation. Process varia- ulation/measurement samples to characterize a quantity of tion is a critical issue in nano-scale chip design. Captur- interest. Below we summarize some representative motivation ing the complex stochastic behavior caused by process examples among numerous EDA problems: uncertainties can be a data-intensive task. For instance, • Parameterized 3-D Field Solvers. Lots of devices are a huge number of measurement data points are required described by PDEs or integral equations [31]–[33] with d to characterize accurately the variability of device pa- spatial dimensions. With n discretization elements along rameters [27]–[29]. In circuit modeling and simulation, each spatial dimension (i.e., x-, y- or z-direction), the the classical stochastic collocation algorithm [22]–[24] number of unknown elements is approximately N=nd requires many simulation samples in order to construct in a finite-difference or finite-element scheme. When n a surrogate model. Although some algorithms such as is large (e.g. more than thousands and often millions), compressed sensing [29], [71] can reduce measurement even a fast iterative matrix solver with O(N) complexity or computational cost, lots of hidden data information cannot handle a 3-D device simulation. If design param- cannot be fully exploited by matrix-based algorithms. eters (e.g. material properties) are considered and the PDE is further discretized in the parameter space, the computational cost quickly extends beyond the capability C. Toward Tensor Computations? of existing matrix- or vector-based algorithms. In this paper we argue that one effective way to address • Multi-Rate Circuit Simulation. Widely separated time the above challenges is to utilize tensor computation. Tensors scales appear in many electronic circuits (e.g. switched are high-dimensional generalizations of vectors and matrices. capacitor filters and mixers), and they are difficult to Tensors were developed well over a century ago, but have simulate using standard transient simulators. Multi-time been mainly applied in physics, chemometrics and psycho- PDE solvers [67] reduce the computational cost by dis- metrics [72]. Due to their high efficiency and convenience cretizing the differential equation along d temporal axes in representing and handling huge data arrays, tensors are describing different time scales. Similar to a 3-D device only recently beginning to be successfully applied in many simulator, this treatment may also be affected by the curse engineering fields, including (but not limited to) signal pro- of dimensionality. Frequency-domain approaches such as cessing [73], big data [74], machine learning and scientific multi-tone
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