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Address Translation Address Translaon Main Points • Address Translaon Concept – How do we convert a virtual address to a physical address? • Flexible Address Translaon – Base and bound – Segmentaon – Paging – Mul+level translaon • Efficient Address Translaon – Translaon Lookaside Buffers – Virtually and physically addressed caches Address Translaon Concept Virtual Address Raise Processor Translation Invalid Exception Valid Physical Memory Data Physical Address Data Address Translaon Goals • Memory protec+on • Memory sharing – Shared libraries, interprocess communicaon • Sparse addresses – Mul+ple regions of dynamic allocaon (heaps/stacks) • Efficiency – Memory placement – Run+me lookup – Compact translaon tables • Portability Bonus Feature • What can you do if you can (selec+vely) gain control whenever a program reads or writes a par+cular virtual memory locaon? • Examples: – Copy on write – Zero on reference – Fill on demand – Demand paging – Memory mapped files – … A Preview: MIPS Address Translaon • SoVware-Loaded Translaon lookaside buffer (TLB) – Cache of virtual page -> physical page translaons – If TLB hit, physical address – If TLB miss, trap to kernel – Kernel fills TLB with translaon and resumes execu+on • Kernel can implement any page translaon – Page tables – Mul+-level page tables – Inverted page tables – … Physical A Preview: MIPS Lookup Memory Virtual Address Page# Offset Translation Lookaside Buffer (TLB) Virtual Page Page Frame Access Physical Address Matching Entry Frame Offset Page Table Lookup Virtually Addressed Base and Bounds Processor’s View Implementation Physical Memory Virtual Base Memory Base Virtual Virtual Physical Address Address Address Processor Processor Base+ Bound Bound Raise Exception Queson • With virtually addressed base and bounds, what is saved/restored on a process context switch? Virtually Addressed Base and Bounds • Pros? – Simple – Fast (2 registers, adder, comparator) – Safe – Can relocate in physical memory without changing process • Cons? – Can’t keep program from accidentally overwri+ng its own code – Can’t share code/data with other processes – Can’t grow stack/heap as needed Segmentaon • Segment is a con+guous region of virtual memory • Each process has a segment table (in hardware) – Entry in table = segment • Segment can be located anywhere in physical memory – Each segment has: start, length, access permission • Processes can share segments – Same start, length, same/different access permissions Segmentaon Process View Implementation Physical Memory Base 3 Virtual Memory Stack Processor Base+ Virtual Bound 3 Address Code Virtual Segment Table Processor Address Base Bound Access Base 0 Segment O!set Read Code Data R/W Base+ R/W Bound 0 R/W Heap Base 1 Data Physical Address Base+ Stack Bound 1 Raise Exception Base 2 Heap Base+ Bound 2 Segment start length 2 bit segment # code 0x4000 0x700 12 bit offset data 0 0x500 heap - - stack 0x2000 0x1000 Virtual Memory Physical Memory main: 240 store #1108, r2 x: 108 a b c \0 244 store pc+8, r31 … 248 jump 360 main: 4240 store #1108, r2 24c 4244 store pc+8, r31 … 4248 jump 360 strlen: 360 loadbyte (r2), r3 424c … … … … 420 jump (r31) strlen: 4360 loadbyte (r2),r3 … … x: 1108 a b c \0 4420 jump (r31) … … Queson • With segmentaon, what is saved/restored on a process context switch? UNIX fork and Copy on Write • UNIX fork – Makes a complete copy of a process • Segments allow a more efficient implementaon – Copy segment table into child – Mark parent and child segments read-only – Start child process; return to parent – If child or parent writes to a segment (ex: stack, heap) • trap into kernel • make a copy of the segment and resume Processor’s View Implementation Physical Process 1`s View Memory Virtual Memory P2`s Data Code Processor Processor P1`s Heap Virtual Segment Table Address Data Seg. Offset 0x0500 Base Bound Access 0 500 Code Read P1`s Virtual Data R/W Stack Heap Address Heap R/W P1`s Stack R/W Data Stack Physical Address P2`s Heap Process 2`s View Code P1’s+ P2`s Processor Processor Code Virtual Segment Table Address P2`s Data Stack 0x0500 Seg. Offset Base Bound Access 0 500 Code Read Data R/W Heap Virtual Address Heap R/W Stack R/W Stack Zero-on-Reference • How much physical memory is needed for the stack or heap? – Only what is currently in use • When program uses memory beyond end of stack – Segmentaon fault into OS kernel – Kernel allocates some memory • How much? – Zeros the memory • avoid accidentally leaking informaon! – Modify segment table – Resume process Segmentaon • Pros? – Can share code/data segments between processes – Can protect code segment from being overwripen – Can transparently grow stack/heap as needed – Can detect if need to copy-on-write • Cons? – Complex memory management • Need to find chunk of a par+cular size – May need to rearrange memory from +me to +me to make room for new segment or growing segment • External fragmentaon: wasted space between chunks Paged Translaon • Manage memory in fixed size units, or pages • Finding a free page is easy – Bitmap allocaon: 0011111100000001100 – Each bit represents one physical page frame • Each process has its own page table – Stored in physical memory – Hardware registers • pointer to page table start • page table length Paged Translaon (Abstract) Proces View Physical Memory Frame 0 Code 0 Data 0 VPage 0 Heap 1 Code VPage 1 Code 1 Heap 0 Data Data 1 Heap Heap 2 Stack VPage N Stack 1 Stack 0 Frame M Paged Translaon (Implementaon) Physical Memory Physical Frame 0 Frame 1 Address Frame Offset Processor Virtual Page Table Address Frame Access Page # Offset Virtual Address Page # Offset Physical Address Frame Offset Frame M Process View Physical Memory A B I C J K D Page Table E L F 4 G 3 H 1 I E J F G K H L A B C D Paging Ques+ons • With paging, what is saved/restored on a process context switch? – Pointer to page table, size of page table – Page table itself is in main memory • What if page size is very small? • What if page size is very large? – Internal fragmentaon: if we don’t need all of the space inside a fixed size chunk Paging and Copy on Write • Can we share memory between processes? – Set entries in both page tables to point to same page frames – Need core map of page frames to track which processes are poin+ng to which page frames (e.g., reference count) • UNIX fork with copy on write – Copy page table of parent into child process – Mark all pages (in new and old page tables) as read-only – Trap into kernel on write (in child or parent) – Copy page – Mark both as writeable – Resume execu+on Fill On Demand • Can I start running a program before its code is in physical memory? – Set all page table entries to invalid – When a page is referenced for first +me, kernel trap – Kernel brings page in from disk – Resume execu+on – Remaining pages can be transferred in the background while program is running Sparse Address Spaces • Might want many separate dynamic segments – Per-processor heaps – Per-thread stacks – Memory-mapped files – Dynamically linked libraries • What if virtual address space is large? – 32-bits, 4KB pages => 500K page table entries – 64-bits => 4 quadrillion page table entries Mul+-level Translaon • Tree of translaon tables – Paged segmentaon – Mul+-level page tables – Mul+-level paged segmentaon • Fixed-size page as lowest level unit of allocaon – Efficient memory allocaon (compared to segments) – Efficient for sparse addresses (compared to paging) – Efficient disk transfers (fixed size units) – Easier to build translaon lookaside buffers – Efficient reverse lookup (from physical -> virtual) – Variable granularity for protec+on/sharing Paged Segmentaon • Process memory is segmented • Segment table entry: – Pointer to page table – Page table length (# of pages in segment) – Access permissions • Page table entry: – Page frame – Access permissions • Share/protec+on at either page or segment-level Paged Segmentaon (Implementaon) Implementation Physical Memory Processor Virtual Address Segment Page Offset Exception Segment Table Page Table Size Access Read R/W R/W Page Table R/W Frame Access Read Physical Read Address Frame Offset Queson • With paged segmentaon, what must be saved/restored across a process context switch? Mul+level Paging Implementation Physical Memory Processor Virtual Address Index 1 Index 2 Index 3 Offset Physical Address Level 1 Frame Offset Level 2 Level 3 Queson • Write pseudo-code for translang a virtual address to a physical address for a system using 3-level paging. x86 Mul+level Paged Segmentaon • Global Descriptor Table (segment table) – Pointer to page table for each segment – Segment length – Segment access permissions – Context switch: change global descriptor table register (GDTR, pointer to global descriptor table) • Mul+level page table – 4KB pages; each level of page table fits in one page – 32-bit: two level page table (per segment) – 64-bit: four level page table (per segment) – Omit sub-tree if no valid addresses Mul+level Translaon • Pros: – Allocate/fill only page table entries that are in use – Simple memory allocaon – Share at segment or page level • Cons: – Space overhead: one pointer per virtual page – Two (or more) lookups per memory reference Portability • Many operang systems keep their own memory translaon data structures – List of memory objects (segments) – Virtual page -> physical page frame – Physical page frame -> set of virtual pages • One approach: Inverted page table – Hash from virtual page -> physical page – Space propor+onal to # of physical pages Efficient Address Translaon • Translaon lookaside buffer (TLB) – Cache of recent virtual
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