HP Nonstop Systems Deployments
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HP Integrity Nonstop Operations Guide for H-Series and J-Series Rvus
HP Integrity NonStop Operations Guide for H-Series and J-Series RVUs HP Part Number: 529869-023 Published: February 2014 Edition: J06.03 and subsequent J-series RVUs and H06.13 and subsequent H-series RVUs © Copyright 2014 Hewlett-Packard Development Company, L.P. Legal Notice Confidential computer software. Valid license from HP required for possession, use or copying. Consistent with FAR 12.211 and 12.212, Commercial Computer Software, Computer Software Documentation, and Technical Data for Commercial Items are licensed to the U.S. Government under vendor’s standard commercial license. The information contained herein is subject to change without notice. The only warranties for HP products and services are set forth in the express warranty statements accompanying such products and services. Nothing herein should be construed as constituting an additional warranty. HP shall not be liable for technical or editorial errors or omissions contained herein. Export of the information contained in this publication may require authorization from the U.S. Department of Commerce. Microsoft, Windows, and Windows NT are U.S. registered trademarks of Microsoft Corporation. Intel, Pentium, and Celeron are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. Java® is a registered trademark of Oracle and/or its affiliates. Motif, OSF/1, Motif, OSF/1, UNIX, X/Open, and the "X" device are registered trademarks, and IT DialTone and The Open Group are trademarks of The Open Group in the U.S. and other countries. Open Software Foundation, OSF, the OSF logo, OSF/1, OSF/Motif, and Motif are trademarks of the Open Software Foundation, Inc. -
Multiple Instruction Issue in the Nonstop Cyclone System
~TANDEM Multiple Instruction Issue in the NonStop Cyclone System Robert W. Horst Richard L. Harris Robert L. Jardine Technical Report 90.6 June 1990 Part Number: 48007 Multiple Instruction Issue in the NonStop Cyclone Processorl Robert W. Horst Richard L. Harris Robert L. Jardine Tandem Computers Incorporated 19333 Vallco Parkway Cupertino, CA 95014 Abstract This paper describes the architecture for issuing multiple instructions per clock in the NonStop Cyclone Processor. Pairs of instructions are fetched and decoded by a dual two-stage prefetch pipeline and passed to a dual six-stage pipeline for execution. Dynamic branch prediction is used to reduce branch penalties. A unique microcode routine for each pair is stored in the large duplexed control store. The microcode controls parallel data paths optimized for executing the most frequent instruction pairs. Other features of the architecture include cache support for unaligned double precision accesses, a virtually-addressed main memory, and a novel precise exception mechanism. lA previous version of this paper was published in the conference proceedings of The 17th Annual International Symposium on Computer Architecture, May 28-31, 1990, Seattle, Washington. Dynabus+ Dynabus X Dvnabus Y IIIIII I 20 MBIS Parallel I I II 100 MbiVS III I Serial Fibers CPU CPU CPU CPU 0 3 14 15 MEMORY ••• MEMORY • •• MEMORY MEMORY ~IIIO PROC110 IIPROC1,0 PROC1,0 ROC PROC110 IIPROC1,0 PROC110 F11IOROC o 1 o 1 o 1 o 1 I DISKCTRL ~ DISKCTRL I I Q~ / \. I DISKCTRL I TAPECTRL : : DISKCTRL : I 0 1 2 3 /\ o 1 2 3 0 1 2 3 0 1 2 3 Section 0 Section 3 Figure 1. -
Fault Tolerance in Tandem Computer Systems
1'TANDEM Fault Tolerance in Tandem Computer Systems Joel Bartlett * Wendy Bartlett Richard Carr Dave Garcia Jim Gray Robert Horst Robert Jardine Dan Lenoski DixMcGuire • Preselll address: Digital Equipmelll CorporQlioll Western Regional Laboralory. Palo Alto. California Technical Report 90.5 May 1990 Part Number: 40666 ~ TANDEM COMPUTERS Fault Tolerance in Tandem Computer Systems Joel Bartlett* Wendy Bartlett Richard Carr Dave Garcia Jim Gray Robert Horst Robert Jardine Dan Lenoski Dix McGuire * Present address: Digital Equipment Corporation Western Regional Laboratory, Palo Alto, California Technical Report 90.5 May 1990 Part Nurnber: 40666 Fault Tolerance in Tandem Computer Systems! Wendy Bartlett, Richard Carr, Dave Garcia, Jim Gray, Robert Horst, Robert Jardine, Dan Lenoski, Dix McGuire Tandem Computers Incorporated Cupertino, California Joel Bartlett Digital Equipment Corporation, Western Regional Laboratory Palo Alto, California Tandem Technical Report 90.5, Tandem Part Number 40666 March 1990 ABSTRACT Tandem produces high-availability, general-purpose computers that provide fault tolerance through fail fast hardware modules and fault-tolerant software2. This chapter presents a historical perspective of the Tandem systems' evolution and provides a synopsis of the company's current approach to implementing these systems. The article does not cover products announced since January 1990. At the hardware level, a Tandem system is a loosely-coupled multiprocessor with fail-fast modules connected with dual paths. A system can include a range of processors, interconnected through a hierarchical fault-tolerant local network. A system can also include a variety of peripherals, attached with dual-ported controllers. A novel disk subsystem allows a choice between low cost-per-byte and low cost-per-access. -
Computer Architectures an Overview
Computer Architectures An Overview PDF generated using the open source mwlib toolkit. See http://code.pediapress.com/ for more information. PDF generated at: Sat, 25 Feb 2012 22:35:32 UTC Contents Articles Microarchitecture 1 x86 7 PowerPC 23 IBM POWER 33 MIPS architecture 39 SPARC 57 ARM architecture 65 DEC Alpha 80 AlphaStation 92 AlphaServer 95 Very long instruction word 103 Instruction-level parallelism 107 Explicitly parallel instruction computing 108 References Article Sources and Contributors 111 Image Sources, Licenses and Contributors 113 Article Licenses License 114 Microarchitecture 1 Microarchitecture In computer engineering, microarchitecture (sometimes abbreviated to µarch or uarch), also called computer organization, is the way a given instruction set architecture (ISA) is implemented on a processor. A given ISA may be implemented with different microarchitectures.[1] Implementations might vary due to different goals of a given design or due to shifts in technology.[2] Computer architecture is the combination of microarchitecture and instruction set design. Relation to instruction set architecture The ISA is roughly the same as the programming model of a processor as seen by an assembly language programmer or compiler writer. The ISA includes the execution model, processor registers, address and data formats among other things. The Intel Core microarchitecture microarchitecture includes the constituent parts of the processor and how these interconnect and interoperate to implement the ISA. The microarchitecture of a machine is usually represented as (more or less detailed) diagrams that describe the interconnections of the various microarchitectural elements of the machine, which may be everything from single gates and registers, to complete arithmetic logic units (ALU)s and even larger elements. -
Atalla HSM & HPE Nonstop
Data Security Overview GTUG – May 2018 Darren Burkey, Senior PreSales Consultant Atalla [email protected] The New Combined Company: built on stability, acquisition and innovation Network Management/ COBOL Data Protector 40 30 2 Years Years “Better Together” Portfolio Has Breadth and Depth Information Linux & DevOps IT Operations Cloud Security Governance Open Source Service Management, Cloud Service Digital Safe, Data Protector, Operations Bridge, Automation, Control Point, Data Center Hybrid Cloud Structured Data Manager, Automation, Management Storage Optimizer Network Management Mainframe Solutions, IT Operations Enterprise Linux, Management, OpenStack Private Cloud, Cobol Development, Host Connectivity, Identity-based Software-defined Software Delivery Collaboration Workload Migration Access Governance Storage and Testing and Security Big Data Analytics IDOL Data security portfolio: Voltage & Atalla Data privacy & security compliance Secure analytics, privacy and Hybrid cloud data protection & & risk reduction pseudonymization collaboration Voltage SecureData Enterprise, Big Data, Cloud, Mobile and Payments Data Security Tokenization, Encryption, Masking Voltage SecureMail Voltage SecureMail Cloud Easy, scalable email encryption Enterprise email encryption SaaS Atalla HSM Enterprise Secure Key Manager Payments crypto appliances & key storage KMIP Key Management for Storage, 3rd party apps 4 ® Atalla Product Overview History of Atalla • Established in 1972 • Mission: Protect financial transactions • Atalla introduced first -
A Nonstop* Kernel Joel F. Bartlett Tandem Computers Inc. Cupertino
A NonStop* Kernel Joel F. Bartlett Tandem Computers Inc. Cupertino, Ca. Abstract significantly expanded over its lifetime. The Tandem system is intended to fit these The Tandem NonStop System is a fault- requirements. tolerant [1], expandable, and distributed computer system designed expressly for i. Hardware Organization online transaction processing. This paper describes the key primitives of the kernel A network consists of up to 255 nodes. of the operating system. The first section Each node is composed of multiple processor describes the basic hardware building and I/O controller modules interconnected blocks and introduces their software by redundant buses [2,3] as shown in PMS analogs: processes and messages. Using [3] notation in Figure i. A node consists these primitives, a mechanism that allows of two to sixteen processors, where each fault-tolerant resource access, the processor (Pcentral) has its own power process-pair, is described. The paper supply, memory, backup battery, and I/O concludes with some observations on this channel (Sio). All processors are type of system structure and on actual use interconnected by redundant interprocessor of the system. buses (Sipb). Each I/O controller (Kdisc, Ksync, etc.) is connected to two I/O channels and is powered from two different Introduction power supplies using a diode ORing scheme. Fault-tolerant computing systems have been Finally, dual-ported I/O devices such as built over the last two decades in a number discs (Tdisc) may be connected to a second of places to satisfy a variety of goals. I/O controller. The contents of a disc may These results and differing approachs have be "mirrored" on a second volume, but this been summarized in [1,3,11]. -
Why Do Computers Stop and What Can Be Done About It?
"1,TANDEMCOMPUTERS Why Do Computers Stop and What Can Be Done About It? Jim Gray Technical Report 85.7 June 1985 PN87614 Why Do Computers Stop and What Can Be Done About It? Jim Gray June 1985 Tandem Technical report 85.7 Tandem TR 85.7 Why Do Computers Stop and What Can Be Done About It? Jim Gray June, 1985 Revised November, 1985 ABSTRACT An analysis of the failure statistics of a commercially available fault-tolerant system shows that administration and software are the major contributors to failure. Various approachs to software fault- tolerance are then discussed notably process-pairs, transactions and reliable storage. It is pointed out that faults in production software are often soft (transient) and that a transaction mechanism combined with persistent process-pairs provides fault-tolerant execution -- the key to software fault-tolerance. DISCLAIMER This paper is not an "official" Tandem statement on fault-tolerance. Rather, it expresses the author's research on the topic. An early version of this paper appeared in the proceedings of the German Association for Computing Machinery Conference on Office Automation, Erlangen, Oct. 2-4, 1985. TABLE OF CONTENTS Introduct ion 1 Hardware Availability by Modular Redundancy....•.•.....•..•..•• 3 Analysis of Failures of a Fault-tolerant System•.••......•••.•. 7 Implications of the Analysis of MTBF ...•••.•.•••••...•........ 12 Fault-tolerant Execution 15 Software Modularity Through Processes and Messages 16 Fault Containment Through Fail-Stop Software Modules 16 Software Faults Are Soft, the Bohrbug-Heisenbug Hypothesis.17 Process-pairs For Fault-tolerant Execution 20 Transactions for Data Integrity..•......................... 24 Transactions for Simple Fault-tolerant Execution 25 Fault-tolerant Communication .......•..•.....•.•.•.•.•.•...... -
Thesis May Never Have Been Completed
UvA-DARE (Digital Academic Repository) Digital Equipment Corporation (DEC): A case study of indecision, innovation and company failure Goodwin, D.T. Publication date 2016 Document Version Final published version Link to publication Citation for published version (APA): Goodwin, D. T. (2016). Digital Equipment Corporation (DEC): A case study of indecision, innovation and company failure. General rights It is not permitted to download or to forward/distribute the text or part of it without the consent of the author(s) and/or copyright holder(s), other than for strictly personal, individual use, unless the work is under an open content license (like Creative Commons). Disclaimer/Complaints regulations If you believe that digital publication of certain material infringes any of your rights or (privacy) interests, please let the Library know, stating your reasons. In case of a legitimate complaint, the Library will make the material inaccessible and/or remove it from the website. Please Ask the Library: https://uba.uva.nl/en/contact, or a letter to: Library of the University of Amsterdam, Secretariat, Singel 425, 1012 WP Amsterdam, The Netherlands. You will be contacted as soon as possible. UvA-DARE is a service provided by the library of the University of Amsterdam (https://dare.uva.nl) Download date:26 Sep 2021 Digital Equipment Corporation (DEC) (DEC) Corporation Digital Equipment David Thomas David Goodwin Digital Equipment Corporation (DEC): A Case Study of Indecision, Innovation and Company Failure David Thomas Goodwin Digital Equipment Corporation (DEC): A Case Study of Indecision, Innovation and Company Failure David Thomas Goodwin 1 Digital Equipment Corporation (DEC): A Case Study of Indecision, Innovation and Company Failure ACADEMISCH PROEFSCHRIFT ter verkrijging van de graad van doctor aan de Universiteit van Amsterdam op gezag van de Rector Magnificus prof. -
Connect Deutschland DEU
Connect – Your Independent HP Business Technology Community Heinz-Hermann Adam Vorstand, Connect Deutschland und Connect Director Agenda • Vorstellung • Was ist Connect? • Vorteile für Connect Mitglieder • Aktuelle Veranstaltungen • Connect Mitgliedschaft – Werden Sie Mitglied! • Ihre Wünsche und Fragen 1 Wer wir sind • Connect ist die weltweite, unabhängige Organisation von HP Benutzern. Sie ist entstanden durch die Zusammenführung der früheren HP Benutzergruppen ITUG, Encompass und HP-Interex EMEA. • Connect Deutschland ist eine unabhängige Vereinigung von Benutzern von HP Unternehmenstechnologie. Als „Connect Chapter“ sind wir Teil des weltweiten Netzwerkes von IT Experten. Warum Connect? • Wir unterstützen Sie durch Online-Informationen, persönliche Weiterbildung bei Konferenzen, Webcasts und mehr. • Wir verbinden Menschen mit Interesse an HP Unternehmenstechnologie, Produkten und Dienstleistungen – virtuell im Netz oder live Vor-Ort. • Wir beeinflussen zukünftige Produkte und Dienstleistungen durch unsere gemeinsame Stimme bei HP. • Alle unserer Programme unterstützen diese Ziele. 2 Connect Deutschland Vorstand Heinz-Hermann Hadwin Adam Struck Vorsitzender Stellv. Vorsitzender Dr. Clemens Detlef Wermelskirchen Buerdorff Vorstand Vorstand myCommunity Symposien Gerald Conny Maitschke Schneider Vorstand HP Geschäfts- SIGs & LUGs führung, TSG Eingebunden in eine weltweite Community • Chapters – www.connect-community.de – Local User Groups • Special Interest Groups – Lokal/national – International • Spezialisiertes Social Network – Diskussionsgruppen -
Tandem Computers Unplugged: a People's History
Tandem Computers Unplugged: A People’s History company’s leadership in general and the charisma oF Jimmy Treybig, the company’s key Founder, in specific? Again a resounding yes, but not entirely as Jimmy hasn’t been the only charismatic leader in Silicon Valley - a number come to mind. Was it because oF the company’s offbeat corporate culture such as no private parking places, an on campus swimming pool and oF course the inFamous beer busts. Well yes, but!!! How can it be that over 16 years since From an insiders point of view it was its merger with Compaq and nearly a all oF these things wrapped in a decade since it’s reabsorption back cocoon of an integrated corporate into Hewlett Packard a vibrant and value system that permeated all active online Tandem Computers corners oF the company, world wide alumni community still exists on and deeply touched the souls and Yahoo!Groups and Linked In? How can minds oF all employees through the it be that in many countries in the good and bad times. world groups oF Tandem Alumni still get together in local pubs or other Tandem Computers Unplugged – A types oF venues at least yearly? How People’s History is an attempt to can it be that many Former employees capture not just the history of an maintain their collection oF T-shirts, important foundational contributor to double-handled cups, pens, and what is today’s Silicon Valley, but to trophies almost like shrines oF some share the experience through the eyes kind? How can it be that so many and hearts oF the employees and employees when asked to look back through this process bring to light on their working liFe almost to a some oF the important ‘lessons person claim that working at Tandem learned’ about how to manage and was one oF the best places they have motivate talent. -
Dennis Adams Associates Tandem Concepts
Dennis Adams a s s o c i a t e s Tandem Concepts: An Introduction for UNIX techies Introduction This document was prepared from some investigation work on the Tandem Non-Stop system. Background to Tandem Tandem was founded as a company to develop fault-tolerant systems in 1976 by ex-Hewlett Packard engineers, and the first Tandem NonStop system was based on HP3000 CPUs with a custom bus called Dynabus to provide fault-tolerance of the I/O and CPU. The Operating System was called Guardian, which implemented message passing on a common stack to ensure resilience. The key architecture of Tandem is the (RPC-like) message-passing mechanism. The kernel automatically re-routes a message from a failing component to a functioning one. This same approach is used both within a system and between systems. In 1983, the FOX fibre-optic interconnect was launched which enabled up to 14 individual nodes to participate in a closely coupled network and share workloads between them. In 1986, FOX II enabled the network to be up to 4 Km distance, as well as introducing NonStop VLX, which increased the Dynabus speed from 13 to 40 MB/s. The same year, NonStop SQL was introduced. 1991 saw the first of several changes of architecture, with the introduction of the MIPS CPU, later replaced by the MIPS R4400 in the NonStop Himalaya K-Series in 1993. Tandem computers introduced the S-Series in 1997. This replaced Dynabus and FOX with a new ServerNet interconnect. ServerNet is a true peer-to-peer network (instead of the ring protocol of the earlier networks) and is the basis of the InfiniBand interconnect architect. -
Strategic Interactions in Dram and Risc Technology: a Network Approach
Strategic interactions in dram and risc technology: A network approach Geert Duysters & Wim Vanhaverbeke 93.023 September 1993 MERIT, P.O. Box 616, 6200 MD Maastricht (Netherlands) - telephone (31)43-883875- fax: (31)43-216518 1 STRATEGIC INTERACTIONS IN DRA AND RISC TECHNOLOGY: A NETWORK APPROACH Geert Duysters and WiI Vanhaverbeke1 INTRODUCTION Cooperative agreements have been ignored in business literature for a veiy long time. Only recently, the use of cooperative agreements as part of corporate strategies gained substantial interest. This increase in attention is above all due to the fact that in the last decade the number of cooperative agreements by firms has rocketed. In fact cooperative agreements have outnumbered the fully owned foreign subsidiaries (Contractor and Lorange, 1988). In this paper we will use the term cooperation to denote cooperative agreements between partners which are not connected through (majority) ownership. A cooperative agreement can be seen as an agreement which is positioned between two extremes, arm's length transactions on the one hand and the merger of the two firs on the other hand. Cooperation among companies is usually analyzed in strategic management literature on the dyadic level or on the level of the partcipating firs. Only recently, interest by economists has grown to study cooperative efforts of firs within an inter-organisational network framework (see e.g. Hagedoom and Schakenraad. 1990, 1992, 1993). In high- tech industries where almost all incumbents are linked to each other by means of a network of cooperative agreements, an analysis on the level of the individual players or allances is not appropriate to understand the strategic value of cooperative strategies.