Universitat¨ Augsburg ÃABCÊÇÅÍÆGËÀ¼ Safe Reasoning with Logic LTS Gerald L¨uttgen, Walter Vogler Report2008-18 November2008 Institut fur¨ Informatik Copyright c Gerald L¨uttgen, Walter Vogler Institut f¨ur Informatik Universit¨at Augsburg D–86135 Augsburg, Germany http://www.Informatik.Uni-Augsburg.DE — all rights reserved — Safe Reasoning with Logic LTS Gerald L¨uttgen1 and Walter Vogler2 1 Department of Computer Science, University of York, York YO10 5DD, U.K.
[email protected] 2 Institut f¨ur Informatik, Universit¨at Augsburg, D–86135 Augsburg, Germany
[email protected] Abstract. Previous work has introduced the setting of Logic LTS, to- gether with a variant of ready simulation as fully-abstract refinement preorder, which allows one to compose operational specifications using a CSP-style parallel operator as well as the propositional connectives con- junction and disjunction. In this paper, we show how a temporal logic for specifying safety properties may be embedded into Logic LTS so that (a) the temporal operators are compositional for ready simulation and (b) ready simulation, when restricted to pairs of processes and formulas, coincides with the logic’s satisfaction relation. The utility of this set- ting as a semantic foundation for mixed operational and temporal-logic specification languages is demonstrated via a simple example. 1 Introduction Recently, the setting of Logic LTS has been introduced which combines opera- tional and logic styles of specification [13, 14] in one unified framework. It in- cludes operational operators, such as parallel composition, and the propositional- logic operators conjunction and disjunction. Logic LTS extends labelled transi- tion systems by an inconsistency predicate on states, where an inconsistent state, or process, denotes empty behaviour that cannot be implemented (cf.