DEGREE PROJECT, IN , SECOND LEVEL STOCKHOLM, SWEDEN 2009 Power Savings in MPSoC IOANNIS SAVVIDIS KTH ROYAL INSTITUTE OF TECHNOLOGY ICT SCHOOL OF INFORMATION AND COMMUNICATION TECHNOLOGY TRITA TRITA-ICT-EX-2009:158 www.kth.se Power Savings in MPSoC Ioannis T. Savvidis Master of Science Thesis Stockholm, Sweden 2009 TRITA -ICT -EX -2009:158 PPOOWWEERR SSAAVVIINNGGSS IINN MMPPSSOOCC by Ioannis T. Savvidis
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[email protected] A THESIS SUBMITTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE Master of Science Supervisors: Industry: Tume Wihamre KTH: Johnny Öberg Examiner: Prof. Ahmed Hemani Ericsson AB Royal Institute of Technology (KTH) Stockholm, September 2009 This page has been intentionally left blank. ii “For the things we have to learn before we can do, we learn by doing” Aristotle, 384BC (Stageira) - 322BC (Chalcis) Ioannis Savvidis: Power Savings in MPSoC MSc dissertation project, ©September 2009 This thesis report is submitted in partial fulfillment of the requirements for the degree of Master of Science at the Royal Institute of Technology (KTH), Stockholm, Sweden. Content is based on the work carried out in the Department of Digital ASIC, Signal Processing HW at Ericsson AB, Kista, Stockholm, Sweden. Copyright and similar legal issues are regulated by employment contracts established between ERICSSON AB and the author. iii This page has been intentionally left blank. iv Abstract High performance integrated circuits suffer from a permanent increase of the dissipated power per square millimeter of silicon, over the past years. This phenomenon is driven by the miniaturization of CMOS processes, increasing packing density of transistors and increasing clock frequencies of microchips, thus pushing heat removal and power distribution to the forefront of the problems confronting the advance of microelectronics.