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Investigation of Gate Dielectric Materials and Dielectric/Silicon Interfaces for Metal Oxide Semiconductor Devices

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Investigation of Gate Dielectric Materials and Dielectric/Silicon Interfaces for Metal Oxide Semiconductor Devices University of Kentucky UKnowledge Theses and Dissertations--Electrical and Computer Engineering Electrical and Computer Engineering 2015 Investigation of Gate Dielectric Materials and Dielectric/Silicon Interfaces for Metal Oxide Semiconductor Devices Lei Han University of Kentucky, [email protected] Right click to open a feedback form in a new tab to let us know how this document benefits ou.y Recommended Citation Han, Lei, "Investigation of Gate Dielectric Materials and Dielectric/Silicon Interfaces for Metal Oxide Semiconductor Devices" (2015). Theses and Dissertations--Electrical and Computer Engineering. 69. https://uknowledge.uky.edu/ece_etds/69 This Doctoral Dissertation is brought to you for free and open access by the Electrical and Computer Engineering at UKnowledge. It has been accepted for inclusion in Theses and Dissertations--Electrical and Computer Engineering by an authorized administrator of UKnowledge. For more information, please contact [email protected]. STUDENT AGREEMENT: I represent that my thesis or dissertation and abstract are my original work. Proper attribution has been given to all outside sources. I understand that I am solely responsible for obtaining any needed copyright permissions. I have obtained needed written permission statement(s) from the owner(s) of each third-party copyrighted matter to be included in my work, allowing electronic distribution (if such use is not permitted by the fair use doctrine) which will be submitted to UKnowledge as Additional File. I hereby grant to The University of Kentucky and its agents the irrevocable, non-exclusive, and royalty-free license to archive and make accessible my work in whole or in part in all forms of media, now or hereafter known. I agree that the document mentioned above may be made available immediately for worldwide access unless an embargo applies. I retain all other ownership rights to the copyright of my work. I also retain the right to use in future works (such as articles or books) all or part of my work. I understand that I am free to register the copyright to my work. REVIEW, APPROVAL AND ACCEPTANCE The document mentioned above has been reviewed and accepted by the student’s advisor, on behalf of the advisory committee, and by the Director of Graduate Studies (DGS), on behalf of the program; we verify that this is the final, approved version of the student’s thesis including all changes required by the advisory committee. The undersigned agree to abide by the statements above. Lei Han, Student Dr. Zhi David Chen, Major Professor Dr. Cai-Cheng Lu, Director of Graduate Studies INVESTIGATION OF GATE DIELECTRIC MATERIALS AND DIELECTRIC/SILICON INTERFACES FOR METAL OXIDE SEMICONDUCTOR DEVICES DISSERTATION A dissertation submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy in the College of Engineering at the University of Kentucky By Lei Han Lexington, Kentucky Director: Dr. Zhi David Chen, Professor of Electrical Engineering Department Lexington, Kentucky 2015 Copyright © Lei Han 2015 ABSTRACT OF DISSERTATION INVESTIGATION OF GATE DIELECTRIC MATERIALS AND DIELECTRIC/SILICON INTERFACES FOR METAL OXIDE SEMICONDUCTOR DEVICES The progress of the silicon-based complementary-metal-oxide-semiconductor (CMOS) technology is mainly contributed to the scaling of the individual component. After decades of development, the scaling trend is approaching to its limitation, and there is urgent needs for the innovations of the materials and structures of the MOS devices, in order to postpone the end of the scaling. Atomic layer deposition (ALD) provides precise control of the deposited thin film at the atomic scale, and has wide application not only in the MOS technology, but also in other nanostructures. In this dissertation, I study rapid thermal processing (RTP) treatment of thermally grown SiO2, ALD growth of SiO2, and ALD growth of high-k HfO2 dielectric materials for gate oxides of MOS devices. Using a lateral heating treatment of SiO2, the gate leakage current of SiO2 based MOS capacitors was reduced by 4 order of magnitude, and the underlying mechanism was studied. Ultrathin SiO2 films were grown by ALD, and the electrical properties of the films and the SiO2/Si interface were extensively studied. High quality HfO2 films were grown using ALD on a chemical oxide. The dependence of interfacial quality on the thickness of the chemical oxide was studied. Finally I studied growth of HfO2 on two innovative interfacial layers, an interfacial layer grown by in-situ ALD ozone/water cycle exposure and an interfacial layer of etched thermal and RTP SiO2. The effectiveness of growth of high-quality HfO2 using the two interfacial layers are comparable to that of the chemical oxide. The interfacial properties are studied in details using XPS and ellipsometry. KEYWORDS: Gate Leakage Current, Atomic Layer Deposition, Silicon Oxide, High-k Dielectric Material, Interfacial Layer Lei Han April 10, 2015 INVESTIGATION OF GATE DIELECTRIC MATERIALS AND DIELECTRIC/SILICON INTERFACES FOR METAL OXIDE SEMICONDUCTOR DEVICES By Lei Han Zhi David Chen Director of Dissertation Cai-cheng Lu Director of Graduate Studies April 10, 2015 This dissertation is dedicated to my beloved family: My father Shoucai Han My mother Qiaoling Hao My husband Qingquan Zhao Acknowledgements First and foremost, I would like to thank my advisor, Dr. Zhi Chen. This dissertation would not have been possible without his dedication of ideas, time, instructions, and funding. His enthusiasm for semiconductor device research as well as his precise insights in work have been incentive for me all through my Ph.D. studies. What I learned from him both in research and in real life would be a precious treasure which I would always benefit from in my future life. Gratitude will go to my committee members, Dr. J. Todd Hastings, Dr. Vijay P. Singh and Dr. Fuqian Yang, for their time and suggestions. The valuable discussion and comments I received from them in my annual reviews and qualify exam greatly improved my Ph.D. research. I would also like to thank Dr. Chi-Sing Man for serving as the outside examiner for my Final Doctoral Examination. I gratefully acknowledge all the members whom I worked with in Dr. Chen’s group, Dr, Shibin Li, Dr. Chi Lu, Dr. Ibrahim Yucedag, Ms. Yichun Wang, Mr. Bojie Chen, and Mr. Xiaowei Zhang. The work and spare time we shared together have always been a source of diverse opinions as well as friendship. I am especially grateful for Yichun Wang. Her guidance for me after I joined this group has been greatly enlightening and helpful. Special thanks also go to Dr. Charles May, Brian Wajdyk, and Jacob Hempel for always being ready to help at the Center for Nanoscale Science and Technology at the University of Kentucky. iii Last but not least, I would like to dedicate my gratitude to my family. To my parents, who raised me up with pure love, and have always been supportive to me without any hesitation. I also thank my husband, Qingquan, who went through even the tough time in my Ph.D. pursuit together with me, having patience and giving me encouragement. With encouragement of my family, all my efforts are worthwhile. iv Table of Contents Acknowledgements ............................................................................................................ iii List of Tables ................................................................................................................... viii List of Figures .................................................................................................................... ix Chapter 1 Introduction ........................................................................................................ 1 1.1 Scaling of the integrated circuit ................................................................................ 1 1.2 High dielectric constant (high-k) materials ............................................................... 6 1.3 Recent innovations for further scaling .................................................................... 11 1.4 Atomic Layer Deposition (ALD) ............................................................................ 13 1.5 Outline of the dissertation ....................................................................................... 15 Chapter 2 Fabrication of MOS Capacitors and Improvements ......................................... 29 2.1 Introduction ............................................................................................................. 29 2.2 RCA cleaning .......................................................................................................... 30 2.3 Growth of gate dielectric ......................................................................................... 32 2.3.1 Thermal growth of SiO2 ................................................................................... 32 2.3.2 Atomic layer deposition of SiO2 and HfO2 ...................................................... 33 2.4 Metallization............................................................................................................ 33 2.4.1 Electron-beam evaporation ............................................................................... 34 2.4.2 Sputtering.......................................................................................................... 35 2.5 Patterning of metal gate .......................................................................................... 35 2.5.1 Previously established lift-off
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