United States Patent (11) 3,562,549 [72] Inventor Juergen Teichmann Dresden, Germany [56] References Cited 2 L ) Appl
United States Patent (11) 3,562,549 [72] Inventor Juergen Teichmann Dresden, Germany [56] References Cited 2 l ) Appl. No. 730,869 UNITED STATES PATENTS [22] Filed May 21, 1968 3,445,680 5/1969 Foster et al. .................. 307/215 [45] Patented Feb. 9, 1971 3,458,719 7/1969 Weiss ........................... 307/2 15X [73] Assignee Arbeitsstelle Fur Molekularelektronik Primary Examiner-John S. Heyman Dresden, Germany Assistant Examiner-John Zazworsky Attorney-Nolte and Nolte [54] SEMICONDUCTOR LOGIC CIRCUIT 7 Claims, 4 Drawing Figs. ABSTRACT: A plurality of diode inputs is connected through [52] U.S. Cl.......................... • • • • • • • • • • • • • • • • • • • • - a * * a * * · * 307/215, a Zener diode clipper and amplifier circuit with a subsequent 307/237; 328/93 output stage so that the Zener voltage determines the initial [51 ] Int. Cl............................ • • • • • • • • • • • • • • • • • • • • • ******** H03k 19/36, shifting voltage level. To change this initial level, a conven H03k 5/08 tional negator controls a transistor connected in parallel with [50] Field of Search............................ 307/25, said clipper and amplifier circuits, and turns off the latter in 237, 253, 289, 300; 328/93 dependence on the output condition. PATENTED FEB 9 1971 3,562,549 M . E out (V) S o INVENTOR JURGEN TECHMANN 3,562,549 1 2 SEMICONDUCTOR LOGIC CIRCUIT FIG. 2 is a hysteresis curve of the circuit of FG. 1. DESCRIPTION OF THE PREFERRED EMBODIMENTS BACKGROUND OF THE INVENTION In FIG. 1, there is shown a logic NAND circuit comprisinga l Field of the Invention 5 plurality of input diodes 4, 5 and 6, the cathodes of which are This invention relates to a semiconductor or solid state in tegrated circuit for performing various logical functions, connected to input terminals 1, 2 and 3 whereas the anodes preferably an “and-not,” (i.e.,NAND) function.
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