Synaptic Iontronic Devices for Brain-Mimicking Functions: Fundamentals and Applications ∥ ∥ Changwei Li, Tianyi Xiong, Ping Yu,* Junjie Fei,* and Lanqun Mao
Total Page:16
File Type:pdf, Size:1020Kb
Load more
Recommended publications
-
Memristor-The Future of Artificial Intelligence L.Kavinmathi, C.Gayathri, K.Kumutha Priya
International Journal of Scientific & Engineering Research, Volume 5, Issue 4, April-2014 358 ISSN 2229-5518 Memristor-The Future of Artificial Intelligence L.kavinmathi, C.Gayathri, K.Kumutha priya Abstract- Due to increasing demand on miniaturization and low power consumption, Memristor came into existence. Our design exploration is Reconfigurable Threshold Logic Gates based Programmable Analog Circuits using Memristor. Thus a variety of linearly separable and non- linearly separable logic functions such as AND, OR, NAND, NOR, XOR, XNOR have been realized using Threshold logic gate using Memristor. The functionality can be changed between these operations just by varying the resistance of the Memristor. Based on this Reconfigurable TLG, various Programmable Analog circuits can be built using Memristor. As an example of our approach, we have built Programmable analog Gain amplifier demonstrating Memristor-based programming of Threshold, Gain and Frequency. As our idea consisting of Programmable circuit design, in which low voltages are applied to Memristor during their operation as analog circuit element and high voltages are used to program the Memristor’s states. In these circuits the role of memristor is played by Memristor Emulator developed by us using FPGA. Reconfigurable is the option we are providing with the present system, so that the resistance ranges are varied by preprogram too. Index Terms— Memristor, TLG-threshold logic gates, Programmable Analog Circuits, FPGA-field programmable gate array, MTL- memristor threshold logic, CTL-capacitor Threshold logic, LUT- look up table. —————————— ( —————————— 1 INTRODUCTION CCORDING to Chua’s [founder of Memristor] definition, 9444163588. E-mail: [email protected] the internal state of an ideal Memristor depends on the • L.kavinmathi is currently pursuing bachelors degree program in electronics A and communication engineering in tagore engineering college under Anna integral of the voltage or current over time. -
Molecular and Polymer Nanodevices (Paper)
Molecular and Polymer Nanodevices Nikolai Zhitenev National Institute of Standards and Technology Over past years, the research and engineering community has been intensively looking for possibilities to extend of the information processing technologies into post- CMOS era. Recently, Nanotechnology Research Initiative formed by leading semiconductor companies has formulated a set of research vectors (Welser et al., 2008) to guide and to coordinate these efforts. Based on the analysis of the ultimate limitations of the present technology and on the observations of the research and development trends, one of the recommendations is the search of devices operating with the state variables different from an electronic charge. A solid-state switch where the computational state is defined by the spatial locations of heavy particles such as ions, atoms or molecular conformations is one of such possibilities. Possible advantage of heavier information carriers can be easily illustrated (Cavin et al., 2006). Scaling of CMOS devices operating with electronic charge will eventually reach the limit when logic or memory state decays because of electron tunneling under the barriers. For a given barrier height and width that is limited by the material constraints and the device size and by the requirement of the minimal power dissipation, carriers such as ions or atom that are thousands time heavier than electron offer much greater stability to the computational state. Ironically, the use of heavy carriers is absolutely impractical in larger devices because of much lower mobility. However, in a device of a few nanometer size, the ion/atom transport can be fast enough for practical applications. Short molecules and macromolecules can be used as active material for such switching devices. -
A Bipolar Electrochemical Approach to Constructive Lithography: Metal
ARTICLE pubs.acs.org/Langmuir A Bipolar Electrochemical Approach to Constructive Lithography: Metal/Monolayer Patterns via Consecutive Site-Defined Oxidation and Reduction † † ‡ † † Assaf Zeira, Jonathan Berson, Isai Feldman, Rivka Maoz,*, and Jacob Sagiv*, † ‡ Departments of Materials and Interfaces and Chemical Research Support, The Weizmann Institute of Science, Rehovot 76100, Israel bS Supporting Information ABSTRACT: Experimental evidence is presented, demonstrat- ing the feasibility of a surface-patterning strategy that allows stepwise electrochemical generation and subsequent in situ metallization of patterns of carboxylic acid functions on the outer surfaces of highly ordered OTS monolayers assembled on silicon or on a flexible polymeric substrate. The patterning process can be implemented serially with scanning probes, which is shown to allow nanoscale patterning, or in a parallel stamping configuration here demonstrated on micrometric length scales with granular metal film stamps sandwiched between two monolayer-coated substrates. The metal film, consisting of silver deposited by evaporation through a patterned contact mask on the surface of one of the organic monolayers, functions as both a cathode in the printing of the monolayer patterns and an anodic source of metal in their subsequent metallization. An ultrathin water layer adsorbed on the metal grains by capillary condensation from a humid atmosphere plays the double role of electrolyte and a source of oxidizing species in the pattern printing process. It is shown that control over both the direction of pattern printing and metal transfer to one of the two monolayer surfaces can be accomplished by simple switching of the polarity of the applied voltage bias. Thus, the patterned metal film functions as a consumable “floating” stamp capable of two-way (forwardÀbackward) electrochemical transfer of both information and matter between the contacting monolayer surfaces involved in the process. -
Hybrid Memristor–CMOS Implementation of Combinational Logic Based on X-MRL †
electronics Article Hybrid Memristor–CMOS Implementation of Combinational Logic Based on X-MRL † Khaled Alhaj Ali 1,* , Mostafa Rizk 1,2,3 , Amer Baghdadi 1 , Jean-Philippe Diguet 4 and Jalal Jomaah 3 1 IMT Atlantique, Lab-STICC CNRS, UMR, 29238 Brest, France; [email protected] (M.R.); [email protected] (A.B.) 2 Lebanese International University, School of Engineering, Block F 146404 Mazraa, Beirut 146404, Lebanon 3 Faculty of Sciences, Lebanese University, Beirut 6573, Lebanon; [email protected] 4 IRL CROSSING CNRS, Adelaide 5005, Australia; [email protected] * Correspondence: [email protected] † This paper is an extended version of our paper published in IEEE International Conference on Electronics, Circuits and Systems (ICECS) , 27–29 November 2019, as Ali, K.A.; Rizk, M.; Baghdadi, A.; Diguet, J.P.; Jomaah, J. “MRL Crossbar-Based Full Adder Design”. Abstract: A great deal of effort has recently been devoted to extending the usage of memristor technology from memory to computing. Memristor-based logic design is an emerging concept that targets efficient computing systems. Several logic families have evolved, each with different attributes. Memristor Ratioed Logic (MRL) has been recently introduced as a hybrid memristor–CMOS logic family. MRL requires an efficient design strategy that takes into consideration the implementation phase. This paper presents a novel MRL-based crossbar design: X-MRL. The proposed structure combines the density and scalability attributes of memristive crossbar arrays and the opportunity of their implementation at the top of CMOS layer. The evaluation of the proposed approach is performed through the design of an X-MRL-based full adder. -
The Memristor: Anew Bond Graph Element D
Paper No. n-Aut·N J The Society shall not be responsible for statements or opinions :<;111 pnp~,r~ or, in'Ldisao~slofl at me~,~in~s~f t~~ <~~,~iety, o,~, ot ,.its (I',~l)o'isjons:"or S,ecti ons;) lor- prlrU9d;:)ln tts j:~obllcaJLors. G. F.OSTER The Memristor: ANew Bond Graph Element D. M. AUSLANDER Mechanical Engineering Department. The "mcmris[.or," first deft ned by L. Clma for electrical drwits, 1·$ proposed as a new University of California, Berkeley, bond gra,ph clemel/t, on (1.11- equul footiug with R, L, & C, and having some unique Calif. modelling capubilities for nontinear systems. The Missing Constitutive Relation circuit thcory; howevcr, if wc look beyond the electrical doma.in it is not hard 1.0 find systems whose characteristics are con Ix HIS original lecture notes int.roducing the bond veniently represented by a memristor modcl. graph technique, Paynter drew a 1I1ctrahedron of state," (Fig. I) which sumnHlrir.cd j.he relationship between the sl.ate vl~riables Properties (c, I, p, q) [I, 2].1 There are G binary relationships possible be tween these 4 state variableii, Two of these are definitions: the The constitutive relation for a I-port memristor is a curve in the q-p ph~ne, Fig. 2. [n this context, we do not necessarily in_ displacement., q(t) = q(O) + f(t)clJ, and the qU:l.utit,y pet) = J:' terpret the quant.it,y p(l) = p(O) + ]:' e(t)dt as momentum, magneti(~ p(O) + }:' c(l)dt, which is interpreted ns momentum, flux, or pressure-momentum (2), buti merely as t.he integrated etTol't ("impulse!». -
Nanoionics-Based Resistive Switching Memories
REVIEW ARTICLES | INSIGHT Nanoionics-based resistive switching memories Many metal–insulator–metal systems show electrically induced resistive switching effects and have therefore been proposed as the basis for future non-volatile memories. They combine the advantages of Flash and DRAM (dynamic random access memories) while avoiding their drawbacks, and they might be highly scalable. Here we propose a coarse-grained classification into primarily thermal, electrical or ion-migration-induced switching mechanisms. The ion-migration effects are coupled to redox processes which cause the change in resistance. They are subdivided into cation-migration cells, based on the electrochemical growth and dissolution of metallic filaments, and anion-migration cells, typically realized with transition metal oxides as the insulator, in which electronically conducting paths of sub-oxides are formed and removed by local redox processes. From this insight, we take a brief look into molecular switching systems. Finally, we discuss chip architecture and scaling issues. 1,2 3,4 RAINER WASER * AND MASAKAZU AONO ‘M’ stands for a similarly large variety of metal electrodes including 1Institut für Werkstoffe der Elektrotechnik 2, RWTH Aachen University, 52056 electron-conducting non-metals. A first period of high research Aachen, Germany activity up to the mid-1980s has been comprehensively reviewed 2Institut für Festkörperforschung/CNI—Center of Nanoelectronics for elsewhere2–4. The current period started in the late 1990s, triggered Information Technology, Forschungszentrum Jülich, 52425 Jülich, Germany by Asamitsu et al.5, Kozicki et al.6 and Beck et al.7. 3Nanomaterials Laboratories, National Institute for Material Science, Before we turn to the basic principles of these switching 1-1 Namiki, Tsukuba, Ibaraki 305-0044, Japan phenomena, we need to distinguish between two schemes with 4ICORP/Japan Science and Technology Agency, 4-1-8 Honcho, Kawaguchi, respect to the electrical polarity required for resistively switching Saitama 332-0012, Japan MIM systems. -
A Nanoscale Study of Mosfets Reliability and Resistive Switching in RRAM Devices
ADVERTIMENT. Lʼaccés als continguts dʼaquesta tesi queda condicionat a lʼacceptació de les condicions dʼús establertes per la següent llicència Creative Commons: http://cat.creativecommons.org/?page_id=184 ADVERTENCIA. El acceso a los contenidos de esta tesis queda condicionado a la aceptación de las condiciones de uso establecidas por la siguiente licencia Creative Commons: http://es.creativecommons.org/blog/licencias/ WARNING. The access to the contents of this doctoral thesis it is limited to the acceptance of the use conditions set by the following Creative Commons license: https://creativecommons.org/licenses/?lang=en Universitat Autònoma de Barcelona Escola d’Enginyeria Electronic Engineering Department A nanoscale study of MOSFETs reliability and Resistive Switching in RRAM devices A dissertation submitted by Qian Wu in fulfillment of the requirements for the Degree of Doctor of Philosophy in Electronic and Telecommunication Engineering Supervised by Dr. Marc Porti i Pujal Bellaterra, November 2016 Universitat Autònoma de Barcelona Escola d’Enginyeria Electronic Engineering Department Dr. Marc Porti i Pujal, associate professor of the Electronic Engineering Department of the Universitat Autònoma de Barcelona, Certifies That the dissertation: A nanoscale study of MOSFETs reliability and Resistive Switching in RRAM devices submitted by Qian Wu to the School of Engineering in fulfillment of the requirements for the Degree of Doctor in the Electronic and Telecommunication Engineering Program, has been performed under his supervision. Dr. Marc Porti Bellaterra, November of 2016 To my family Acknowledgement The four years’ doctoral study is a significant and unforgettable experience for me. Many kind-hearted people give me a great amount of help, professional advice and encouragement. -
Nanoionics of Advanced Superionic Conductors
306 Ionics 11 (2005) Nanoionics of Advanced Superionic Conductors A.L. Despotuli, A.V. Andreeva and B. Rambabu* Institute of Microelectronics Technology & High Purity Materials RAS, 142432 Chernogolovka, Moscow Region, Russia *Southern University and A&M College, Baton Rouge, Louisiana, 70813 USA ~E-mail: [email protected] (A.L. Despotuli) Abstract. New scientific direction - nanoionics of advanced superionic conductors (ASICs) was proposed. Nanosystems of solid state ionics were divided onto two classes differing by an opposite influence of crystal structure defects on the ionic conductivity oi (energy activation E): 1) nanosystems on the base compounds with initial small o~ (large values of E); and II) nanosystems of ASICs (nano-ASICs) with E = 0.1 eV. The fundamental challenge of nanoionics as the conservation of fast ion transport (FIT) in nano-ASICs on the level of bulk crystal was first recognized and for the providing of FIT in nano- ASICs the conception of structure-ordered (coherent) ASIC//indifferent electrode (IE) hetero- boundaries was proposed. Nano-ASIC characteristic parameter P = d/Xo (d is the thickness of ASIC layer with the defect crystal structure at the heteroboundary, and Ao is the screening length of charge for mobile ions of the bulk of ASIC) was introduced. The criterion for a conservation of FIT in nano-ASIC is P = 1. It was shown that at the equilibrium conditions the contact potentials V at the ASIC//IE coherent heterojunctions in nano-ASICs are V << keT/e. Interface engineering approach "from advanced materials to advanced devices" was proposed as fundamentals for the development of applied nanoionics. -
Memristor Nanodevice for Unconventional Computing:Review and Applications Mahyar Shahsavari, Pierre Boulet
Memristor nanodevice for unconventional computing:review and applications Mahyar Shahsavari, Pierre Boulet To cite this version: Mahyar Shahsavari, Pierre Boulet. Memristor nanodevice for unconventional computing:review and applications . [Research Report] Université de Lille 1, Sciences et Technologies; CRIStAL UMR 9189. 2016. hal-01480614 HAL Id: hal-01480614 https://hal.archives-ouvertes.fr/hal-01480614 Submitted on 1 Mar 2017 HAL is a multi-disciplinary open access L’archive ouverte pluridisciplinaire HAL, est archive for the deposit and dissemination of sci- destinée au dépôt et à la diffusion de documents entific research documents, whether they are pub- scientifiques de niveau recherche, publiés ou non, lished or not. The documents may come from émanant des établissements d’enseignement et de teaching and research institutions in France or recherche français ou étrangers, des laboratoires abroad, or from public or private research centers. publics ou privés. Memristor nanodevice for unconventional computing: review and applications Mahyar Shahsavari, Pierre Boulet Univ. Lille, CNRS, Centrale Lille, UMR 9189 - CRIStAL Centre de Recherche en Informatique Signal et Automatique de Lille, F-59000 Lille, France. Abstract A memristor is a two-terminal nanodevice that its properties attract a wide community of re- searchers from various domains such as physics, chemistry, electronics, computer and neuroscience. The simple structure for manufacturing, small scalability, nonvolatility and potential of using in low power platforms are outstanding characteristics of this emerging nanodevice. In this report, we review a brief literature of memristor from mathematic model to the physical realization. We discuss different classes of memristors based on the material used for its manufacturing. The potential applications of memristor are presented and a wide domain of applications are explained and classified. -
The Roadmap to Realize Memristive Three- Dimensional Neuromorphic Computing System
We are IntechOpen, the world’s leading publisher of Open Access books Built by scientists, for scientists 4,800 122,000 135M Open access books available International authors and editors Downloads Our authors are among the 154 TOP 1% 12.2% Countries delivered to most cited scientists Contributors from top 500 universities Selection of our books indexed in the Book Citation Index in Web of Science™ Core Collection (BKCI) Interested in publishing with us? Contact [email protected] Numbers displayed above are based on latest data collected. For more information visit www.intechopen.com Chapter 2 The Roadmap to Realize Memristive Three- Dimensional Neuromorphic Computing System HongyuHongyu An, An, KangjunKangjun Bai Bai and Yang YiYang Yi Additional information is available at the end of the chapter http://dx.doi.org/10.5772/intechopen.78986 Abstract Neuromorphic computing, an emerging non-von Neumann computing mimicking the physical structure and signal processing technique of mammalian brains, potentially achieves the same level of computing and power efficiencies of mammalian brains. This chapter will discuss the state-of-the-art research trend on neuromorphic computing with memristors as electronic synapses. Furthermore, a novel three-dimensional (3D) neuro- morphic computing architecture combining memristor and monolithic 3D integration technology would be introduced; such computing architecture has capabilities to reduce the system power consumption, provide high connectivity, resolve the routing congestion issues, and offer the massively parallel data processing. Moreover, the design methodology of applying the capacitance formed by the through-silicon vias (TSVs) to generate a mem- brane potential in 3D neuromorphic computing system would be discussed in this chapter. -
Engineering Heteromaterials to Control Lithium Ion Transport Pathways Received: 14 August 2015 Yang Liu1,2, Siarhei Vishniakou3, Jinkyoung Yoo4 & Shadi A
www.nature.com/scientificreports OPEN Engineering Heteromaterials to Control Lithium Ion Transport Pathways Received: 14 August 2015 Yang Liu1,2, Siarhei Vishniakou3, Jinkyoung Yoo4 & Shadi A. Dayeh3,5 Accepted: 18 November 2015 Safe and efficient operation of lithium ion batteries requires precisely directed flow of lithium ions and Published: 21 December 2015 electrons to control the first directional volume changes in anode and cathode materials. Understanding and controlling the lithium ion transport in battery electrodes becomes crucial to the design of high performance and durable batteries. Recent work revealed that the chemical potential barriers encountered at the surfaces of heteromaterials play an important role in directing lithium ion transport at nanoscale. Here, we utilize in situ transmission electron microscopy to demonstrate that we can switch lithiation pathways from radial to axial to grain-by-grain lithiation through the systematic creation of heteromaterial combinations in the Si-Ge nanowire system. Our systematic studies show that engineered materials at nanoscale can overcome the intrinsic orientation-dependent lithiation, and open new pathways to aid in the development of compact, safe, and efficient batteries. Understanding the transport of lithium (Li) ions and electrons in the electrodes/electrolyte is crucial for achieving superior performance of lithium ion batteries (LIBs) with high energy/power density and good cyclability. These battery characteristics are highly desirable for next generation portable electronics and plug-in electric vehicles1,2. Interfaces inside the batteries, such as within the electrode materials and between electrode and electrolyte, have a critical effect on the Li ion transport3–9. Recently, surface coating on the active materials has been demonstrated to be an efficient method to improve battery performance, which essentially introduce or modify interfaces in the electrodes10–15. -
Memristor Devices: Fabrication, Characterization, Simulation
MEMRISTOR DEVICES: FABRICATION, CHARACTERIZATION, SIMULATION, AND CIRCUIT DESIGN Thesis Submitted to The School of Engineering of the UNIVERSITY OF DAYTON In Partial Fulfillment of the Requirements for The Degree of Master of Science in Electrical Engineering By Chris Yakopcic Dayton, Ohio August, 2011 MEMRISTOR DEVICES: FABRICATION, CHARACTERIZATION, SIMULATION, AND CIRCUIT DESIGN Name: Yakopcic, Chris APPROVED BY: _________________________________ _________________________________ Tarek M. Taha, Ph.D. Guru Subramanyam, Ph.D. Advisory Committee Chairman Committee Member Associate Professor Chair and Professor Electrical and Computer Engineering Electrical and Computer Engineering _________________________________ Andrew Sarangan, Ph.D. Committee Member Associate Professor Electro-Optics _________________________________ _________________________________ John G. Weber, Ph.D. Tony E. Saliba, Ph.D. Associate Dean Dean, School of Engineering School of Engineering & Wilke Distinguished Professor ii ©Copyright by Chris Yakopcic All Rights Reserved 2011 iii ABSTRACT MEMRISTOR DEVICES: FABRICATION, CHARACTERIZATION, SIMULATION, AND CIRCUIT DESIGN Name: Yakopcic, Chris University of Dayton Advisor: Dr. Tarek M. Taha Significant interest has been placed on developing systems based on memristors since the initial fabrication by HP Labs in 2008 [1]. The memristor is a nanoscale device with dynamic resistance that is able to retain the last programmed resistance value after power is removed from the device. This property shows that the memristor can be used as a non-volatile memory component, and has potential to enhance many types of systems, such as high density memory, and neuromorphic computing architectures. This thesis presents the fabrication and characterization results obtained based memristor devices developed at the University of Dayton. In addition, a comparison between the existing memristor device models was completed to show how the memristor can be used in a multistate operation.