High-Speed, Hardware-Oriented Authenticated Encryption
ICEPOLE: High-speed, Hardware-oriented Authenticated Encryption Pawe lMorawiecki1;2, Kris Gaj5, Ekawat Homsirikamol5, Krystian Matusiewicz8, Josef Pieprzyk3;4, Marcin Rogawski7, Marian Srebrny1;2, and Marcin W´ojcik6 1 Institute of Computer Science, Polish Academy of Sciences, Poland 2 Section of Informatics, University of Commerce, Kielce, Poland 3 Department of Computing, Macquarie University, Australia 4 Electrical Engineering and Computer Science School, Science and Engineering Faculty, Queensland University of Technology, Brisbane, Australia 5 Cryptographic Engineering Research Group, George Mason University, USA 6 Cryptography and Information Security Group, University of Bristol, United Kingdom 7 Cadence Design Systems, San Jose, USA 8 Intel, Gda´nsk,Poland Abstract. This paper introduces our dedicated authenticated encryption scheme ICEPOLE. ICE- POLE is a high-speed hardware-oriented scheme, suitable for high-throughput network nodes or generally any environment where specialized hardware (such as FPGAs or ASICs) can be used to provide high data processing rates. ICEPOLE-128 (the primary ICEPOLE variant) is very fast. On the modern FPGA device Virtex 6, a basic iterative architecture of ICEPOLE reaches 41 Gbits/s, which is over 10 times faster than the equivalent implementation of AES-128-GCM. The throughput-to-area ratio is also substantially better when compared to AES-128-GCM. We have carefully examined the security of the algorithm through a range of cryptanalytic techniques and our findings indicate that ICEPOLE offers high security level. Keywords: authenticated encryption scheme, authenticated cipher, ICEPOLE 1 Introduction Protocols such as SSL/TLS [12, 16], the backbone of the Internet, are designed to provide data confidentiality and authenticity. Often the underlying algorithms of these protocols realize en- cryption and authentication separately (e.g., AES in CBC mode for encryption and HMAC- SHA1 for authentication).
[Show full text]