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PCI/104-Express and Pcie/104 Specification

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PCI/104-Express and Pcie/104 Specification PCI/104-Express™ & PCIe/104™ Specification Including Adoption on 104™, EPIC™ and EBX™ Form Factors Version 2.10 February 18, 2013 Please Note This specification is subject to change without notice. While every effort has been made to ensure the accuracy of the material contained within this document, the PC/104 Consortium shall under no circumstances be liable for incidental or consequential damages or related expenses resulting from the use of this specification. If errors are found, please notify the PC/104 Consortium. The PC/104 logo, PC/104, PC/104-Plus, PCI-104, PCIe/104, PCI/104-Express, 104, EPIC and EBX are trademarks of the PC/104 Consortium. All other marks are the property of their respective companies. Copyright 2007 - 2013, PC/104 Consortium IMPORTANT INFORMATION AND DISCLAIMERS The PC/104 Consortium (“Consortium”) makes no warranties with regard to this PCI/104-Express and PCIe/104 Specifications (“Specifications”) and, in particular, neither warrant nor represent that these Specifications or any products made in conformance with them will work in the intended manner. Nor does the Consortium assume responsibility for any errors that the Specifications may contain or have any liabilities or obligations for damages including, but not limited to, special, incidental, indirect, punitive, or consequential damages whether arising from or in connection with the use of these Specifications in any way. This specification is subject to change without notice. While every effort has been made to ensure the accuracy of the material contained within this document, the publishers shall under no circumstances be liable for incidental or consequential damages or related expenses resulting from the use of this specification. If errors are found, please notify the publishers. No representations or warranties are made that any product based in whole or part on these Specifications will be free from defects or safe for use for its intended purposes. Any person making, using, or selling such product does so at his or her own risk. The user of these Specifications hereby expressly acknowledges that the Specifications are provided as is, and that the Consortium make no representations, or extends any warranties of any kind, either express or implied, oral, or written, including any warranty of merchantability or fitness for a particular purpose, or warranty or representation that the Specifications or any product or technology utilizing the Specifications or any subset of the Specifications will be free from any claims of infringement of any intellectual property, including patents, copyright and trade secrets nor does the Consortium assume any responsibilities whatsoever with respect to the Specifications or such products. TRADEMARKS AND COPYRIGHTS The PC/104 logo, PC/104, PC/104-Plus, PCI-104, PCI/104-Express, PCIe/104, 104, EPIC, and EBX are trademarks of the PC/104 Consortium. PCI, PCI Express, and PCIe are trademarks of PCI-SIG. PS/2, PC/XT, PC/AT and IBM are trademarks of International Business Machines Inc. Information regarding the traditional stackable PCI bus found on in the PC/104-Plus and PCI-104 specifications is the property of the PC/104 Consortium. All other trademarks are the property of their respective companies. PCIe/104 and PCI/104-Express Specification Revision 2.10, February 18, 2013 – Page i REVISION HISTORY March 21, 2008 Version 1.0 Initial release March 27, 2009 Version 1.1 Add USB and over current signal to pin out, inserted description in 1.4.4, modified shift example to include USB Section 2.4 corrected that even numbered pins are located towards the inside of the board and odd numbered pins are located towards the edge of the board PEx16_ENA changed to PEG_ENA# in section 2.4.1.2 and 2.4.3 Figure 2.3 Moved Host to bottom in this figure and added USB Figure 6-14 Top two boards are PCI/104-Express February 10, 2011 Version 2.0 Added Type 2 connector version Added 22mm connector option Removed Figure 6 4: Mating of Top Half and Bottom Half of Connector A because this non- dimensioned sketch provided no useful information Editorial changes: o Changed signal names PWRGD to PWRGOOD, CPU_DIR to DIR, and 5V_Always to +5V_SB for consistency o Corrected USB0 and USB1 in Automatic Link Shifting Examples for Host and Various Devices o Corrected text in Appendix B and C related to PCI/104-Express Expansion Zone o Redrew Example breakout routing of connector bank 1 PCI Express x1 links with shifting o Changed PCIe to PCI Express when discussing the PCI Express specification. o Cleaned up drawings in Figure 1-1 o Swapped order of section 1.3 and 1.4 and edited text o Fixed missing references. o Added signal switches suggestions for SATA and USB 3.0 March 21, 2011 Version 2.01 Provided SATA definitions that were omitted in previous version. February 18, 2013 Version 2.10 Corrected Consortium name in all references Expanded introduction to PCI Express to include Gen 1, 2, and 3. Added PCI Express Gen 2 recommendations. o Added devices and updated signal switch table. o Updated layout recommendations section to include PCIe Gen 2 & 3. o Added Gen 2 & 3 to via and trace length table. o Removed microstrip and stripline examples. Added PCI Express x4, x8, and x16 layout examples. Added SATA and USB 3.0 capacitor info and layout examples. Changed SDVO to Alternate Function PCIe/104 and PCI/104-Express Specification Revision 2.10, February 18, 2013 – Page ii TABLE OF CONTENTS 1. INTRODUCTION ................................................................................................................................................... 1 1.1. Purpose ...................................................................................................................................................... 1 1.2. Standard Identification ............................................................................................................................... 1 1.3. Description ................................................................................................................................................. 1 1.4. PCIe/104 Type 1 and Type 2 ..................................................................................................................... 1 1.4.1 PCI/104-Express Version 1.0 and 1.1 Host Board Compatibility ............................................ 2 1.4.2 PCI/104-Express Version 1.0 and 1.1 Peripheral Board Compatibility ................................... 2 1.5. PCIe/104 Feature Set ................................................................................................................................. 2 1.5.1 Connector A : PCI Express Bus .............................................................................................. 2 1.6. PCI/104-Express Feature Set ..................................................................................................................... 3 1.6.1 Connector A : Same as 1.5.1 above ......................................................................................... 3 1.6.2 Connector B: PCI Bus: ............................................................................................................ 3 1.7. General Stacking Rules .............................................................................................................................. 3 1.8. Stack Up, Stack Down, and Both ............................................................................................................... 4 1.9. Bus and Signal Group Descriptions ........................................................................................................... 4 1.9.1 PCI Express Expansion Bus ..................................................................................................... 4 1.9.2 SATA Links ............................................................................................................................. 5 1.9.3 LPC Bus ................................................................................................................................... 5 1.9.4 Universal Serial Bus (USB) ..................................................................................................... 5 1.9.5 System Management Bus ......................................................................................................... 5 1.9.6 ATX and Power Management .................................................................................................. 6 1.9.7 RTC Battery ............................................................................................................................. 7 1.9.8 PCI Expansion Bus .................................................................................................................. 7 1.10. References.................................................................................................................................................. 7 2. EXPANSION CONNECTOR A.............................................................................................................................. 8 2.1. Functions ................................................................................................................................................... 8 2.1.1 PCIe/104 Type 1 and Type 2 Common Features ..................................................................... 8 2.1.2 PCIe/104 Type 1 Only Additional Features ............................................................................. 8 2.1.3 PCIe/104 Type 2 Only Additional Features ............................................................................
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