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The TAIPEI Rectifier—A New Three-Phase Two-Switch ZVS PFC

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The TAIPEI Rectifier—A New Three-Phase Two-Switch ZVS PFC 686 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 2, FEBRUARY 2013 The TAIPEI Rectifier—A New Three-Phase Two-Switch ZVS PFC DCM Boost Rectifier Yungtaek Jang, Senior Member, IEEE, and Milan M. Jovanovic´, Fellow, IEEE Abstract—A new, three-phase, two-switch, power-factor- To improve the input-current THD of the three-phase single- correction (PFC) rectifier that can achieve less than 5% input- and two-switch rectifiers, a number of harmonic-injection tech- current total harmonic distortion (THD) and features zero-voltage niques were introduced in [3], [8]–[10]. In [3], a third-harmonic switching (ZVS) of all the switches over the entire input-voltage and load ranges is introduced. The proposed rectifier also offers injection technique for two-switch rectifiers was proposed that automatic voltage balancing across the two output capacitors con- can reduce line-current THD below 5%, which is a typical re- nected in series, which makes it possible to use downstream convert- quirement for today’s rectifiers. However, this technique and its ers designed with lower voltage-rated component that offer better refinements are not quite suitable for implementation in state performance and are less expensive than their high-voltage-rated of the art, high-power density, high-efficiency rectifiers since counterparts. In addition, the proposed rectifier also exhibits low common-mode EMI noise. The performance of the proposed recti- they require additional components such as low-frequency har- fier was evaluated on a 2.8-kW prototype with a 780-V output that monic filters, or interphase (zig–zag) autotransformers, that have was designed to operate in 340–520-VL -L ,RMS input-voltage range. adverse effects on the efficiency, size, weight, and cost. The Index Terms—Boost converter, discontinuous conduction mode, harmonic-injection techniques for single-switch rectifiers intro- power factor correction, three phase, voltage balancing, zero- duced in [8]–[10] do not require additional components since voltage switching. the harmonic injection is solely performed at the control level. While all these techniques are proven to reduce THD without I. INTRODUCTION penalizing efficiency, they are not capable of reducing the THD below 5%. T is well established that three-phase power-factor- Another major concern in the application of three-phase front- correction (PFC) rectifiers with three or more active switches I end PFC rectifiers that employ the boost topology is the adverse exhibit superior power factor and input-current total harmonic effect of their high-output voltage on the cost and performance distortion (THD) compared with those implemented with a of downstream converter(s). Namely, for rectifiers operating fewer number of switches [1]–[16]. However, because the sim- with a nominal three-phase line-to-line voltage 380/480 V, the plicity and low cost of single- and two-switch rectifiers are so output voltage is typically in the 800-V range. Because the ma- attractive, they are increasingly employed in cost-sensitive ap- jority of high-performance low-cost silicon devices are rated plications such as three-phase battery chargers. below 650 V and the majority of high-energy density low-cost Major concerns in three-phase single- and two-switch rec- electrolytic capacitors are rated below 450 V, the high-output tifiers is their relatively low efficiency due to “hard” switch- voltage of the front-stage rectifier dictates the use of relatively ing and a relatively high input-current THD because of their inefficient and expensive components in downstream converters, inability to actively shape each phase current independently. unless the output voltage is divided by two capacitors in series To address the efficiency issue, various implementations of so that low-rated-voltage components in downstream convert- the three-phase single-switch rectifiers with reduced switching ers can be used. While the split capacitor approach may seem losses were proposed, [2], [5], [6]. Specifically, in the circuits attractive since it eliminates a need for high-voltage-rated com- proposed in [2] and [5] resonant techniques are employed to ponents, it is not preferred because it suffers from unbalanced achieve zero-current switching (ZCS) of the switch, whereas voltages across the split-output capacitors. Although there are in [6], ZCS is achieved by using an active snubber. Generally, many techniques that can actively balance the voltages across all these techniques require additional circuitry that increases the split capacitors, those techniques typically require additional their complexity and cost. In addition, the implementations em- sensing components and control loops, which increases the cost ploying resonant techniques suffer from high voltage and/or and the complexity of their control, [17]–[19]. current stresses. In this paper, a new, three-phase, two-switch, zero-voltage- switching (ZVS), discontinuous-current-mode (DCM), PFC Manuscript received February 15, 2012; revised May 15, 2012; accepted June boost rectifier is introduced. The proposed rectifier achieves 14, 2012. Date of current version September 27, 2012. This paper was presented less than 5% input-current THD over the entire input range and and selected as an outstanding presentation at APEC’12 (Feb. 6 - Feb. 9, 2012, above 20% load and features ZVS of all the switches without Orlando, FL). Recommended for publication by Associate Editor B. Lehman. The authors are with the Power Electronics Laboratory, Delta Products Cor- any additional soft-switching circuitry. Moreover, the proposed poration, Research Triangle Park, NC 27709 USA (e-mail: [email protected]; rectifier automatically achieves balancing between the voltages [email protected]). of the two output capacitors connected in series. In addition, Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. the common-mode electromagnetic interference (EMI) of the Digital Object Identifier 10.1109/TPEL.2012.2205271 proposed rectifier is quite low. The evaluation of the proposed 0885-8993/$31.00 © 2012 IEEE JANG AND JOVANOVIC:´ TAIPEI RECTIFIER—A NEW THREE-PHASE TWO-SWITCH ZVS PFC DCM BOOST RECTIFIER 687 Fig. 1. Proposed three-phase two-switch ZVS PFC DCM boost rectifier. rectifier was performed on a three-phase 2.8-kW prototype op- erating in the 340–520-VL-L,RMS line-voltage range. II. THREE-PHASE TWO-SWITCH ZVS PFC DCM BOOST RECTIFIER Fig. 1 shows the proposed three-phase two-switch ZVS PFC DCM boost rectifier. In the proposed circuit, the three Y-connected capacitors, C1 , C2 , and C3 , are used to create vir- tual neutral N, i.e., a node with the same potential as power source neutral 0 that is not physically available or connected in three-wire power systems. Since the virtual neutral is connected to the midpoint between two switches S and S and also to the Fig. 2. Proposed three-phase two-switch ZVS PFC DCM boost rectifier. 1 2 (a) Simplified circuit diagram showing reference directions of currents; midpoint of two output capacitors CO 1 and CO 2 , the potentials (b) Input-voltage 60◦-segments during which none of phase voltages changes of these two midpoints are the same as the potential of neutral sign. Conducting diodes in each segment are also indicated. 0 of the balanced three-phase power source. In addition, by connecting virtual neutral N directly to the III. ANALYSIS OF OPERATION midpoint between switches S1 and S2 , decoupling of the three input currents is achieved. In such a decoupled circuit, the cur- To simplify the analysis of operation, it is assumed that rip- rent in each of the three inductors is dependent only on the ple voltages of the input and output filter capacitors shown in corresponding phase voltage, which reduces the THD and in- Fig. 1 are negligible so that their voltages can be represented by creases the PF, [12]. Specifically, in the circuit in Fig. 1, bridge constant-voltage source VAN, VBN, VCN, VO 1 , and VO 2 as shown diodes D1 –D6 allow only the phases with positive phase volt- in Fig. 2. Also, it is assumed that in the ON state, semiconduc- ages to deliver currents through switch S1 when it is turned ON tors exhibit zero resistance, i.e., they are short circuits. However, and allow only the phases with negative phase voltages to deliver the output capacitances of the switches are not neglected in this currents through switch S2 when switch S2 is ON. Therefore, analysis. Coupled inductor LC in Fig. 1 is modeled as a two- the boost inductor in the phase in a positive voltage half-line winding ideal transformer with magnetizing inductance LM and cycle carries positive current when switch S1 is ON, while the leakage inductances LLK1 and LLK2. It should be noted that the boost inductor in the phase in a negative voltage half-line cy- average voltage across capacitor CR is equal to output voltage cle carries negative current when switch S2 is ON. During the VO = VO 1 + VO 2 . Since in a properly designed rectifier the time when switch S1 is OFF, the stored energy in the inductor ripple voltage of capacitor CR is much smaller than output volt- connected to the positive phase voltage is delivered to capacitor age VO , voltage VCR across capacitor CR can be considered CR , whereas the stored energy in the inductor connected to the constant and equal to VO . negative phase voltage is delivered to capacitor CR during the By recognizing that rectifiers D1 ,D2 , and D3 conduct only time when switch S2 is OFF. Because the voltage between either when their corresponding phase voltage is positive and rectifiers terminal of capacitor CR and virtual neutral N abruptly changes D4 ,D5 , and D6 conduct only when their corresponding voltage with a high dV /dt during each switching cycle, coupled inductor is negative, the simplified circuit diagram of the rectifier along LC is connected between “flying” capacitor CR and the output with the reference directions of currents and voltages is shown to isolate the output from these fast high-voltage transitions that in Fig.
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