S O L U T I O N BRIEF Intel Cluster Ready and the Intel Xeon Processor 5500 Series: A Dynamic Duo for Broadening HPC Cluster Adoption Sponsored by: Intel Corporation Steve Conway Richard Walsh Jie Wu April 2009 EXECUTIVE SUMMARY Intel's new Intel Xeon processor 5500 series, formerly known as Nehalem, has the turbo-charged specs, especially for bandwidth, that should allow it to drive sustained performance advances on a wide range of high-performance computing (HPC) applications. The challenge is harnessing this newfound power in the context of HPC clusters, which distribute processing power across a set of independent computers that are linked together by a mix of software and networking technologies from different vendors. Taming HPC cluster complexity is especially daunting for newer HPC users and those considering first-time migration to HPC from desktop computers. These users typically lack access to in-house HPC experts, and they buy systems priced below $250,000 (IDC's HPC workgroup and departmental segments). They are an important source of HPC market growth, and vendors that want to broaden HPC cluster adoption and usage need to address the "ease-of-everything" requirements of this important group of users. Intel had this goal in mind when it launched the Intel Cluster Ready (ICR) program in 2007 with two other founding vendors. The number of ICR vendor members has grown to more than 150 in the relatively short time since then, testifying to the growing appeal of reference architectures as a means of alleviating cluster complexity. ICR is not the only cluster reference architecture in the HPC market, but it is the best-known one and has built the largest contingent of OEM and software partners. Not surprisingly, Intel and its ICR partners began preparing for the Intel Xeon processor 5500 series' arrival some time ago. Thanks to that programmatic foresight, HPC users — and desktop users aspiring to HPC — will be able to exploit the Intel Xeon processor 5500 series' advanced capabilities on ICR-compliant (i.e., preintegrated, pretested) cluster platforms from a variety of OEMs as soon as these Intel Xeon 5500 processor-based systems reach the marketplace. Global Headquarters: 5 Speen Street Framingham, MA 01701 USA P.508.872.8200 F.508.935.4015 www.idc.com F.508.935.4015 P.508.872.8200 01701 Global Framingham,USA Street Headquarters:MA 5 Speen In sum, the combination of ICR and the Intel Xeon processor 5500 series has the potential to become a powerful catalyst for expanding worldwide HPC adoption and use. SITUATION OVERVIEW Barriers to Increased Cluster Adoption and Productivity The Rise of Clusters to HPC Market Dominance A cluster is a set of independent computers linked together by software and networking technologies from multiple vendors. Clusters originated as do-it-yourself HPC systems. In the late 1990s users began employing inexpensive hardware to cobble together scientific computing systems based on the "Beowulf cluster" concept pioneered by Thomas Sterling and Donald Becker at NASA. From their Beowulf origins, clusters have evolved and matured substantially. Clusters have made HPC servers one of the fastest-growing IT markets in recent years, almost single-handedly propelling HPC server revenue past $10 billion in 2007. Primarily due to superior price/performance based on the use of standard technologies, clusters have become the dominant species of HPC servers, capturing 65% of market revenue in 2007 and increasing their share in 2008. IDC predicts that as the worldwide economic downturn causes worldwide HPC server revenue to dip modestly in 2009 before resuming growth in 2010, the aggressive price/performance of clusters will make them even more appealing. An Escalating Problem: Cluster Management and Operational Complexity But clusters have some downsides, too. The system management issues that plagued the early years of clusters remain in force today because clusters are moving targets. Even as vendors have made progress in taming clusters, cluster complexity has raced out ahead of them. The number of processor elements that need to be managed has grown rapidly as processor counts in the average cluster have ballooned and as multicore processors have doubled and quadrupled the elements in each processor. Add to this an expanding variety of applications, libraries, operating system versions and patches, and management tools, and it is not hard to see the source of the difficulty in managing cluster systems. The deployment of clusters in new environments, especially grids, has added to the management challenges. Because HPC clusters are moving targets, users report the same major pain points today that they reported five years ago. Bandwidth Limitations Constrain Application Performance Another notable weakness of HPC clusters has been increasingly poor per-core bandwidth. As standard x86 processors have gone from one to two cores, and then from two to four, they have multiplied their peak performance (flops) without corresponding increases in bandwidth. This dramatic worsening of the bytes/flops ratio has impaired cluster efficiency and productivity by making it more and more difficult to move data into and out of each core fast enough to keep the cores busy, especially for bandwidth-intensive commercial ISV applications. Most HPC ISV applications were originally designed to operate on a single core with relatively strong access to main memory. And although many of these codes have since been modified to scale to a handful of cores, poor per-core bandwidth often seriously constrains their performance. 2 #217715 ©2009 IDC A recent IDC survey revealed that about one in eight HPC sites (12%) had at least some codes whose per-core performance on real-world applications was slower on their newest HPC system than on the prior one — and 50% of the sites said they expected to see this kind of retrograde performance on some codes in the next 12 months. New and Less Experienced Users Require "Ease of Everything" When the Cray-1 supercomputer debuted in 1976, it came with no operating system. Not a problem: The early government customers employed legions of computer scientists who were perfectly capable of writing their own operating system. As the HPC market expanded to new groups of customers lacking this in-house expertise, especially within industry, HPC systems had to become easier to deploy and operate. But HPC system management was never painless, and when clusters arrived to spur unprecedented HPC market growth, management complexity took a decided turn for the worse. Despite this increasing complexity, clusters inaugurated a period of rapid HPC market growth starting in 2001. Recognizing that an important source of this growth was at the entry level, IDC began tracking a new "HPC workgroup" segment for systems (primarily clusters) priced below $100,000. This price band and the HPC departmental segment just above it (systems priced from $100,000 to $249,000) together captured about $5.6 billion in 2008, and IDC predicts their combined revenue will reach $7.6 billion in 2013. Users in these segments are typically found in SMBs or in smaller units of tier 1 firms. They lack access to HPC experts and require systems that provide "ease of everything": purchasing, deployment, and management. In 2007 and 2008, OEMs began aiming more products at these growing segments. Many of these new products are ICR compliant. Waiting behind those who have already migrated from desktop computing to HPC workgroup systems is a large contingent of others who are poised to make this move if barriers are lowered enough. In an IDC study of desktop technical computing users, 57% reported having important problems they could not solve with their desktop computers. A nearly equal percentage (55%) were open to using HPC under the right circumstances. ICR AND THE INTEL XEON PROCESSOR 5500 SERIES: A CATALYST FOR BROADENING HPC ADOPTION AND USE Overview of ICR The Intel Cluster Ready program tackles cluster complexity by offering a reference architecture for Intel-based systems that OEMs can use to certify their configurations and that ISVs can use to test and register their applications. The chief goal of this voluntary compliance program is to ensure fundamental hardware/software integration so that end users can get their work done even in cases where no HPC experts are available to help. ICR is designed to allow overworked IT departments to respond more readily to end users' HPC requirements, enabling SMBs to migrate to clusters from desktop computers and helping large firms to drive HPC further down in the organization. In a nutshell, the ICR program's preintegration aims to enable a much broader group of end users to exploit HPC. ©2009 IDC #217715 3 Intel Xeon Processor 5500 Series Technical Innovations and Benefits Supporting HPC The arrival of Intel Xeon 5500 processors will be welcome news for the worldwide HPC community, from entry-level to high-end users. The Intel Xeon processor 5500 series is designed to provide the per-core bandwidth that has been needed to advance performance on key scientific and engineering applications. In addition, being able to access the capabilities of Intel Xeon 5500 processors in preintegrated, pretested, ICR-compliant clusters from a variety of OEMs should facilitate first-time HPC adoption, along with increased usage among newer, less experienced HPC users. Intel Xeon Processor 5500 Series Innovations Among Intel Xeon processor 5500 series innovations, those most important to HPC clusters include the following: The Intel QuickPath Interconnect (QPI) replaces the front-side bus and promises to greatly speed up point-to-point communication. The integrated memory controller provides direct (rather than mediated) access to up to three memory channels of DDR3 SDRAM. Intel Xeon 5500 processors are designed to reduce energy use by about 30%. Intel Xeon Processor 5500 Series Benefits for HPC Better Application Performance The Intel Xeon processor 5500 series' biggest benefits for HPC will be bandwidth, bandwidth, and bandwidth — because there has been such a dearth of it in recent years.