DOCSLIB.ORG

Accelerate Your AI Journey with Intel

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Accelerate Your AI Journey with Intel Intel® AI Workshop 2021 Accelerate Your AI Journey with Intel Laurent Duhem – HPC/AI Solutions Architect ([email protected]) Shailen Sobhee - AI Software Technical Consultant ([email protected]) Notices and Disclaimers ▪ Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Performance varies depending on system configuration. ▪ No product or component can be absolutely secure. ▪ Tests document performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. For more complete information about performance and benchmark results, visit http://www.intel.com/benchmarks . ▪ Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more complete information visit http://www.intel.com/benchmarks . ▪ Intel® Advanced Vector Extensions (Intel® AVX) provides higher throughput to certain processor operations. Due to varying processor power characteristics, utilizing AVX instructions may cause a) some parts to operate at less than the rated frequency and b) some parts with Intel® Turbo Boost Technology 2.0 to not achieve any or maximum turbo frequencies. Performance varies depending on hardware, software, and system configuration and you can learn more at http://www.intel.com/go/turbo. ▪ Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. ▪ Cost reduction scenarios described are intended as examples of how a given Intel-based product, in the specified circumstances and configurations, may affect future costs and provide cost savings. Circumstances will vary. Intel does not guarantee any costs or cost reduction. ▪ Intel does not control or audit third-party benchmark data or the web sites referenced in this document. You should visit the referenced web site and confirm whether referenced data are accurate. ▪ © Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. 2 Notices and Disclaimers ▪ This presentation is tailored for developers and curious data-scientists seeking for optimal performances in their daily production ▪ No AI theory will be lectured during this talk ▪ Preliminary knowledge for ML frameworks/packages – as seen below is certainly a must.. ▪ Intel Software offering is vast and address multiple Hardware flavors (XPUs) – so buckle-up for dense lectures .. ;-) 3 AI is Interdisciplinary DATA More AI Insights Machine Reinforcement Learning Learning Regression Classification Clustering Symbolic Reasoning Create Analogical Reasoning Business Transmit Evolutionary Computing Ingest Data Ensemble Bayes Methods Analytics methods Search/Query, Integrate Statistics, etc. And More… Operational Stage 4 Clean Deep Learning Security Image Language Recommender More Image Object Image Natural Language Speech Recommender Data Normalize Recognition Detection Segmentation Processing (NLP) ⇄ Text Systems Generation 4 Flexible Software AI Ecosystem Hardware for AI Solutions Portofolio Acceleration 5 Flexible Software AI Ecosystem Hardware for AI Solutions Portofolio Acceleration 6 INTELLIGENT SOLUTIONS Intel AI Builders OEM Systems Industry-leading ISVs and system Ready-to-deploy, end-to-end solutions integrators solutions to accelerate jointly designed and developed by Intel & adoption of artificial intelligence (AI) partners to simplify customer experiences across verticals and workloads intel.com/ai/deploy-on-intel- builders.intel.com/ai architecture.html Intel AI Public Cloud Solutions Intel® Select Solutions AI-optimized solutions developed by AI-optimized solutions for real-world Intel with cloud service providers (CSPs) demands that are pre-configured and including for Amazon Web Services rigorously benchmark7 tested to (AWS), Baidu Cloud, Google Cloud accelerate infrastructure deployment Platform, Microsoft Azure & more intel.com/selectsolutions 7 INTELLIGENT CSP PaaS Offerings – Overview SOLUTIONS AWS Azure GCP Name SageMaker Azure Machine Learning with Brainwave Google App Engine Type PaaS PaaS PaaS Instance C5 Instance Fv2 or HC Series Flexible Environment Description A fully managed platform to easily A fully managed cloud service to easily build, deploy, and share predictive A fully managed serverless platform build, train and deploy machine analytics solutions. to build highly scalable applications learning models at any scale OS N/A N/A N/A HW SKUs C5 Instance (Skylake) Intel Arria® 10 FPGA FW Pre-configured DAAL4Py Marketplace approach for optimized FW (marketplace) WIP Use Case Ad targeting, prediction & Modern web applications and forecasting, industrial IoT & Machine scalable mobile backends Learning CSP Value Ease of use. Pre-configured Prop environment 8 8 INTELLIGENT CSP IaaS Offerings – Overview SOLUTIONS AWS Azure GCP Name DL AMI Data Science VMs Cycle* Cloud Google* Compute Engine Instance C5 C5 Fv2 or HC Series HC Series Platform based on Skylake Description Pre-installed Customer-built DL Azure VM images, pre-installed, Easy-to-set-up clusters with Scalable, high-performance virtual pip packages engine – clean configured and tested with several Singularity containers machines slate popular AI/DL tools HW SKUs Intel Xeon Platinum 8000 series Various HW Platforms Any HW platforms (validated on Intel Xeon Platinum family (Skylake) (code-named Skylake) Skylake) Optimized TensorFlow, MxNet, and PyTorch TensorFlow and VM templates on TensorFlow TensorFlow FW MarketPlace Instance 2vCPU to 72vCPU Fsv2-Series Any Instance size Up to 160 vCPU Size 2 to 72 vCPU Memory 144 GiB Up to 144 GiB Up to 3.75 TB Use Case Advanced compute intensive Batch processing, web servers, HPC workloads but can run deep Improve and manage patient data, workloads: high performance web analytics and gaming learning create intuitive customer experience servers, HPC, batch processing, ad serving, gaming, distributed 9 analytics and ML/DL inference CSP Value Best price performance Lower per-hour list price is best Dynamically provision HPC Azure Industry-leading price and Prop value in price-performance in Azure clusters and orchestrate data and performance portfolio jobs for hybrid and cloud Easily transition from on-prem to workflows cloud, compliance and global reach 9 INTELLIGENT CSP IaaS Offerings – Overview SOLUTIONS • Amazon Web Services: intel.ai/aws • Baidu Cloud: intel.ai/baidu • Google Cloud Platform: intel.ai/gcp • Microsoft Azure: intel.ai/microsoft 10 10 Flexible Software AI Ecosystem Hardware for AI Solutions Portofolio Acceleration 11 FLEXIBLE Delivering AI from Cloud-to-Device ACCELERATION Cloud/DC Edge Device CPU only For mainstream AI use cases CPU + GPU When compute is dominated by AI, HPC, graphics, and/or real-time media CPU + CUSTOM When compute is dominated by deep learning (DL) Intel® FPGAs DL Training/Inference DL Custom DL Inference DC = Data Center DL = Deep Learning 12 FLEXIBLE Intel® Xeon® Scalable Processors ACCELERATION THE ONLY DATA CENTER CPU OPTIMIZED FOR AI INTEL ® ADVANCED VECTOR EXTENSIONS 512 (INTEL AVX512) INTEL ® DEEP LEARNING BOOST (INTEL DL BOOST) INTEL® ADVANCED MATRIX EXTENSIONS (INTEL AMX) 2019 2021 2022 3rd GEN COOPER LAKE ND 14NM th 2 GEN NEXT GEN INTEL DL BOOST (BFLOAT16) 4 GEN CASCADE LAKE rd SAPPHIRE RAPIDS 14NM 3 GEN NEXT-GENERATION TECHNOLOGIES NEW AI ACCELERATION (VNNI) ICE LAKE INTEL AMX NEW MEMORY STORAGE HIERARCHY 10NM SHIPPING 1H’21 LEADERSHIP PERFORMANCE 13 The Evolution of Microprocessor Parallelism → → More cores More Threads Wider vectors Scalar A + B = C Intel® Intel® Xeon® Intel® Xeon® Intel® Xeon® Intel® Xeon® Intel® Xeon® Xeon® Processor Processor Processor Processor Processor Intel® Xeon® SIMD Processor 5100 series 5500 series 5600 series E5-2600 v2 E5-2600 v3 Scalable 64-bit series series Processor1 A + B = C v4 series A B C Up to Core(s) 1 2 4 6 12 18-22 28 A B C Up to Threads 2 2 8 12 24 36-44 56 A B C 14 A B C SIMD Width 128 128 128 128 256 256 512 A B C Intel® Intel® SSE Intel® SSE Intel® Intel® Vector ISA Intel® SSE3 Intel® AVX A B C SSE3 4.1 4.2 AVX2 AVX-512 A B C 1. Product specification for launched and shipped products available on ark.intel.com. 14 FLEXIBLE INTEL ® DEEP LEARNING BOOST OVERVIEW ACCELERATION 15 FLEXIBLE INTEL ® DEEP LEARNING BOOST OVERVIEW ACCELERATION 16 FLEXIBLE INTEL ® DEEP LEARNING BOOST OVERVIEW
Load more

Recommended publications
  • GPU Developments 2018
    GPU Developments 2018 2018 GPU Developments 2018 © Copyright Jon Peddie Research 2019. All rights reserved. Reproduction in whole or in part is prohibited without written permission from Jon Peddie Research. This report is the property of Jon Peddie Research (JPR) and made available to a restricted number of clients only upon these terms and conditions. Agreement not to copy or disclose. This report and all future reports or other materials provided by JPR pursuant to this subscription (collectively, “Reports”) are protected by: (i) federal copyright, pursuant to the Copyright Act of 1976; and (ii) the nondisclosure provisions set forth immediately following. License, exclusive use, and agreement not to disclose. Reports are the trade secret property exclusively of JPR and are made available to a restricted number of clients, for their exclusive use and only upon the following terms and conditions. JPR grants site-wide license to read and utilize the information in the Reports, exclusively to the initial subscriber to the Reports, its subsidiaries, divisions, and employees (collectively, “Subscriber”). The Reports shall, at all times, be treated by Subscriber as proprietary and confidential documents, for internal use only. Subscriber agrees that it will not reproduce for or share any of the material in the Reports (“Material”) with any entity or individual other than Subscriber (“Shared Third Party”) (collectively, “Share” or “Sharing”), without the advance written permission of JPR. Subscriber shall be liable for any breach of this agreement and shall be subject to cancellation of its subscription to Reports. Without limiting this liability, Subscriber shall be liable for any damages suffered by JPR as a result of any Sharing of any Material, without advance written permission of JPR.
    [Show full text]
  • CTL RFP Proposal
    State of Maine Department of Education in coordination with the National Association of State Procurement Officials PROPOSAL COVER PAGE RFP # 201210412 MULTI-STATE LEARNING TECHNOLOGY INITIATIVE Bidder’s Organization Name: CTL Chief Executive - Name/Title: Erik Stromquist / COO Tel: 800.642.3087 x 212 Fax: 503.641.5586 E-mail: [email protected] Headquarters Street Address: 3460 NW Industrial St. Headquarters City/State/Zip: Portland, OR 97210 (provide information requested below if different from above) Lead Point of Contact for Proposal - Name/Title: Michael Mahanay / GM, Sales & Marketing Tel: 800.642.3087 x 205 Fax: 503.641.5586 E-mail: [email protected] Street Address: 3460 NW Industrial St. City/State/Zip: Portland, OR 97219 Proposed Cost: $294/yr. The proposed cost listed above is for reference purposes only, not evaluation purposes. In the event that the cost noted above does not match the Bidder’s detailed cost proposal documents, then the information on the cost proposal documents will take precedence. This proposal and the pricing structure contained herein will remain firm for a period of 180 days from the date and time of the bid opening. No personnel on the multi-state Sourcing Team or any other involved state agency participated, either directly or indirectly, in any activities relating to the preparation of the Bidder’s proposal. No attempt has been made or will be made by the Bidder to induce any other person or firm to submit or not to submit a proposal. The undersigned is authorized to enter into contractual obligations on behalf of the above-named organization.
    [Show full text]
  • Mass-Producing Your Certified Cluster Solutions
    Mass-Producing Your Certified Cluster Solutions White Paper The Intel® Cluster Ready program is designed to help you make the most of your engineering Intel® Cluster Ready resources. The program enables you to sell several different types of clusters from each solution High-Performance you design, by varying the hardware while maintaining the same software stack. You can gain a Computing broader range of cluster products to sell without engineering each one “from scratch.” As long as the software stack remains the same and works on each one of the hardware configurations, you can be confident that your clusters will interoperate with registered Intel Cluster Ready applications. Your customers can purchase your clusters with that same confidence, knowing they’ll be able to get their applications up and running quickly on your systems. Intel® Cluster Ready: Mass-Producing Your Certified Cluster Solutions Table of Contents Overview of Production-Related Activities � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � 3 Creating and certifying recipes � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � 3 Maintaining recipes � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � 3 Mass-producing recipes � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � �
    [Show full text]
  • NVM Express and the PCI Express* SSD Revolution SSDS003
    NVM Express and the PCI Express* SSD Revolution Danny Cobb, CTO Flash Memory Business Unit, EMC Amber Huffman, Sr. Principal Engineer, Intel SSDS003 Agenda • NVM Express (NVMe) Overview • New NVMe Features in Enterprise & Client • Driver Ecosystem for NVMe • NVMe Interoperability and Plugfest Plans • EMC’s Perspective: NVMe Use Cases and Proof Points The PDF for this Session presentation is available from our Technical Session Catalog at the end of the day at: intel.com/go/idfsessions URL is on top of Session Agenda Pages in Pocket Guide 2 Agenda • NVM Express (NVMe) Overview • New NVMe Features in Enterprise & Client • Driver Ecosystem for NVMe • NVMe Interoperability and Plugfest Plans • EMC’s Perspective: NVMe Use Cases and Proof Points 3 NVM Express (NVMe) Overview • NVM Express is a scalable host controller interface designed for Enterprise and client systems that use PCI Express* SSDs • NVMe was developed by industry consortium of 80+ members and is directed by a 13-company Promoter Group • NVMe 1.0 was published March 1, 2011 • Product introductions later this year, first in Enterprise 4 Technical Basics • The focus of the effort is efficiency, scalability and performance – All parameters for 4KB command in single 64B DMA fetch – Supports deep queues (64K commands per Q, up to 64K queues) – Supports MSI-X and interrupt steering – Streamlined command set optimized for NVM (6 I/O commands) – Enterprise: Support for end-to-end data protection (i.e., DIF/DIX) – NVM technology agnostic 5 NVMe = NVM Express NVMe Command Execution 7 1
    [Show full text]
  • System Design for Telecommunication Gateways
    P1: OTE/OTE/SPH P2: OTE FM BLBK307-Bachmutsky August 30, 2010 15:13 Printer Name: Yet to Come SYSTEM DESIGN FOR TELECOMMUNICATION GATEWAYS Alexander Bachmutsky Nokia Siemens Networks, USA A John Wiley and Sons, Ltd., Publication P1: OTE/OTE/SPH P2: OTE FM BLBK307-Bachmutsky August 30, 2010 15:13 Printer Name: Yet to Come P1: OTE/OTE/SPH P2: OTE FM BLBK307-Bachmutsky August 30, 2010 15:13 Printer Name: Yet to Come SYSTEM DESIGN FOR TELECOMMUNICATION GATEWAYS P1: OTE/OTE/SPH P2: OTE FM BLBK307-Bachmutsky August 30, 2010 15:13 Printer Name: Yet to Come P1: OTE/OTE/SPH P2: OTE FM BLBK307-Bachmutsky August 30, 2010 15:13 Printer Name: Yet to Come SYSTEM DESIGN FOR TELECOMMUNICATION GATEWAYS Alexander Bachmutsky Nokia Siemens Networks, USA A John Wiley and Sons, Ltd., Publication P1: OTE/OTE/SPH P2: OTE FM BLBK307-Bachmutsky August 30, 2010 15:13 Printer Name: Yet to Come This edition first published 2011 C 2011 John Wiley & Sons, Ltd Registered office John Wiley & Sons Ltd, The Atrium, Southern Gate, Chichester, West Sussex, PO19 8SQ, United Kingdom For details of our global editorial offices, for customer services and for information about how to apply for permission to reuse the copyright material in this book please see our website at www.wiley.com. The right of the author to be identified as the author of this work has been asserted in accordance with the Copyright, Designs and Patents Act 1988. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any means, electronic, mechanical, photocopying, recording or otherwise, except as permitted by the UK Copyright, Designs and Patents Act 1988, without the prior permission of the publisher.
    [Show full text]
  • Extracting and Mapping Industry 4.0 Technologies Using Wikipedia
    Computers in Industry 100 (2018) 244–257 Contents lists available at ScienceDirect Computers in Industry journal homepage: www.elsevier.com/locate/compind Extracting and mapping industry 4.0 technologies using wikipedia T ⁎ Filippo Chiarelloa, , Leonello Trivellib, Andrea Bonaccorsia, Gualtiero Fantonic a Department of Energy, Systems, Territory and Construction Engineering, University of Pisa, Largo Lucio Lazzarino, 2, 56126 Pisa, Italy b Department of Economics and Management, University of Pisa, Via Cosimo Ridolfi, 10, 56124 Pisa, Italy c Department of Mechanical, Nuclear and Production Engineering, University of Pisa, Largo Lucio Lazzarino, 2, 56126 Pisa, Italy ARTICLE INFO ABSTRACT Keywords: The explosion of the interest in the industry 4.0 generated a hype on both academia and business: the former is Industry 4.0 attracted for the opportunities given by the emergence of such a new field, the latter is pulled by incentives and Digital industry national investment plans. The Industry 4.0 technological field is not new but it is highly heterogeneous (actually Industrial IoT it is the aggregation point of more than 30 different fields of the technology). For this reason, many stakeholders Big data feel uncomfortable since they do not master the whole set of technologies, they manifested a lack of knowledge Digital currency and problems of communication with other domains. Programming languages Computing Actually such problem is twofold, on one side a common vocabulary that helps domain experts to have a Embedded systems mutual understanding is missing Riel et al. [1], on the other side, an overall standardization effort would be IoT beneficial to integrate existing terminologies in a reference architecture for the Industry 4.0 paradigm Smit et al.
    [Show full text]
  • Fast Setup and Integration of ABAQUS on HPC Linux Cluster and the Study of Its Scalability
    Fast Setup and Integration of ABAQUS on HPC Linux Cluster and the Study of Its Scalability Betty Huang, Jeff Williams, Richard Xu Baker Hughes Incorporated Abstract: High-performance computing (HPC), the massive powerhouse of IT, is now the fastest-growing sector in the industry, especially for the oil and gas industry, which has outpaced other US industries in integrating HPC into its critical business functions. HPC can offer greater capacity and flexibility to allow more advanced data analysis, which usually cannot be handled by individual workstations. In April 2008, Baker Oil Tools installed a Linux Cluster to boost its finite element analysis and computational fluid dynamics application performance. Platform Open Cluster Stack (OCS) has been implemented as cluster and system management software and load-sharing facility for high-performance computing (LSF-HPC) as job scheduler. OCS is a pre-integrated, modular and hybrid software stack that contains open-source software and proprietary products. It is a simple and easy way to rapidly assemble and manage small- to large-scale Linux-based HPC clusters. 1. Introduction of HPC A cluster is a group of linked computers working together closely so they form a single computer. Depending on the function, clusters can be divided into several types: high-availability (HA) cluster, load- balancing cluster, grid computing, and Beowulf cluster (computing). In this paper, we will focus on the Beowulf-type high-performance computing (HPC) cluster. Driven by more advanced simulation project needs and the capability of modern computers, the simulation world relies more and more on HPC. HPC cluster has become the dominating resource in this area.
    [Show full text]
  • Appro Xtreme-X Computers with Mellanox QDR Infiniband
    Intel Cluster Ready Appro Xtreme-X Computers with Mellanox QDR Infiniband AA PP PP RR OO II NN TT EE RR NN AA TT II OO NN AA LL II NN CC Steve Lyness Vice President, HPC Solutions Engineering [email protected] Company Overview :: Corporate Snapshot • Computer Systems manufacturer founded in 1991 • From OEM to branded products and solutions in 2001 – Headquarters in Milpitas, CA – Regional Office in Houston, TX – Global Presence via International Resellers and Partners – Manufacturing and Hardware R&D in Asia – 100+ employees worldwide • Leading developer of high performance servers, clusters and supercomputers. – Balanced Architecture – Delivering a Competitive Edge – Shipped over thousands of clusters and servers since 2001 – Solid Growth from 69.3M in 2006 to 86.5M in 2007 • Target Markets: - Electronic Design Automation - Financial Services - Government / Defense - Manufacturing - Oil & Gas *Source: IDC WW Quarterly PC Tracker SLIDE | 2 SLIDE A P P R O H P C P R E S E N T A T I O N Company Overview :: Why Appro High Performance Computing Expertise – Designing Best in Class Supercomputers Leadership in Price/Performance Energy Efficient Solution Best System Scalability and Manageability High Availability Features SLIDE | 3 SLIDE A P P R O H P C P R E S E N T A T I O N Company Overview :: Our Customers SLIDE | 4 SLIDE A P P R O H P C P R E S E N T A T I O N Company Overview :: Solid Growth +61% Compound Annual Revenue Growth $86.5M $69.3M $33.2M 2005 2006 2007 SLIDE | 5 SLIDE A P P R O H P C P R E S E N T A T I O N HPC Experience ::
    [Show full text]
  • GPU Developments 2017T
    GPU Developments 2017 2018 GPU Developments 2017t © Copyright Jon Peddie Research 2018. All rights reserved. Reproduction in whole or in part is prohibited without written permission from Jon Peddie Research. This report is the property of Jon Peddie Research (JPR) and made available to a restricted number of clients only upon these terms and conditions. Agreement not to copy or disclose. This report and all future reports or other materials provided by JPR pursuant to this subscription (collectively, “Reports”) are protected by: (i) federal copyright, pursuant to the Copyright Act of 1976; and (ii) the nondisclosure provisions set forth immediately following. License, exclusive use, and agreement not to disclose. Reports are the trade secret property exclusively of JPR and are made available to a restricted number of clients, for their exclusive use and only upon the following terms and conditions. JPR grants site-wide license to read and utilize the information in the Reports, exclusively to the initial subscriber to the Reports, its subsidiaries, divisions, and employees (collectively, “Subscriber”). The Reports shall, at all times, be treated by Subscriber as proprietary and confidential documents, for internal use only. Subscriber agrees that it will not reproduce for or share any of the material in the Reports (“Material”) with any entity or individual other than Subscriber (“Shared Third Party”) (collectively, “Share” or “Sharing”), without the advance written permission of JPR. Subscriber shall be liable for any breach of this agreement and shall be subject to cancellation of its subscription to Reports. Without limiting this liability, Subscriber shall be liable for any damages suffered by JPR as a result of any Sharing of any Material, without advance written permission of JPR.
    [Show full text]
  • High Performance Computing
    C R C P R E S S . T A Y L O R & F R A N C I S High Performance Computing A Chapter Sampler www.crcpress.com Contents 1. Overview of Parallel Computing From: Elements of Parallel Computing, by Eric Aubanel 2. Introduction to GPU Parallelism and CUDA From: GPU Parallel Program Development Using CUDA, by Tolga Soyata 3. Optimization Techniques and Best Practices for Parallel Codes From: Parallel Programming for Modern High Performance Computing Systems, by Pawel Czarnul 4. Determining an Exaflop Strategy From: Programming for Hybrid Multi/Manycore MMP Systems, by John Levesque, Aaron Vose 5. Contemporary High Performance Computing From: Contemporary High Performance Computing: From Petascale toward Exascale, by Jeffrey S. Vetter 6. Introduction to Computational Modeling From: Introduction to Modeling and Simulation with MATLAB® and Python, by Steven I. Gordon, Brian Guilfoos 20% Discount Available We're offering you 20% discount on all our entire range of CRC Press titles. Enter the code HPC10 at the checkout. Please note: This discount code cannot be combined with any other discount or offer and is only valid on print titles purchased directly from www.crcpress.com. www.crcpress.com Copyright Taylor & Francis Group. Do Not Distribute. CHAPTER 1 Overview of Parallel Computing 1.1 INTRODUCTION In the first 60 years of the electronic computer, beginning in 1940, computing performance per dollar increased on average by 55% per year [52]. This staggering 100 billion-fold increase hit a wall in the middle of the first decade of this century. The so-called power wall arose when processors couldn't work any faster because they couldn't dissipate the heat they pro- duced.
    [Show full text]
  • Spotlight on Ansys 12.0
    TM EXCELLENCE IN ENGINEERING SIMULATION ADVANTAGEVOLUME III ISSUE 1 2009 SPOTLIGHT ON ANSYS 12.0 FRAMEWORK MULTIPHYSICS HIGH-PERFORMANCE PAGE 6 PAGE 11 COMPUTING PAGE 25 EDITORIAL Engineering Simulation: t pa Needed Now © iStockphoto.com/Atra More Than Ever In a tough economy, forward-thinking companies are investing in leading-edge simulation technology to drive top-line revenue growth and bottom-line savings. Time and cost benefits of engineering simulation are this simulation method has the potential to reduce crack well documented. Predicting product performance and growth analysis time by over 90 percent compared determining optimal solutions early in the design phase help with manual methods. The productivity gain will enable to avoid late-stage problems and to eliminate trial-and-error engineers to analyze more designs annually, thus keeping testing cycles that drive up costs and bog down schedules. up with increased demand for turbochargers around the Simulation enables engineers to perform what-if studies world and strengthening the company’s leadership and to compare alternatives, processes that otherwise position in this competitive industry sector. would be impractical. Indeed, bottom-line savings are The prediction method is based on improved fracture one key benefit that prompts most companies to implement mechanics capabilities for calculating J integrals, one of simulation, and are most readily quantified in return-on- the many enhancements in ANSYS 12.0. Previewed in the investment calculations. Spotlight section of this issue, the release is a milestone A second, and potentially greater, benefit is boosting for the software supplier and a huge step forward for the top-line revenue growth.
    [Show full text]
  • Increasing Productivity with PRIMERGY X86 HPC from Fujitsu
    Increasing Productivity with PRIMERGY x86 HPC from Fujitsu Wolfgang Gentzsch HPC Consultant Fujitsu Technology Solutions (FTS) Copyright 2012 FUJITSU From Innovation to HPC Solutions for our Customers Wolfgang Gentzsch HPC Consultant Fujitsu Technology Solutions (FTS) Copyright 2012 FUJITSU Fujitsu & preDiCT: In Silico Drug Testing Real time simulation of cardiac electrical activation on a realistic whole human heart mesh Half of the drugs that enter clinical testing fail at that stage Often from side-effects in the heart The European project preDiCT was set up to eliminate such unsuitable drugs early in the R&D pipeline to eliminate wasted time and expenditure Copyright 2012 FUJITSU Innovation reduces time to solution January 2009 Now • Application is now 80000x faster • One month to calculate 1 s of activity has become just a few seconds • Simulator now a valuable tool for the pharmaceutical industry • Eventually replace in vivo testing with in silico testing Copyright 2012 FUJITSU Open Innovation: Disaster Mitigation Earthquake/Seabed Data Tohoku, Tokyo Universities Ocean Models Imperial College London, ANU Open Numerical Libraries www.openpetascale.org Multicore Parallel Computer 4 Copyright 2012 FUJITSU Fujitsu‘s Approach for the HPC Market PRIMEHPC FX10 Supercomputer Divisional Departmental x86 HPC Cluster Workgroup Work Group Copyright 2012 FUJITSU Modular growth potential towards … RX200 CX400 Workgroup / departmental …capacity Scalability Density Energy Costs Co-processor support BX400 Flexibility to address all kinds of customer
    [Show full text]