SPRING 2018 Meptec.Org Meptec.Org SPRING 2018 MEPTEC REPORT 13 Jim Walker WLP Concepts EQUIPMENT LEASING and FINANCE ASSOCIATION

2018 SPRING A Quarterly Publication of The Microelectronics Packaging & Test Engineering Council Volume 22, Number 1

A Special One-Day Event Presented By MEPTEC NEW GENERATION FLEXIBLE HYBRID ELECTRONICS Cost-effective Assembly & Medical Packaging Technologies Electronics April 26 • San Jose, CA page 29 Symposium 2018 May 16 & 17 • Dallas, TX page 29 MEPTEC MEMBER COMPANY PROFILE For more than 20 years, Intevac has continuously built on their extensive knowledge of thin film, vacuum processing technologies and sensor design to develop products that align with their customers’ needs. page 14

INSIDE THIS ISSUE

Economic Upturn, Working with all The AI Factory – The future, most Tax Reform and material vendors Some refer to this important advances Business Confi- is the key to ball- as “Industry 4.0”, in the packaging dence Support attach/bumping some as “Machine business belong to Strong Investment process success. to Machine”. the OSATs. 12 17 22 SPRING34 2011 MEPTEC Report 3

2018 The MEPTEC Report is a Publication of the Microelectronics Packaging & Test Engineering Council 315 Savannah River Dr., Summerville, SC 29485 Tel: (650) 714-1570 Email: [email protected] A Quarterly Publication of The Microelectronics Packaging & Test Engineering Council Volume 22, Number 1 SPRING Publisher MEPCOM LLC Editor Bette Cooper Art Director/Designer Gary Brown Sales Manager Gina Edwards 2018

SPRING ON THE COVER A Quarterly Publication of The Microelectronics Packaging & Test Engineering Council Volume 22, Number 1

A Special One-Day Event Presented By MEPTEC NEW GENERATION MEPTEC is pleased to present two events in Q2 2018. A special one-day event FLEXIBLE HYBRID MEPTEC Advisory Board ELECTRONICS titled “New Generation Flexible Hybrid Electronics – Cost-effective Assembly Cost-effective Assembly & Medical Packaging Technologies Electronics and Packaging Technologies” will be held on Thursday, April 26 at the NextFlex April 26 • San Jose, CA Board Members page 29 Symposium 2018 Facility in San Jose, CA. The second event, “Medical Electronics Symposium May 16 & 17 • Dallas, TX Ivor Barber AMD page 29 MEPTEC MEMBER COMPANY PROFILE 2018”, is a two-day event presented by INEMI, MEPTEC, and SMTA, and will For more than 20 years, Intevac has continuously built on their extensive knowledge of thin film, vacuum processing technologies and sensor design to develop products that align with their customers’ needs. Jack Belani Indium Corporation page 14 be held on Wednesday and Thursday, May 16th and 17th at the University of

INSIDE THIS ISSUE Economic Upturn, Working with all The AI Factory – The future, most Texas at Dallas, in Dallas, TX. For more information on both events visit the Tax Reform and material vendors Some refer to this important advances Business Confi- is the key to ball- as “Industry 4.0”, in the packaging SemiOps dence Support attach/bumping some as “Machine business belong to Joel Camarda Strong Investment process success. to Machine”. the OSATs. 12 17 22 SPRING34 2011 MEPTEC Report 3 MEPTEC website at www.meptec.org. Jeff Demmin Booz Allen Hamilton

Douglass Dixon Henkel Corporation ANALYSIS – The Equipment Leasing and Finance Asso- ANALYSIS equipment and software investment verticals, including agriculture, air- for equipment spending this year than Top 10 Equipment Acquisition Trends for 2018 forecast of 9.1 percent. craft, construction, industrial, trucks, in previous ones, businesses will have computers and software. to monitor ongoing issues throughout Economic Upturn, Elevated Business Confidence and Tax Reform 3. Tax reform will help unleash pent- 2018. Tax reform aside, concern to Support Strong Investment up demand by businesses for new 7. Businesses will ramp up efforts to about partisan politics in Washington SMART Microsystems equipment. fulfill requirements of new account- may affect the confidence of the busi- Nick Leonardi ing rules for their leased equipment. ness community over time. The resi- Long awaited corporate tax cuts will dential housing market may not get a ciation which represents the $1 trillion equipment finance have businesses pulling the trigger on With the new lease accounting stan- hoped-for recovery in light of the THE EQUIPMENT LEASING AND the equipment acquisitions they had dard taking effect beginning in 2019, Fed’s planned interest rate increases Finance Association (ELFA) which rep- been putting off. Multiple measures businesses with leases on the books and home prices rising faster than 12 resents the $1 trillion equipment finance of business confidence, including the will be focusing on compliance in buyers’ incomes. Major curbs on sector, has revealed its Top 10 Equip- Monthly Confidence Index for the earnest this year. In response, they immigration could be a headwind to ment Acquisition Trends for 2018. Given Equipment Finance Industry, back will find that equipment finance pro- growth through labor and skills short- U.S. businesses, nonprofits and govern- the probability for increased equip- viders are developing strategies and ages in several industries, including ment agencies will spend over $1.6 tril- ment spending. products that are beneficial to lessees agriculture, construction and hospital- lion in capital goods or fixed business under the new framework. ity. Finally, U.S. mid-term election PPM Associates sector, has revealed its Top 10 Equipment Acquisition Trends for investment (including software) this 4. Higher interest rates will loom as results in November could impact Phil Marcoux year, financing a majority of those assets, the economy grows and tax reform 8. Financing options and services for future federal legislation affecting these trends impact a significant portion is enacted. equipment acquisitions will be businesses. of the U.S. economy. In 2018, businesses more innovative and customer are expected to make their largest capital A rising interest rate environment driven. For more information about the Top investments since 2012. won’t deter investment in most key 10 Trends, please contact Amy Vogt at ELFA President and CEO Ralph equipment verticals, but businesses A changing business landscape and [email protected]. For forecast data Petta said, “Equipment acquisition is a will keep informed on Fed rate hikes. disruptive technologies will drive regarding equipment investment and 2018. Given U.S. businesses, nonprofits and government agencies key driver of supply chains across all With the improving economy and its equipment finance companies to meet capital spending in the United States, U.S. manufacturing and service sectors. accompanying rise in inflation along their customers’ unique demands. see the Equipment Leasing & Finance Equipment leasing and financing provide with a substantial increase in the Expect more tailored financial solu- Foundation’s 2018 Equipment Leasing & the source of funding for a majority national debt owing to the new tax tions to help companies innovate Finance U.S. Economic Outlook at www. Xilinx ◆ Gamal Refai-Ahmed of U.S. businesses – 8 out of 10 – to legislation, count on three and possi- and solve business challenges, such elfonline.com acquire the productive assets they need bly four rate increases in 2018. as metered usage that enables cus- to operate and grow. We are pleased to tomers to pay only for what they con- Reprinted with permission from the Equipment again provide the Top 10 Equipment 5. Technological advances in equip- sume. Wider use of electronic docu- Leasing and Finance Association. Acquisition Trends in order to assist ment will attract businesses look- ments and e-signatures for greater will spend over $1.6 trillion in capital goods or fixed business businesses in understanding the market ing to improve efficiencies. convenience will become increasingly About ELFA environment and planning their acquisi- available. tion strategies.” New technology will be even more The Equipment Leasing and Finance 9. Trade issues will pose headwinds ELFA distilled recent research data, irresistible as businesses look for Association (ELFA) is the trade associa- including the Equipment Leasing & affecting global demand for U.S. ways to increase efficiencies and tion that represents companies in the Finance Foundation’s 2018 Equipment profitability as they take advantage business exports. $1 trillion equipment finance sector, Leasing & Finance U.S. Economic Out- of new market opportunities in the ASE (US) Inc. which includes financial services com- Rich Rice look, industry participants’ expertise, and growing economy. Attractive financ- Businesses seeking equipment to pro- member input from ELFA meetings and ing options will make the latest duce export goods will be closely panies and manufacturers engaged in investment this year, financing a majority of those assets, these conferences in compiling the trends. equipment that may have been con- watching potential impacts on foreign financing capital goods. ELFA mem- sidered previously unaffordable even trade. A gradual strengthening in the bers are the driving force behind the ELFA forecasts the following Top 10 more accessible. dollar since 2017, if maintained, growth in the commercial equipment Equipment Acquisition Trends for could be a headwind to trade exports. finance market and contribute to capi- 2018: 6. Key equipment verticals will Tensions could also escalate as U.S. tal formation in the U.S. and abroad. cal upturn in the U.S. economy, due Although the growth of financed continue to rebound in 2018. trade negotiations on NAFTA pro- Its 575 members include indepen- 1. Capital spending will have its in part to the strongest global econo- equipment acquisitions last year did ceed and the Trump administration dent and captive leasing and finance strongest performance in six years. my in over a decade, will contribute not exceed overall equipment and With economic growth drivers, in- continues to take a hardline stance on companies, banks, financial services to a healthy business investment trend software investment growth, equip- cluding persistent business optimism, trade relations with China. trends impact a significant portion of the U.S. economy. corporations, broker/packagers and STATS ChipPAC Following a significant improvement before potentially waning toward year ment finance industry indicators point stable credit conditions and healthy Scott Sikorski in equipment and software invest- end. to increased financing of equipment global demand, the solid investment 10. External “wild cards” will factor investment banks, as well as manufac- ment in 2017 over 2016, investment acquisitions in 2018. The few persist- growth pattern from 2017 will con- into equipment acquisition turers and service providers. For more will continue robust growth in 2018. 2. Look for strengthening positive ing industry headwinds should be tinue for most equipment verticals. decisions. information, please visit www.elfaon- Elevated business confidence, fewer momentum in financed equipment outweighed by a historically high Investment is expected to remain line.org. regulations and a broad-based cycli- acquisitions. propensity to finance and a healthy steady or strengthen in equipment Despite a more favorable environment

12 MEPTEC REPORT SPRING 2018 meptec.org meptec.org SPRING 2018 MEPTEC REPORT 13 Jim Walker WLP Concepts EQUIPMENT LEASING AND FINANCE ASSOCIATION

Special Advisors PROFILE PROFILE – Intevac, Inc. was founded in 1991 and has two For the Thin-film Equipment business in particular, Intevac’s revenues were up 75% year-over-year, and Intevac recognized revenue on every one of its product platforms during the year: the 200 Lean®, the VERTEX®, the MATRIX®, and the N-Able Group International DELIVERING ADVANCED THIN FILM SOLUTIONS SINCE 1991 ® Ron Jones ENERGi . At 2017 year-end, backlog for Intevac’s thin-film equipment business increased for the fifth straight year, rising businesses: Thin-film Equipment, and Photonics. In their to $52 million. A big part of Intevac’s growth story is its VERTEX product and the progress 14 Intevac has made deploying protective coatings into the display cover panel market. The VERTEX deposits Optical Grade Diamond-Like Carbon (oDLC) as a protective coating for display cover Gary Smith EDA panels, like the ones found on today’s Thin-film Equipment business, Intevac is a leader in the design and Mary Olsson smartphones and other consumer electronic devices – wearables, camera displays, etc. In addition, Intevac has seen Sam- sung, and now Apple, transition their Intevac MATRIX PVD for Fan-Out Panel Level Packaging and Fan-Out Wafer Level Packaging smartphones to glass back cover panels, primarily to enable wireless charg- vac’s MATRIX PVD system, are rou- was awarded best paper of the IWLPC ing. This transition is clearly driving tinely used in the silicon PV cell industry 2017 Advanced Manufacturing and Test development of high-productivity thin-film processing systems. In- increased interest in oDLC by multiple owing to the demonstrated usefulness Track. companies, as many cell phone makers of such systems in the High Volume Fan-out packaging is a new market follow these industry leaders, resulting Manufacturing (HVM) of silicon PV where Intevac’s advantages in high pro- Intevac MATRIX® PVD in the surge of interest Intevac saw in the cells, where throughputs of thousands of ductivity thin-film processing solutions second half of 2017 on back cover glass wafers per hour are expected, and where provide a compelling advantage over applications. Cost-of-Ownership (COO) differences of current solutions being used in the pack- In the hard disk drive market, Intevac pennies per PV wafer can make or break aging industry. In particular, Intevac’s Intevac, Inc. was founded in 1991 and booked 13 of it 200 Lean PVD systems a manufacturer. It turns out that the met- PVD solution reduces the cost of the has two businesses: Thin-film Equipment, and Photonics. over the last six quarters. Along with als being sputter deposited for silicon PV redistribution layer barrier/seed deposi- tevac Photonics is a technology leader in the development and Honorary Advisors these orders for new systems, Intevac cells are typically some combination of tion by up to two-thirds compared to has also witnessed increasing strength in Ti, TiW, Al, and Cu – the same materials existing process technology. The Intevac INTEVAC THIN-FILM EQUIPMENT display cover panel applications, and, INTEVAC FY2017 BUSINESS UPDATE system upgrade activity from its custom- that the Advanced Packaging industry MATRIX also presents a cost-effective, In their Thin-film Equipment busi- now, the advanced packaging market. Intevac’s full-year FY2017 financial ers of record, where the installed base uses for barrier/seed structures in Cu simple migration path for OSATs as they ness, Intevac is a leader in the design and results were consistent with the strong of 200 Lean systems is being modified Redistribution Layers (RDL). move from wafer to panel level process- development of high-productivity thin- INTEVAC PHOTONICS growth and profitability objectives set by primarily to add additional processing ing; the same MATRIX platform can be film processing systems. Their produc- Intevac Photonics is a technology senior management. Intevac returned to chambers and to upgrade to the newest MATRIX PVD FOR FAN-OUT PACKAGING configured for today’s 300 millimeter tion-proven platforms are designed for leader in the development and manufac- profitability in FY2017, and it exceeded PVD technologies. Intevac expects it will Intevac announced at the Needham wavers and for 600mm x 600mm panels, high volume manufacturing of substrates ture of compact, cost-effective, high-sen- earnings guidance. 2017 was another see continuing activity in the HDD busi- Growth conference, in mid-January or larger. manufacture of compact, cost-effective, high-sensitivity digital-op- with precise thin film properties. sitivity digital-optical sensors, cameras pivotal year for Intevac, in which it con- ness in the foreseeable future, providing 2018, its successful efforts developing Concurrent with its internal product Intevac is the world’s leading supplier and systems for the defense industry, tinued to execute its strategy to grow the Intevac with a solid base business in its the MATRIX PVD system for fan-out development process optimization activi- of magnetic media processing systems, based on proprietary Electron Bom- Thin-film Equipment business, based on core HDD market. wafer level packaging (FOWLP) and ties in fan-out packaging, Intevac is also Sunsil ® Seth Alavi having shipped more than 220 manu- barded Active Pixel Sensors (EBAPS ) substrate independent thin-film process- The other major thin-film equipment fan-out panel level packaging (FOPLP) actively engaged with Tier-1 OSATs, facturing systems to Hard Disk Drive manufactured with Intevac’s advanced ing platforms serving multiple large mar- platform Intevac offers is the Intevac applications. Starting at IWLPC 2017 where it has ongoing activity for both (HDD) customers world-wide. More thin film technology. kets. MATRIX, initially sold for silicon photo- (October 2017), and continuing with wafer level and panel level demonstra- than 60% of the world’s magnetic media Designed for the capture and dis- FY2017 was Intevac’s third straight voltaic (PV) cell applications. While the EPTC 2017, SEMICON Japan 2017, tions and evaluations. produced today is produced on Intevac play of low-light images, applications year of growth, in both revenues and VERTEX is a substrate independent ver- SEMICON Korea 2018, DPC 2018, and The barrier/seed layer processes Inte- systems. for Intevac’s industry-leading systems orders. New orders were $108 million, tical carrier based platform, the MATRIX beyond, Intevac has been sharing techni- vac developed for fan-out wafer level tical sensors, cameras and systems for the defense industry. Intevac’s thin-film technology solu- include digital night vision and long up 11% from 2016, and revenues were is a horizontal, carrier-based platform cal details about FOWLP and FOPLP packaging and fan-out panel level pack- tions improve performance and through- range target identification. Intevac is the up 41% from 2016, driven by strong suitable for multiple end-market applica- sputter deposition processes for barrier/ aging redistribution layer formation use put, and continue to expand into addi- sole source provider of integrated digital growth in both Intevac’s core HDD mar- tions. seed layer films in Cu RDL. And the a process sequence of degas – pre-clean tional markets – including solar and adja- imaging systems for most U.S. military ket as well as in its new Thin-film Equip- Carrier-based linear transport sputter advanced packaging industry has noticed: – Ti PVD – Cu PVD. Each of the process cent thin film deposition applications, night vision programs. ment growth initiatives. deposition systems, for example Inte- Intevac’s presentation at IWLPC 2017 modules on Intevac’s linear transport

Gary Catlin SPRING 2018 meptec.org meptec.org SPRING 2018 14 MEPTEC REPORT MEPTEC REPORT 15 INTEVAC, INC. Rob Cole

Skip Fehr PACKAGING – Advanced packaging technology solutions PROFILE PACKAGING system is optimized to accommodate high throughputs and short takt times Challenges of Ball-Attach Process Using Flux for in order to produce Cost of Ownership advantages in fan-out packaging over the Fan-Out Wafer/Panel Level (FOWLP/PLP) Packaging per-wafer or per-panel costs of the PVD Elle Technology cluster tools that are the current Process Sze-Pei Lim, Semiconductor Product Manager - Southeast Asia, Indium Corporation; Anna Gualtieri of Record. Dr. Yan Liu, Research Chemist, Indium Corporation; John H. Lau, Senior Technical Advisor, The MATRIX PVD degas module ASM Pacific Technology; and Li Ming, R&D Director, ASM Pacific Technology in the semiconductor industry are driven by the require- has a significant amount of vacuum pumping capacity, including Meissner coils for dedicated pumping of water 17 vapor evolving from epoxy mold compound substrates during heated degas. ADVANCED PACKAGING TECHNOLOGY The Intevac pre-clean module uses a Intevac MATRIX® PVD solutions in the semiconductor industry gridded ion beam source that produces are driven by the requirements of end- a net electrically neutral impingement use applications, including the need for ments of end-use applications, including the need for smaller foot- of well-controlled energetic Argon ions transport system are comparable to cur- 300mm fan-out wafers to running car- smaller footprint area, lower package ICINTEK on the wafer (or panel) to be cleaned. rent industry POR results, and the cost of riers with large panels for fan-out panel height, better signal integrity, higher Marc Papageorge And for Ti and Cu PVD, Intevac uses its ownership results from the in-line system level packaging; the switch is made sole- processor/memory bandwidth, and more. Linear Scanning Magnet Array (LSMA) are considerably lower than today’s clus- ly by changing the carrier itself, without In recent years, the fan-out wafer level magnetron, which achieves much higher ter tool POR for RDL barrier/seed layers making any in-vacuum adjustments for packaging (FOWLP) platform has target utilizations than can be had with a in fan-out packaging. either the wafers or the panels. emerged as a suitable advanced packag- static planar magnetron. By using dedicated wafer or panel For more information about Intevac, ing technology that can fulfill most of The Ti and Cu film uniformity, sheet carriers in the linear transport MATRIX please call 408-986-9888, or visit the these requirements. Some of its advan- resistance, and adhesion results from PVD system, it’s an easy change to go Intevac website at www.intevac.com. ◆ tages include: 1) No packaging substrate print area, lower package height, better signal integrity, and more. Intevac’s MATRIX PVD in-line linear from running carriers holding multiple which enables ultra-thin, smaller form factor and lighter packages; 2) Wafer fab-like fabrication process to ensure higher I/O density, reduce interconnect length, and achieve higher processing speed; 3) Enhanced heterogeneous integration solutions, for example, system-in- package (SIP) and package-on-package Figure 1. Typical process flow for chip-first and die-down FOWLP. (PoP); 4) lower power consumption; 5) In recent years, the fan-out wafer level packaging (FOWLP) plat- lower cost; and many more. In Memoriam There are three primary process flows for different variations of FOW/ PLP. The most common variation is the conventional chip-first and die-down MORE THAN 350 HIGHLIGHTS process—the eWLB technology patented TECHNICAL PAPERS n 41 technical sessions COVERING: including: by Infineon and STATS ChipPAC (Figure 1). The second is TSMC’s integrated fan- Fan-Out WLP & CSP • 5 interactive 3D & TSV Processing presentation sessions, out (InFO) process, which is chip-first form has emerged as a suitable advanced packaging technology Don’t Miss Out on the including one featuring and die-up process (Figure 2). The third Heterogeneous Integration student presenters Industry’s Premier Event! Fine Pitch Flip-Chip primary process flow is the RDL first n 18 CEU-approved and chip last process for even more strin- The only event that MEMS & Sensors Professional Development Advanced Substrates Courses gent line/space (L/S) requirements (L/ encompasses the S<2µm/2µm), as shown in Figure 3. An Bance Hom Advanced Wire Bonding n Technology Corner Exhibits, diverse world of integrated Flexible & Wearable Devices featuring more than 100 example of this includes Renesas’s Sys- industry-leading vendors systems packaging. RF Components tem in Wafer Level Package (SiWLP), Automotive Electronics n 6 special invited sessions and Amkor’s Si Wafer Integrated Fan- that can fulfill most of these requirements. For more information, visit: Harsh Environment n Several evening receptions Out Technology (SWIFT), Si-less Inte- Bio/Medical Devices n 3 conference luncheons grated Module (SLIM) technology. www.ectc.net Even with different variations of Conference Sponsors: Thermal/Mech Simulation n Multiple opportunities for Interconnect Reliability networking FOW/PLP process flows, before pack- Optical Interconnects n Great location age singulation, typically flux is printed on the wafer or panel, followed by a ball drop process, reflow, and cleaning Figure 2. Typical process flow for chip-first and die-up FOWLP. INDIUM CORPORATION AND ASM PACIFIC TECHNOLOGY 16 MEPTEC REPORT SPRING 2018 meptec.org meptec.org SPRING 2018 MEPTEC REPORT 17 Contributors

William Boyce SMART Microsystems Ltd. ASSEMBLY ASSEMBLY – Some refer to this as “Industry 4.0” some as Status of Standards Efforts The Artificial Intelligence Factory In addition to the Hermes efforts The Hermes Standard – Why does it show such great promise? there are other industry driven efforts • 17 leading manufacturers have already joined the initiative: ASM, ASYS, CYBEROPTICS, ERSA, Becomes a Reality to create uniform communication KIC, KOH YOUNG, MIRTEC, MYCRONIC, NUTEK, OMRON, PARMI, REHM, SAKI, SMT, VISCOM, standards. The FDT Group (www. YAMAHA and YJ LINK. Henkel Electronic Materials LLC fdtgroup.org, Belgium) became an It’s an open, modern standard: The Hermes Standard is based on TCP/IP- and XML, is com- • Jinu Choi official association in 2005 by a num- pletely open and therefore free of charge for any manufacturer and all users. Phil Marcoux ber of leading automation firms: ABB, PPM Associates • It’s got a solid time and work schedule: the initiative has an ambitious and clearly defined Endress+Hauser, Invensys (now Schnei- time line. By the end of June, the specifications for the standard will be presented in the first “Machine to Machine” (M2M), others as the more unset- der Electric), Metso, and Siemens. In version. And at this year’s productronica, the active manufacturers intend to be ready to show 2008 they joined with the OPC Foun- first solutions for cross-vendor communication based on the standard. dation (www.opcfoundation.org) “to http://www.smart-smt-factory-forum.com/general/progress-manufacturers-agree-on-open-standard-for-m2m- 22 provide greater access to information SOME REFER TO THIS AS “INDUSTRY throughout the enterprise by making communication-for-smt-assembly-lines/#comment-4394 4.0” some as “Machine to Machine” device-specific information available Henkel Electronic Materials LLC (M2M), others as the more unsettling via the FDT/OPC Unified Architecture Figure 2. Factory or Industry 4.0 - The Basic Concept. Doug Dixon “Dark Factory”. Whatever we call it information model.[6] SAP and Bosch the purpose is still the same, i.e., to joined efforts in late 2016 to promote a tling “Dark Factory”. Whatever we call it the purpose is still the enable the machines doing our IC and different standard. SMT assembly to communicate and do Machines talking to machines? production without the need for human Where are the humans? intervention. While not a new concept, Humans while essential for critical the idea of being able to quickly report decision skills have become a liability manufacturing problems and status intel- when near instantaneous decisions are ligently has always been a goal of any- needed to maintain high flows of pro- Feldman Engineering Corp. one striving to operate a quality, efficient duction. same, i.e., to enable the machines doing our IC and SMT assembly Ira Feldman factory. In W. Edward Deming’s book There will always be a need for “Out of Crisis” first published in 1982 human interaction to program and man- he lists “break down barriers between age and maintain a 4.0 factory. But the areas” as one of his guiding fourteen immense data storage and data access points to achieve total quality manage- from Big Data sources and Cloud Com- ment.[1][2] puting (See Figure 3) combined with Profits and cost reductions are a driv- machine learning capability are replacing factor for Industry 4.0 particularly in ing many of the human tasks performed industries routinely characterized with on current SMT and IC assembly lines. to communicate with each other and do production without the Test, Assembly & Packaging TIMES razor thin profit margins as electronic As cited by the PWC study[3], AI assembly. In a study announced last year Figure 1. Siemans Amberg Germany SMT Facility. Source: Siemans and M2M within the electronics indus- Ron Iscoff Figure 3. The IPC’s 2-17 Connected Factory Initiative Subcommittee is developing a machine from PWC, “managers surveyed around try offer very high rates of return on data interface standard, “Connected Factory Exchange or CFX”. [5] the world expect to achieve cost reduc- the 2016 IPC APEX show even though rection and control. One example in IC investment. Our industry is very capital tions of on average 3.6% per year and it was first proposed by German industry assembly could be wire no sticks due to intensive and any improvements in yield additional revenue of around 2.9% annu- in 2003[4][5] (see Figure 1). improperly etched pads. The 4.0 factory and material costs translate into almost [2] http://asq.org/learn-about-quality/total- open-standards/29659189157150 ally. In absolute terms, this corresponds However a new communications could be capable of quickly identifying immediate profits. However, our industry quality-management/overview/deming-points. [8] https://derinet.vontobel.com/CH/ html to $US 421 billion in year-on-year cost effort, The Hermes Standard, seems to the bad die lot and replace it with new has always been proud of its competitive Download/AssetStore/cfebecbf-54d6-4a84- and a simultaneous yearly increase in have enough support to give it broad die. On an SMT line an example would zeal. As a result standards, even simple [3] http://pwc.blogs.com/press_room/2016/04/ ae3e-3aae9fe21f45/Industry%204%200%20 need for human intervention. turnover of $US 493 billion.”[3] acceptance. The Hermes is being driven be solder opens which the post reflow ones take a lot of time and patience. industry-40-uk-and-global-companies-to- Performance-Index_EN.pdf A perennial obstacle for the M2M from within the SMT assembly commu- inspection station may pinpoint as invest-over-us-900-billion-per-year-to- N-Able Group International become-truly-digital.html Ron Jones factory has been a communication stan- nity and has gained support from seven- clogged openings on a particular stencil. The Ball is in the Buyer’s Court Phil Marcoux is a business mentor and dard that ties design, materials, assem- teen leading manufacturers. It’s expected Ideally the sensors measure and Just as in the early days of personal [4] https://ipc.mit.edu/research/production/ infrequent angel investor for technology bly, test, and other processes together to gain wider acceptance when the IPC report only the critical elements of the computers when various operating sys- industry-40-what-it-and-what-does-it-mean- businesses. He was co-founder of one the with dissimilar pieces of equipment and SEMI organizations promote greater process they perform. For example, a tems existed and with the current differ- firms first automated SMT factories in 1982, and suppliers. There have been several interest. robotic arm programmed to pick up and ences between Android and IOS systems [5] http://www.zdnet.com/article/germanys- co-founder of one of the first wafer level attempts in prior decades (after all fully Basically all machines in a process place an IC package should sense and the decision is left to the buyer as to vision-for-industrie-4-0-the-revolution-will- packaging companies, book author, world traveler, and sea kayaker. He has been a automated SMT has been around since are equipped with sensors. These sensors report that it successfully picked up, when to jump on the Industry 4.0 train be-digitised member of the MEPTEC Advisory board collect data and are capable of feeding it griped, positioned, and properly placed and which standard to embrace. ◆ [6] http://www.pbsionthenet.net/arti- 1982). One of the more recent efforts to for several years and through several cle/128877/Significant-progress-on-machine- make M2M factories a reality is called both upstream to the potential problem the part. Any other sensors, such as tem- technology inflexion cycles. Phil’s Linkedin References data-interface-standard.aspx ASM Pacific Technology Industry 4.0 of Industrie 4.0 outside of sources as well as into an augmented perature, humidity, remaining parts in link is https://www.linkedin.com/in/phil- PHIL MARCOUX John H. Lau the US. This seems to have only become realty computing center which can help a slot may be too much or unnecessary [1] Demings, “Out of Crisis”. MIT Press, [7] https://www.designnews.com/automation- marcoux-5122a04/ a widely used buzz phrase in the US at make rapid decisions on process cor- information. ISBN-13: 978-0911379013 motion-control/iot-industry-40-encourage-fdt- 22 MEPTEC REPORT SPRING 2018 meptec.org meptec.org SPRING 2018 MEPTEC REPORT 23 PPM ASSOCIATES Sze-Pei Lim Indium Corporation Dr. Yan Liu Indium Corporation Phil Marcoux PPM Associates DEPARTMENTS 8 Coupling & Crosstalk 24 SMART Microsystems News 30 Henkel News Li Ming ASM Pacific Technology 10 Industry Insights 27 Technology Briefs 34 Opinion Dr. Gamal Rafai-Ahmed Xilinx

MEPTEC Report Vol. 22, No. 1. Published quarterly by MEPCOM LLC, 315 Savannah River Dr., Summerville, SC 29485. Copyright 2018 by MEPCOM LLC. All rights reserved. Materials may not be reproduced in whole or in part without written permission. MEPTEC Report is sent without charge to members of MEPTEC. For non-members, yearly subscriptions are available for $75 in the United States, $80US in Canada and Mexico, and $95US elsewhere. For advertising rates and information contact Gina Edwards at 408-858-5493, Fax Toll Free 1-866-424-0130.  MEMBER NEWS Extremely Soft Master Bond MasterSil 170 Gel  INTEVAC EXPANDS BOARD OF DIRECTORS Encapsulant Offers Removability and Optical Clarity Intevac, Inc., a leading supplier of thin-film pro- MASTER BOND MASTERSIL 170 GEL IS cessing systems and digital a two component system with excellent flow- night-vision technologies, ability for potting and encapsulation applica- today announced that two tions. It possesses a low mixed viscosity of new independent direc- 1,000 cps, has a long working life after mixing tors have been named to (2-4 hours for 100 g batch), a low exotherm the Company’s Board of upon cure and is easy to dispense. This solvent Directors. Kevin D. Barber free silicone product does not require exposure of Synaptics, Inc. and to air for cross-linking. It has a convenient one Mark P. Popovich of 3D to one mix ratio by weight and will cure at Glass Solutions will join 75°F or more quickly at elevated temperatures. the Board, while current “MasterSil 170 Gel has excellent optical director Matthew Drapkin clarity” says Rohit Ramnath, Senior Product ly low shrinkage upon cure. This soft, pliable departs, effective imme- Engineer. “It has a low refractive index of 1.42. and compliant silicone system is repairable diately. Additionally, it exhibits outstanding electrical and its hardness penetration is 65 mm. Master- www.intevac.com insulation properties, can cure in thicknesses Sil 170 Gel is available for use in ½ pint, pint, beyond 1 inch, protects sensitive electronic/ quart, gallon and 5 gallon kit containers. Shelf  STATS CHIPPAC’S optical components against thermal stresses. life in original, unopened containers at 75°F is PATENT PORTFOLIO Most notable for MasterSil 170 Gel is the abil- 6 months. RECOGNIZED FOR THE ity it offers to retrieve delicate components Read more about Master Bond optically EIGHTH CONSECUTIVE after cure.” clear adhesives at www.masterbond.com/ YEAR BY IEEE This versatile composition is highly resis- properties/optically-clear-polymer-adhesives or STATS ChipPAC Pte. Ltd. tant to water, is able to withstand severe ther- contact Tech Support. Phone: +1-201-343-8983 ◆ has announced it has been mal cycling without cracking and has extreme- Email: [email protected]. ranked among the world’s top 10 semiconductor equipment manufacturing ASE and Cadence Deliver First System-in-Package companies in the 2017 EDA Solution Tailored for ASE’s High-Performance, Patent Power Scorecards published by IEEE. Advanced IC Package Technologies The 2017 Patent Power ASE and Cadence Design needed to design and verify level integration. Scorecards are based on Systems have announced that ultra-complex SiP packages. To provide a more holis- an analysis of U.S. Pat- they have collaborated to In today’s smart world, tic approach to the design ent and Trademark Office release a System-in-Package innovators are on the front and verification of SiP and records through the end (SiP) EDA solution that line, designing devices that advanced fan- out packages, of 2016. The scorecards addresses the challenges pack greater functionality, ASE and Cadence collaborat- rate the most valuable IP of designing and verifying generate higher and faster ed closely to develop a design portfolios based on several Fan-Out Chip-on-Substrate performance, and consume kit, methodology, and stream- factors including the size (FOCoS) multi-die packages. lower power, all while being lined and automated refer- of an organization’s patent The solution consists of the integrated within shrinking ence flow using enhanced portfolio, quality, impact, SiP-id™ (System-in-Package space parameters. As a result, Cadence® IC packaging and originality and general - intelligent design) design the role of IC packaging in verification tools, all tailored applicability. kit, an enhanced reference electronics has never been for ASE’s advanced IC pack- STATS ChipPAC was flow including IC packag- more important than now. age technologies. In a typical ranked eighth in the Semi- ing and verification tools Technology has become an use case with high-pin-count conductor Equipment from Cadence, and a new integral part of daily life, with dies, packaging engineers Manufacturing category. methodology that aggregates global proliferation of smart- using SiP-id™ and the accom- With 1,667 patents issued the requirements of wafer-, phones and wearables, and panying reference flow and by the U.S. Patent and package- and system-level significant application strides methodology were able to Trademark Office (USPTO) design into a unified and in artificial intelligence, reduce time from more than through the end of 2016, automated flow. By deploy- autonomous vehicles and the six hours to only 17 minutes, STATS ChipPAC has con- ing the SiP-id™ methodology, internet of things (IoT). These compared to existing tools tinued to be the leading designers can reduce design developments have created with manual operation. U.S. patent holder among iterations and greatly improve immense opportunity for SiP-id™ is immediately OSAT providers worldwide. throughput as compared to ASE to apply its SiP technol- available from ASE. For www.statschippac.com ◆ existing advanced packaging ogy beyond package level to enquiries, please email jen- EDA tools, reducing the time module-, board- and system- [email protected]. ◆

4 MEPTEC REPORT SPRING 2018 meptec.org ASM Pacific Technology Invests in its Future with the Opening of R&D Center in Taiwan

IN RECENT YEARS, engineering talent, reputable ACCREDITED driven by increased con- universities and research CERT # 3558* nectivity, sophisticated institutes, as well as strong data-gathering and analyt- government support are ics capabilities enabled by some of the key reasons that the Internet of Things (IoT) attracted ASMPT to Taiwan. have led to a shift toward an With this new facility in information-based economy. Taiwan, ASMPT now has With these waves of change seven R&D centers around reshaping the technology the world which include landscape, the market will China (Chengdu), Hong need more advanced semi- Kong, Singapore, Germany conductor products to meet (Munich), United Kingdom the global demand. This (Weymouth) and The Nether- has allowed ASM Pacific lands (Beuningen). ASMPT Technology Ltd. (ASMPT) to also operates in more than ride on the current trend as 30 countries including ten it announced the opening of manufacturing facilities in its Research & Development China (ie Shenzhen, Huizhou Surface mounted device with Center in Taiwan. and Hong Kong), Germany, delamination (red) along the entire length of several leads. This part Besides being able to Malaysia, Singapore, the would fail per J-STD-020 criteria. provide immediate hands-on Netherlands and the United support to the Taiwan cus- Kingdom. tomers, the availability of a For more information large pool of highly qualified visit www.asmpacific.com. ◆ SonoLab ® is Your Lab UTAC Delivers High-density System in a Package (SiP) Service for Octavo Systems An ISO/IEC 17025:2005 Certifi ed Testing Lab* SonoLab, a division of Sonoscan®, is the world’s largest UTAC HOLDINGS LTD., Dr. John Nelson, Chief inspection service specializing in Acoustic Micro Imaging through ongoing investments Executive Officer, UTAC (AMI). Through SonoLab, you’ll have access to the superior in its Dongguan facility, is said: “We are committed to image quality and reliable data accuracy of Sonoscan C-SAM® acoustic microscopes, plus the capabilities and now enabled with capabilities building a strong partner- careful analysis of the world’s leading AMI experts. to serve the most demanding ship with Octavo and play an System in a Package (SiP) instrumental role in support- With worldwide locations, SonoLab® Services applications, where high inte- ing the company in delivering unmatched capabilities, • Component Qualifi cation grated component density is fully integrated SiP based extensive experience to Industry Standards required for advanced func- products. This project signi- and the best equipment • Materials Characterization available, SonoLab gives and Evaluation tionality and performance. fies UTAC’s key growth pri- you the ability, fl exibility • High-Capacity Screening Octavo Systems OSD335x- orities, which include invest- and capacity you need and Lot Reclamation SM is a leading example of ing and developing SiP with to meet all your AMI • Failure Analysis and a demanding SiP applica- key partners.” requirements. Constructional Analysis tion. Octavo’s OSD335x-SM “Octavo was able to work • Inspection and Audit Services SiP product, integrates a closely with UTAC engi- • Custom Training Texas Instruments ARM neers and production staff on Cortex®-A8 processor to design, production ramp, and To learn more visit sonoscan.com/sonolab deliver the smallest embed- quality processes. We have *For U.S. Locations Only ded computing solution in the appreciated UTAC’s ability to market. It is 60% smaller than quickly bring expertise from a PCB assembly implementa- across the company to suc- tion of discrete components. cessfully bring this complex This high-density SiP product SIP into production,” added 847-437-6400 • sonoscan.com integrates 4 bare die and 94 Mr. Bill Heye. SMT devices in a 21x21mm For more information visit Elk Grove Village, IL • Silicon Valley, CA • Phoenix, AZ • England Philippines • Singapore • Shanghai • Taiwan ball grid array (BGA). www.utacgroup.com. ◆

meptec.org SPRING 2018 MEPTEC REPORT 5 Jeanne Beacham, Delphon CEO, Honored with STEP Ahead Award

“The women who we are celebrating represent the exciting career opportuni- 1-800-776-9888 ties available in manufacturing,” said Natalie Schilling, 2018 Chair of STEP Ahead and Vice President of Human Resources at Arconic. The STEP Ahead Awards are part of the larger STEP Ahead initiative, launched to examine and promote the role of women in the manufacturing industry through recognition, research, and leadership for attracting, advancing, and retaining strong female talent. Not only does the STEP Ahead initiative bolster manufacturing’s attractiveness to women, it also plays an important role THE MANUFACTURING INSTITUTE in improving the perception of careers has announced they will award Jeanne in the industry among younger genera- Beacham with the Women in Manufac- tions. On April 10, The Manufacturing turing STEP (Science, Technology, Engi- Institute will recognize 130 recipients of neering and Production) Ahead Award. the STEP Ahead Awards at a reception The STEP Ahead Awards honor women in Washington, D.C. The STEP Ahead who have demonstrated excellence and Awards program will highlight each hon- leadership in their careers and represent oree’s story, including their leadership all levels of the manufacturing industry, and accomplishments in manufacturing. from the factory-floor to the C suite. Visit www.delphon.com. ◆

Nordson Acquires Sonoscan to Broaden Test and Inspection Capabilities NORDSON CORPORATION HAS within Nordson’s Advanced Technology acquired Sonoscan, Inc., an Elk Grove Systems segment. Since its inception, Village, Illinois-based designer and Sonoscan has been the most trusted manufacturer of acoustic microscopes authority on the application of Acoustic and sophisticated acoustic micro imag- Microscopy, also known as Acoustic ing systems used in a variety of micro- Micro Imaging (AMI) technology, to electronic, automotive, aerospace and nondestructively find and characterize industrial electronics assembly applica- physical defects such as cracks, voids, tions. The transaction is not material to delaminations and porosity that occur Nordson results, and terms of the deal during manufacturing, environmental were not disclosed. testing or even component operation. “The Sonoscan acquisition broadens This acquisition builds on our strate- the offering to our customers within our gic objective to grow our Electronics Test and Inspection range of products and Systems business in the advanced semi- solutions,” said Joseph Stockunas, Vice conductor packaging and automotive President for Nordson’s Advanced Tech- electronics markets. nology Systems segment. “Sonoscan’s Nordson Corporation engineers, acoustic imaging solutions are adjacent manufactures and markets differentiated and highly complementary to Nordson’s products and systems used to dispense, existing bond testing, X-ray and auto- apply and control adhesives, coatings, mated optical inspection solutions and polymers, sealants, biomaterials, and are sold to the same set of customers.” other fluids, to test and inspect for qual- Founded in 1974 by Dr. Lawrence ity, and to treat and cure surfaces. Kessler and employing approximately Visit www.nordson.com for more 85 people, Sonoscan will operate information about Nordson. ◆

6 MEPTEC REPORT SPRING 2018 meptec.org Intel Ships Industry’s First 58G PAM4- Capable FPGA Built for Multi-Terabit Network Infrastructure and NFV Developing new medical devices? Start with a FREE Promex design review for reliability and manufacturability.

INTEL HAS ANNOUNCED THAT IT HAS BEGUN SHIP- PING its Intel® Stratix® 10 TX FPGAs, the industry’s only field programmable gate array (FPGA) with 58G PAM4 transceiver technology. By integrating the FPGA with 58G PAM4 technology, Intel Stratix 10 TX FPGAs can double the transceiver bandwidth performance when compared to traditional solutions. This exceptional bandwidth performance makes the Intel Stratix 10 TX FPGAs the essential connectivity solution for next- Unique devices often have equally unique generation use cases: optical transport networks, network func- production requirements tion virtualization (NFV), enterprise networking, cloud service Such as not exceeding 85°C during assembly. providers and 5G networks applications where high bandwidth is Handling components that can’t be exposed to paramount. standard cleaning processes. Providing excellent To facilitate the future of networking, NFV and optical trans- adhesion between surfaces for fluid processing port solutions, Intel Stratix 10 TX FPGAs provide up to 144 devices. Controlling voids or bubbles in organics. transceiver lanes with serial data rates of 1 to 58 Gbps. This No matter how unique your requirements, we’ll combination delivers a higher aggregate bandwidth than any cur- specify the best materials and processes to ensure rent FPGA, enabling architects to scale to 100G, 200G and 400G stable performance. delivery speeds. By supporting dual-mode modulation, 58G Heterogenous assembly and packaging PAM4 and 30G NRZ, new infrastructure can reach 58G data rates while staying backward-compatible with existing network solutions our specialty infrastructure. A wide range of hardened intellectual property We understand the FDA requirements for materials (IP) cores, including 100GE MAC and FEC, deliver optimized and processes needed to manufacture Class II and performance, latency and power. Class III devices. Along with providing complete Check with your system manufacturer or retailer or learn documentation packages. Even if all you have is more at www.intel.com. ◆ proof of concept, our engineering and materials experience will get you to assembly of beta units, followed by scaling to high-volume production. Five-Day Delivery of Overmolded QFNs from Quik-Pak San Diego If you’re responsible for fast-tracking medical device development, designing microfluidic WITH THE INSTALLATION customer’s design. Quik-Pak devices, incorporating more sensors in a smaller of a K&S IConn Plus wire- QFNs are available in over 35 package, or assembly in a Class 100 or Class bonder, molding press and designs, with multiple thick- 1000 cleanroom environment: laser marker at its San Diego, nesses. Package sizes range California facility, Promex’s from 2×2 mm to 12×12 mm for email [email protected] or call Quik-Pak Division delivers QFNs, as well as 1.5×1.5 mm her at 1.408.496.0222 to ask about your free assembled QFNs in five days. to 4×4 mm for DFNs. All are design review. Quick-turn engineering builds RoHS compliant and utilize for overmolded QFN packages NiPdAu-plated lead frames. are available in as little as five Visit the Promex website at promex-ind.com weeks after validation of the www.icproto.com for more. ◆

meptec.org SPRING 2018 MEPTEC REPORT 7 COLUMN

processes to increase yield and in down- erations. Today whole DRAM wafers COUPLING & stream processes to enhance margin. containing hundreds of memory devices In certain high value devices, test are regularly tested simultaneously. This CROSSTALK identifies devices with higher perfor- change has further reduced operational By Ira Feldman mance enabling sales at a higher margin costs by eliminating weak devices earlier, since the cost to produce is the same for performing cell-based repair in bulk, and all units. For example “performance bin- simplifying the handling of devices at Electronic coupling is the transfer of ener- ning” of microprocessors identifies the wafer rather than as individual parts dur- gy from one circuit or medium to another. premium units to sell at a higher price ing test. Final Test is still performed to Sometimes it is intentional and sometimes hence increasing both revenue and mar- provide the test coverage that cannot be not (crosstalk). I hope that this column, by gin. And many semiconductors would accomplished at Wafer Test and to ensure mixing technology and general observa- not yield at all without repair due to the packaging operation has not intro- tions, is thought-provoking and “couples” their complexity and large size. (Larger duced defects. Even though the amount with your thinking. Most of the time I will die are more likely to have defects since of test time spent at Final Test may be stick to technology but occasional cross- each fabrication process has a funda- reduced and the tests simplified, Final talk diversions may deliver a message mental number of defects per square Test of a packaged part is still essen- closer to home. area.) Dynamic random access memory tial. (DRAM), flash memory, and field pro- The recent introduction of wafer “Testing the grammable gate array (FPGA) devices level chip scale packaging (WLCSP) has all require test to identify which areas also shifted how testing is performed. Supply Chain” on the die need to be swapped for spare WLCSP and other advanced packag- memory or logic cells. Without test the ing – in fan-in and fan-out configuration  MUCH THE SAME AS THE WORLD, intrinsic yield and hence revenue of these – forms the “finished” package on a sub- test is not simply black or white but devices would be almost zero. strate. The substrate may be the original varying shades of grey and a jumble of In the quest for greater cost savings silicon wafer that the die were fabricated colors. Test has continually responded to and operational efficiency, semiconductor on or a temporary substrate on which semiconductor technology challenges to test itself has become more complicated. previously tested good die are placed. provide the right solutions. As a result, Over a generation ago the two main The package interconnect and “encapsu- the organizational placement and “sup- test steps were “Wafer Sort” and “Final lation” are processed onto the substrate ply chains” for test have rarely been Test”. Wafer Sort tested each device (die) along with the die. The resultant shift neat or tidy. Is Wafer Test a “front end” on a wafer to determine which were good is that the devices are tested while still or a “back end” function? Are the lines enough to be assembled into a packaged on wafer/substrate before singulation. between wafer probe and final test solu- part (semiconductor die are mounted or And this testing typically contains all the tions and the suppliers blurring? encapsulated into the package). After items previously covered by the Wafer Electronic test began as simple go the testing was completed, the wafer Test and Final Test steps. For some or no-go quality “gauge” measurement. was cut apart to singulate the die (wafer devices, all the testing can be performed Either the component or product was saw) with only they good die ending up in one step eliminating additional test good enough to move to the next produc- in packages. Due to the limitations of steps. tion step or it failed. Failed items would existing wafer probe technology this test- This advanced packaging shift has be reworked where possible – for exam- ing was often very rudimentary. Since produced new test solutions with more ple by swapping or adjusting a subsystem many devices could not be run at speed in development. The most common in a product. Or discarded when rework in full operational mode typically only approach is a hybrid Wafer and Final was not possible. gross defects were found. Eliminating test cell configuration. For wafer based As a go/no-go check the concept of the clearly bad dies avoided the cost of WLCSP devices, a wafer prober is used test is relatively simple. But the situa- the package, which for some high-end to handle the wafers but the electrical tion quickly becomes challenging and devices could cost as much as producing contact to the automated test equipment expensive when all the details are taken the die. After packaging, the part was (ATE) is not made with a “traditional” into account. Test costs are always tested again at Final Test to ensure there probe card. Today the dominant contac- higher than desired especially when were no manufacturing defects and that tors are built using miniature spring pins test is misconstrued as a necessary but the part operated to its full specifica- and socket technology more frequently non-value-add activity. Once its true tions. Final Test data also provided the supplied by traditional socket vendors potential was discovered, test quickly “binning” to identify premium parts and than traditional probe card suppliers. The became a cost-saving measure and a repair cell based devices. spring pins are coming out ahead due revenue enhancer for many semiconduc- More recently a large part of Final to the lower cost and robustness at the tor devices. Not only can test reduce Test has migrated to Wafer Test (often required connection pitch compared to costs by avoiding additional processing renamed from Wafer Sort to reflect the vertical probe card technology which is and consuming materials on units that change) enabled by advances in probe better suited to finer pitches. As a result, are defective, it can enable rework of card technology. Newer probe cards have there is a growing disruption in the defective units before it is too late. And enabled exercising many devices closer supplier base blurring probe card and test provides the data necessary for to or at speed and often in massively socket companies as WLCSP technol- continuous improvement in upstream parallel configurations for cost consid- ogy increases in volume.

8 MEPTEC REPORT SPRING 2018 meptec.org The drive for higher performance and once there is sufficient demand. It is not - including technology and suppliers - end-product differentiation has increased yet clear which existing test equipment are essential to keep up with the new the demand for multi-die packages. In suppliers – probers or handlers – or product challenges. The proper strategy particular, Heterogeneous Integration which outsider(s) will be the winning based upon the right market information (HI) is placing multiple die with differ- vendors. And similar to current efforts to is required to successfully navigate the ent functionality into the same package standardize panel size(s), we may be far dynamic world of test. Be sure to have to enable newer and higher performance away from standardized test interfaces the proper perspective to ensure that solutions. Numerous advanced packag- for this new equipment. you are managing change instead of ing approaches such as 2.5D, 3D, fan-out A detailed optical inspection of each being managed by change. wafer level packaging (FoWLP), and die is performed after singulation to For more of my thoughts, please see others have been developed to support identify any cracking, chipping, or other my blog http://hightechbizdev.com. HI. Fan-out based packaging is currently damage that may have occurred during As always, I look forward to hearing dominating leading-edge high-volume the dicing or sawing process. However, your comments directly. Please contact applications such as smartphone proces- this is not sufficient for high-reliability me to discuss your thoughts or if I can be sors providing the right mix of cost and devices where it is essential to fully test of any assistance. ◆ performance. Fan-out packaging using after all operations are completed espe- wafer (FoWLP) and panel (FoPLP) cially singulation. And there are other substrates are now in production. The devices that cannot be tested in-situ IRA FELDMAN is the Principal Con- panels are significantly larger than on a substrate due to constraints such sultant of Feldman Engineering Corp. wafers – some as large as 600 mm on a as neighboring devices or the need for which guides high technology prod- side – in order to further reduce cost per non-electrical stimulus. For parts such as ucts and services from concept to high unit. Clearly panel sized equipment has these, new solutions such as test-on-strip volume manufacturing. He engages been built for the processing of panels are being implemented to provide high even though panel-sized test equip- parallelism test of devices in advance on a wide range of projects including ment has not been widely seen. Initially packaging. It remains to be seen if there technical marketing, product-gener- panels are being cut into smaller sizes are enough high volume applications to ation processes, supply-chain man- to fit onto existing wafer probers and provide a sufficient return-on-investment agement, and business development. there will be a transition to panel-based for these new solutions. ([email protected]) handlers (probers?) for future test cells Constant changes in test solutions

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meptec.org SPRING 2018 MEPTEC REPORT 9 COLUMN

The annual event lasted 3 days and each of working in R&D, sales, engineering, INDUSTRY of the TI businesses: semiconductor, purchasing or whatever. The project consumer products, government equip- developed a “desk manual” that had INSIGHTS ment, geophysical services, etc. reviewed dividers to demarcate different aspects of By Ron Jones their objective, strategies and tactics and a secretarial or clerical job, including: progress from their previous year plan. • Org charts and contact lists Metrics were tracked in a corporate wide P& A E . . . S a y W h a t? database to tie strategies to reality. It was • How to order office supplies always a challenge to tie some things to • How to do expense statements  IF THE TERM P&AE SEEMS a real world P&L, but it was a positive • Formats for weekly reports and familiar, you’ve likely either had a flash- driving force for growth and improve- standing memos back from a substance induced episode ment. in your younger days or you worked at Up until this time, I was a pure opera- • Locations of copy machines, rest- Texas Instruments. P&AE stands for ... tions guy. I had moved from an individ- rooms, cafeteria, nurses office, human hold that thought ... I’m getting ahead of ual contributor role up several levels to resources, etc. my story. managing a P&L. I had been involved in • Emergency numbers I joined TI in 1969 as a metallization tactical programs, but never had strategic process engineer in a wafer fab in Sher- responsibility. • and the tabs went on, including blank man, Texas. There was a lot of problem I got drafted into a strategic role for ones that could be personalized solving and you could see solutions the Semiconductor Group. It was called For each secretary or clerk, her desk through to actual improvements in yield, P&AE Strategy Manager ... drum roll ... manual was a living document that she cost or quality. TI was a very insular and stood for People and Asset Effective- tailored to her particular job and respon- company. The joke was there were two ness ... with meaning not immediately sibilities. When a secretary was out, the ways of doing things ... the TI way and obvious. Though the name was cum- replacement had instructions of what to the wrong way. Employees seldom par- bersome at best, the concept was quite do and how. ticipated in industry organizations. This straight forward. It caught on and began to grow like would normally have been somewhat At this time, TI had 80,000 employ- wildfire to other groups locally. Remem- limiting, but TI had a culture that was ees, a good many of which were in the ber, I’m the P&AE guy ... so take a good very forward looking. Semiconductor Group and spread at idea and fan it out to the corporation. One of the overarching programs offices and factories around the world. The thought struck me that secretaries was called OST, standing for Objectives, Many employees and organizations are the most widely dispersed job func- Strategies and Tactics. A few high level encountered the same problems and tion across the corporation. No matter objectives were set by senior manage- typically had to solve them in a vacuum. the business, the organization or the ment of the corporation, then support The concept of P&AE was to identify geography, most every group had a sec- strategies were identified to achieve each the best practices being used across the retary. objective, then more detailed tactics were group and make these known to others so At this time, TI had corporate level identified to support achievement of the that shared learning was achieved. councils for engineering, manufactur- strategies. While this seems quite com- So remember this was a Strategic posi- ing and sales. At a high level, they were mon sense now, it was a relatively new tion, so there was no big organization. doing a P&AE function to address com- 50+ years ago. The nomenclature some- There was me, my secretary and one mon issues across the groups. Based times differs, but it is a tiered approach exempt employee. We began by using an on the success of the Desk Manual and at setting high level goals then breaking OST approach to identify large buckets other projects that secretarial groups them down into more detailed levels of of opportunity and then drilled down to had come up with, I wrote a letter to actions to achieve the goals. identify actionable projects. the appropriate Senior VP recommend- As a young engineer, OST was just a A prime example of a very success- ing that a Corporate Secretarial Council 3 letter acronym. I knew the words, but ful program started with a group of (CSC) be formed and be a peer to the not the process behind it. I had my regu- secretaries that wanted to improve their other Corporate Councils. To the amaze- lar job, but then was involved in a couple collective productivity. Wait, before you ment of many, he wholeheartedly sup- of TAP (Tactical Action Plan) programs. string me up for calling an administrative ported the idea and chartered the group. There was a separate budget for these assistant a secretary, back in the late 70’s, This was a huge boost for the credibility programs and they were formed ad hoc secretary was a very respectful title for of the lower level secretarial groups and to address a particular issue. Note, I said a very critical job function. Remember, nudged less believing senior managers these were funded by a separate source there was a time when we didn’t all type into supporting the time and expenses of (OST funding) from the regular operating our own e-mails and secretaries per- the undertaking. The council enabled the budget. This was an incentive for man- formed a broad range of office support cross pollination of ideas from secretarial agers to support them as they provided duties. groups around the TI world and is a shin- additional budget. The first problem they addressed was ing example of how the OST and P&AE As time went along and I progressed the productivity impact when a secretary systems are supposed to work. A corpo- up the organization, I began attending the was out sick or on longer term maternity rate level objective was to raise the pro- annual Strategic Planning Conferences leave. Each secretary had general duties, ductivity and effectiveness of employees and the entire picture came into focus. but also many specialized ones because and this example fits that to a tee. ◆

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meptec.org SPRING 2018 MEPTEC REPORT 11 ANALYSIS

Top 10 Equipment Acquisition Trends for 2018 Economic Upturn, Elevated Business Confidence and Tax Reform to Support Strong Investment

THE EQUIPMENT LEASING AND Finance Association (ELFA) which represents the $1 trillion equipment finance sector, has revealed its Top 10 Equip- ment Acquisition Trends for 2018. Given U.S. businesses, nonprofits and government agencies will spend over $1.6 trillion in capital goods or fixed business investment (including software) this year, financing a majority of those assets, these trends impact a significant portion of the U.S. economy. In 2018, businesses are expected to make their largest capital investments since 2012. ELFA President and CEO Ralph Petta said, “Equipment acquisition is a key driver of supply chains across all U.S. manufacturing and service sectors. Equipment leasing and financing provide the source of funding for a majority of U.S. businesses – 8 out of 10 – to acquire the productive assets they need to operate and grow. We are pleased to again provide the Top 10 Equipment Acquisition Trends in order to assist businesses in understanding the market environment and planning their acquisition strategies.” ELFA distilled recent research data, including the Equipment Leasing & Finance Foundation’s 2018 Equipment Leasing & Finance U.S. Economic Out- look, industry participants’ expertise, and member input from ELFA meetings and conferences in compiling the trends.

ELFA forecasts the following Top 10 Equipment Acquisition Trends for 2018: cal upturn in the U.S. economy, due Although the growth of financed 1. Capital spending will have its in part to the strongest global econo- equipment acquisitions last year did strongest performance in six years. my in over a decade, will contribute not exceed overall equipment and to a healthy business investment trend software investment growth, equip- Following a significant improvement before potentially waning toward year ment finance industry indicators point in equipment and software invest- end. to increased financing of equipment ment in 2017 over 2016, investment acquisitions in 2018. The few persist- will continue robust growth in 2018. 2. Look for strengthening positive ing industry headwinds should be Elevated business confidence, fewer momentum in financed equipment outweighed by a historically high regulations and a broad-based cycli- acquisitions. propensity to finance and a healthy

12 MEPTEC REPORT SPRING 2018 meptec.org equipment and software investment verticals, including agriculture, air- for equipment spending this year than forecast of 9.1 percent. craft, construction, industrial, trucks, in previous ones, businesses will have computers and software. to monitor ongoing issues throughout 3. Tax reform will help unleash pent- 2018. Tax reform aside, concern up demand by businesses for new 7. Businesses will ramp up efforts to about partisan politics in Washington equipment. fulfill requirements of new account- may affect the confidence of the busi- ing rules for their leased equipment. ness community over time. The resi- Long awaited corporate tax cuts will dential housing market may not get a have businesses pulling the trigger on With the new lease accounting stan- hoped-for recovery in light of the the equipment acquisitions they had dard taking effect beginning in 2019, Fed’s planned interest rate increases been putting off. Multiple measures businesses with leases on the books and home prices rising faster than of business confidence, including the will be focusing on compliance in buyers’ incomes. Major curbs on Monthly Confidence Index for the earnest this year. In response, they immigration could be a headwind to Equipment Finance Industry, back will find that equipment finance pro- growth through labor and skills short- the probability for increased equip- viders are developing strategies and ages in several industries, including ment spending. products that are beneficial to lessees agriculture, construction and hospital- under the new framework. ity. Finally, U.S. mid-term election 4. Higher interest rates will loom as results in November could impact the economy grows and tax reform 8. Financing options and services for future federal legislation affecting is enacted. equipment acquisitions will be businesses. more innovative and customer A rising interest rate environment driven. For more information about the Top won’t deter investment in most key 10 Trends, please contact Amy Vogt at equipment verticals, but businesses A changing business landscape and [email protected]. For forecast data will keep informed on Fed rate hikes. disruptive technologies will drive regarding equipment investment and With the improving economy and its equipment finance companies to meet capital spending in the United States, accompanying rise in inflation along their customers’ unique demands. see the Equipment Leasing & Finance with a substantial increase in the Expect more tailored financial solu- Foundation’s 2018 Equipment Leasing & national debt owing to the new tax tions to help companies innovate Finance U.S. Economic Outlook at www. legislation, count on three and possi- and solve business challenges, such elfonline.com ◆ bly four rate increases in 2018. as metered usage that enables customers to pay only for what they con- Reprinted with permission from the Equipment 5. Technological advances in equip- sume. Wider use of electronic docu- Leasing and Finance Association. ment will attract businesses look- ments and e-signatures for greater ing to improve efficiencies. convenience will become increasingly About ELFA available. New technology will be even more The Equipment Leasing and Finance 9. Trade issues will pose headwinds irresistible as businesses look for Association (ELFA) is the trade associa- affecting global demand for U.S. ways to increase efficiencies and tion that represents companies in the profitability as they take advantage business exports. $1 trillion equipment finance sector, of new market opportunities in the which includes financial services com- growing economy. Attractive financ- Businesses seeking equipment to pro- ing options will make the latest duce export goods will be closely panies and manufacturers engaged in equipment that may have been con- watching potential impacts on foreign financing capital goods. ELFA mem- sidered previously unaffordable even trade. A gradual strengthening in the bers are the driving force behind the more accessible. dollar since 2017, if maintained, growth in the commercial equipment could be a headwind to trade exports. finance market and contribute to capi- 6. Key equipment verticals will Tensions could also escalate as U.S. tal formation in the U.S. and abroad. continue to rebound in 2018. trade negotiations on NAFTA pro- Its 575 members include indepen- ceed and the Trump administration dent and captive leasing and finance With economic growth drivers, in- continues to take a hardline stance on companies, banks, financial services cluding persistent business optimism, trade relations with China. corporations, broker/packagers and stable credit conditions and healthy global demand, the solid investment 10. External “wild cards” will factor investment banks, as well as manufac- growth pattern from 2017 will con- into equipment acquisition turers and service providers. For more tinue for most equipment verticals. decisions. information, please visit www.elfaon- Investment is expected to remain line.org. steady or strengthen in equipment Despite a more favorable environment meptec.org SPRING 2018 MEPTEC REPORT 13 PROFILE

DELIVERING ADVANCED THIN FILM SOLUTIONS SINCE 1991

Intevac MATRIX® PVD

Intevac, Inc. was founded in 1991 and has two businesses: Thin-film Equipment, and Photonics.

INTEVAC THIN-FILM EQUIPMENT display cover panel applications, and, INTEVAC FY2017 BUSINESS UPDATE In their Thin-film Equipment busi- now, the advanced packaging market. Intevac’s full-year FY2017 financial ness, Intevac is a leader in the design and results were consistent with the strong development of high-productivity thin- INTEVAC PHOTONICS growth and profitability objectives set by film processing systems. Their produc- Intevac Photonics is a technology senior management. Intevac returned to tion-proven platforms are designed for leader in the development and manufac- profitability in FY2017, and it exceeded high volume manufacturing of substrates ture of compact, cost-effective, high-sen- earnings guidance. 2017 was another with precise thin film properties. sitivity digital-optical sensors, cameras pivotal year for Intevac, in which it con- Intevac is the world’s leading supplier and systems for the defense industry, tinued to execute its strategy to grow the of magnetic media processing systems, based on proprietary Electron Bom- Thin-film Equipment business, based on having shipped more than 220 manu- barded Active Pixel Sensors (EBAPS®) substrate independent thin-film process- facturing systems to Hard Disk Drive manufactured with Intevac’s advanced ing platforms serving multiple large mar- (HDD) customers world-wide. More thin film technology. kets. than 60% of the world’s magnetic media Designed for the capture and dis- FY2017 was Intevac’s third straight produced today is produced on Intevac play of low-light images, applications year of growth, in both revenues and systems. for Intevac’s industry-leading systems orders. New orders were $108 million, Intevac’s thin-film technology solu- include digital night vision and long up 11% from 2016, and revenues were tions improve performance and through- range target identification. Intevac is the up 41% from 2016, driven by strong put, and continue to expand into addi- sole source provider of integrated digital growth in both Intevac’s core HDD mar- tional markets – including solar and adja- imaging systems for most U.S. military ket as well as in its new Thin-film Equip- cent thin film deposition applications, night vision programs. ment growth initiatives.

14 MEPTEC REPORT SPRING 2018 meptec.org For the Thin-film Equipment business in particular, Intevac’s revenues were up 75% year-over-year, and Intevac recognized revenue on every one of its product platforms during the year: the 200 Lean®, the VERTEX®, the MATRIX®, and the ENERGi®. At 2017 year-end, backlog for Intevac’s thin-film equipment business increased for the fifth straight year, rising to $52 million. A big part of Intevac’s growth story is its VERTEX product and the progress Intevac has made deploying protective coatings into the display cover panel market. The VERTEX deposits Optical Grade Diamond-Like Carbon (oDLC) as a protective coating for display cover panels, like the ones found on today’s smartphones and other consumer electronic devices – wearables, camera displays, etc. In addition, Intevac has seen Sam- sung, and now Apple, transition their Intevac MATRIX PVD for Fan-Out Panel Level Packaging and Fan-Out Wafer Level Packaging smartphones to glass back cover panels, primarily to enable wireless charg- vac’s MATRIX PVD system, are rou- was awarded best paper of the IWLPC ing. This transition is clearly driving tinely used in the silicon PV cell industry 2017 Advanced Manufacturing and Test increased interest in oDLC by multiple owing to the demonstrated usefulness Track. companies, as many cell phone makers of such systems in the High Volume Fan-out packaging is a new market follow these industry leaders, resulting Manufacturing (HVM) of silicon PV where Intevac’s advantages in high pro- in the surge of interest Intevac saw in the cells, where throughputs of thousands of ductivity thin-film processing solutions second half of 2017 on back cover glass wafers per hour are expected, and where provide a compelling advantage over applications. Cost-of-Ownership (COO) differences of current solutions being used in the pack- In the hard disk drive market, Intevac pennies per PV wafer can make or break aging industry. In particular, Intevac’s booked 13 of it 200 Lean PVD systems a manufacturer. It turns out that the met- PVD solution reduces the cost of the over the last six quarters. Along with als being sputter deposited for silicon PV redistribution layer barrier/seed deposi- these orders for new systems, Intevac cells are typically some combination of tion by up to two-thirds compared to has also witnessed increasing strength in Ti, TiW, Al, and Cu – the same materials existing process technology. The Intevac system upgrade activity from its custom- that the Advanced Packaging industry MATRIX also presents a cost-effective, ers of record, where the installed base uses for barrier/seed structures in Cu simple migration path for OSATs as they of 200 Lean systems is being modified Redistribution Layers (RDL). move from wafer to panel level process- primarily to add additional processing ing; the same MATRIX platform can be chambers and to upgrade to the newest MATRIX PVD FOR FAN-OUT PACKAGING configured for today’s 300 millimeter PVD technologies. Intevac expects it will Intevac announced at the Needham wavers and for 600mm x 600mm panels, see continuing activity in the HDD busi- Growth conference, in mid-January or larger. ness in the foreseeable future, providing 2018, its successful efforts developing Concurrent with its internal product Intevac with a solid base business in its the MATRIX PVD system for fan-out development process optimization activi- core HDD market. wafer level packaging (FOWLP) and ties in fan-out packaging, Intevac is also The other major thin-film equipment fan-out panel level packaging (FOPLP) actively engaged with Tier-1 OSATs, platform Intevac offers is the Intevac applications. Starting at IWLPC 2017 where it has ongoing activity for both MATRIX, initially sold for silicon photo- (October 2017), and continuing with wafer level and panel level demonstra- voltaic (PV) cell applications. While the EPTC 2017, SEMICON Japan 2017, tions and evaluations. VERTEX is a substrate independent ver- SEMICON Korea 2018, DPC 2018, and The barrier/seed layer processes Inte- tical carrier based platform, the MATRIX beyond, Intevac has been sharing techni- vac developed for fan-out wafer level is a horizontal, carrier-based platform cal details about FOWLP and FOPLP packaging and fan-out panel level pack- suitable for multiple end-market applica- sputter deposition processes for barrier/ aging redistribution layer formation use tions. seed layer films in Cu RDL. And the a process sequence of degas – pre-clean Carrier-based linear transport sputter advanced packaging industry has noticed: – Ti PVD – Cu PVD. Each of the process deposition systems, for example Inte- Intevac’s presentation at IWLPC 2017 modules on Intevac’s linear transport meptec.org SPRING 2018 MEPTEC REPORT 15 PROFILE

system is optimized to accommodate high throughputs and short takt times in order to produce Cost of Ownership advantages in fan-out packaging over the per-wafer or per-panel costs of the PVD cluster tools that are the current Process of Record. The MATRIX PVD degas module has a significant amount of vacuum pumping capacity, including Meissner coils for dedicated pumping of water vapor evolving from epoxy mold compound substrates during heated degas. The Intevac pre-clean module uses a Intevac VERTEX® gridded ion beam source that produces a net electrically neutral impingement of well-controlled energetic Argon ions transport system are comparable to cur- 300mm fan-out wafers to running car- on the wafer (or panel) to be cleaned. rent industry POR results, and the cost of riers with large panels for fan-out panel And for Ti and Cu PVD, Intevac uses its ownership results from the in-line system level packaging; the switch is made sole- Linear Scanning Magnet Array (LSMA) are considerably lower than today’s clus- ly by changing the carrier itself, without magnetron, which achieves much higher ter tool POR for RDL barrier/seed layers making any in-vacuum adjustments for target utilizations than can be had with a in fan-out packaging. either the wafers or the panels. static planar magnetron. By using dedicated wafer or panel For more information about Intevac, The Ti and Cu film uniformity, sheet carriers in the linear transport MATRIX please call 408-986-9888, or visit the resistance, and adhesion results from PVD system, it’s an easy change to go Intevac website at www.intevac.com. ◆ Intevac’s MATRIX PVD in-line linear from running carriers holding multiple

MORE THAN 350 HIGHLIGHTS TECHNICAL PAPERS n 41 technical sessions COVERING: including: Fan-Out WLP & CSP • 5 interactive 3D & TSV Processing presentation sessions, Don’t Miss Out on the including one featuring Heterogeneous Integration student presenters Industry’s Premier Event! Fine Pitch Flip-Chip n 18 CEU-approved The only event that MEMS & Sensors Professional Development encompasses the Advanced Substrates Courses Advanced Wire Bonding n Technology Corner Exhibits, diverse world of integrated Flexible & Wearable Devices featuring more than 100 industry-leading vendors systems packaging. RF Components Automotive Electronics n 6 special invited sessions For more information, visit: Harsh Environment n Several evening receptions www.ectc.net Bio/Medical Devices n 3 conference luncheons Conference Sponsors: Thermal/Mech Simulation n Multiple opportunities for Interconnect Reliability networking Optical Interconnects n Great location

16 MEPTEC REPORT SPRING 2018 meptec.org PACKAGING

Challenges of Ball-Attach Process Using Flux for Fan-Out Wafer/Panel Level (FOWLP/PLP) Packaging

Sze-Pei Lim, Semiconductor Product Manager - Southeast Asia, Indium Corporation; Dr. Yan Liu, Research Chemist, Indium Corporation; John H. Lau, Senior Technical Advisor, ASM Pacific Technology; and Li Ming, R&D Director, ASM Pacific Technology

ADVANCED PACKAGING TECHNOLOGY solutions in the semiconductor industry are driven by the requirements of end- use applications, including the need for smaller footprint area, lower package height, better signal integrity, higher processor/memory bandwidth, and more. In recent years, the fan-out wafer level packaging (FOWLP) platform has emerged as a suitable advanced packaging technology that can fulfill most of these requirements. Some of its advantages include: 1) No packaging substrate which enables ultra-thin, smaller form factor and lighter packages; 2) Wafer fab-like fabrication process to ensure higher I/O density, reduce interconnect length, and achieve higher processing speed; 3) Enhanced heterogeneous integration solutions, for example, system-in- package (SIP) and package-on-package Figure 1. Typical process flow for chip-first and die-down FOWLP. (PoP); 4) lower power consumption; 5) lower cost; and many more. There are three primary process flows for different variations of FOW/ PLP. The most common variation is the conventional chip-first and die-down process—the eWLB technology patented by Infineon and STATS ChipPAC (Figure 1). The second is TSMC’s integrated fan- out (InFO) process, which is chip-first and die-up process (Figure 2). The third primary process flow is the RDL first and chip last process for even more stringent line/space (L/S) requirements (L/ S<2µm/2µm), as shown in Figure 3. An example of this includes Renesas’s Sys- tem in Wafer Level Package (SiWLP), and Amkor’s Si Wafer Integrated Fan- Out Technology (SWIFT), Si-less Inte- grated Module (SLIM) technology. Even with different variations of FOW/PLP process flows, before package singulation, typically flux is printed on the wafer or panel, followed by a ball drop process, reflow, and cleaning Figure 2. Typical process flow for chip-first and die-up FOWLP. meptec.org SPRING 2018 MEPTEC REPORT 17 PACKAGING

To add to the complexity, many new Different testings are performed to passivation materials are being investi- study flux characteristics and how it gated for the FOWLP process, targeted to affects the application outcome. Rheol- improve adhesion, finer line width/space, ogy of the flux is important in several lower costs, and more. Flux compatibility different aspects of the flux behavior, with various kinds of passivation mate- such as low-flux leakage underneath the rial, from PI, PBO, BCB, SiN, solder stencil during printing, flux definition resist, ABF, or to just copper (Cu) oxide, after printing, slump behavior, and the can be a challenge as well. Inappropriate ability to hold the sphere in place during flux selection may cause swelling of pas- placement and reflow (movement during sivation material, causing a “volcano” reflow or MDR). effect and delamination between the Cu If the viscosity is too low, the flux and the passivation material. Besides, will tend to bleed underneath the stencil, the cleanability of flux residue after the causing smearing of the flux outside of reflow process is dependent on the types the intended print area/pad and less flux of passivation material. Some are rough- volume. If the layer of flux deposited is er or not fully cured, which can cause too thin and smeared, it may not hold the Figure 3. Typical process flow for Renesas the flux residue to be more difficult to be sphere properly during the process, hence RDL first and chip last FOWLP. cleaned away effectively. causing “missing ball” or “double-ball” problem. to form the solder bump on the package. BALL-ATTACH/BUMPING PROCESS It is important to note that viscosity This is the ball-attach or solder bumping In this process, the wafer or panel is only one of the rheological character- process. Then the wafer or panel will be will be loaded onto a printer and flux istics of a flux, and only for a Newtonian singulated to form an individual package, will be printed with a squeegee using material is the viscosity independent of and the solder bump will form the solder a metal stencil or silk screen . After the shear rate. Fluxes are mostly non- interconnect to the board or substrate in that, solder spheres will be “printed” or Newtonian. Therefore, the use of this the subsequent process. dropped through another stencil onto the single point measurement, although com- While there are many technical flux deposit. Then the wafer or panel will mon, is not recommended for complete advantages of the FOWLP packaging go through a typical reflow and cleaning characterization, and may be used as a technology, there are several process process. For this ball-attach/bumping “shorthand” for many different rheologi- challenges as well. One of the key chal- process, most commonly a water-wash- cal parameters. lenges is the warpage of the reconstituted able flux is used. wafer or panel (Figure 4). This is due to Rheology the different materials being used – the Flux Requirements A Brookfield Cone and Plate Viscom- RDLs, dielectric layers, mold compound, To achieve a good yield for the ball- eter was used to measure the viscosity silicon dies, etc. – which may cause seri- attach/bumping process, the design crite- of the flux as a function of time. The ous CTE mismatch. The degree of warp- ria for the flux are listed below: spindle used was a CP-51 and measure- age may affect the subsequent ball-attach ments were taken at 25°C at 10RPM. • Halogen-free or bumping process. Hence, an appropri- The results are shown in Figure 5. ate flux needs to be chosen in order to • Printing with no or low-flux leakage minimize defects such as missing ball, under stencil with long stencil life bridging, etc. • Tackiness of flux sufficient to hold sphere in place during reflow, even with slight warpage • Compatible with passivation material: – No reaction (swelling) with various polymers; does not cause “volcano” effect – No reaction with RDL/copper; does not cause delamination Figure 5. Flux stability shown by viscosity • No excessive wetting of solder; copper versus time. thinning effect For this study, few different versions • Good joint shear strength of the water-washable fluxes were tested and each showed a consistent viscosity • Residue cleanable with DI water only Figure 4. Example of serious warpage of after a normal short period of thixo- reconstituted wafer. • No white residue after cleaning tropic breakdown. Typically after each

18 MEPTEC REPORT SPRING 2018 meptec.org spheres tend to coalescence together if they are bridged by the flux during reflow.

Tackiness Flux was printed on a ceramic substrate and the tackiness was checked from 0 hours up to 32 hours after printing, using the Texture Technologies TA.XT2 equipment. The test was conducted in an ambient atmosphere, with Figure 6. Flux imprint measurements and imprint diameter variation over time. 50% RH ± 3% and room temperature of 21.5°C ± 2°C. Results are shown in production shift (8-10 hours), the user is sistency and behavior of the fluxes over Figure 8. Tackiness is one of the charac- advised to discard the flux and replen- time. Figure 7 shows the print results of teristics of the fluxes that are checked to ish with fresh flux to ensure consistent several fluxes. ensure the flux will not lose its ability to flux printing performance. All the fluxes As shown in Figure 6, some fluxes hold the sphere in place. tested here exhibited a stable viscos- have more variation over time compared From the testing results above, it was ity, even after >15 hours, hence there is to other fluxes, though all of them can noticed during the tests that the tackiness no problem using the flux in a standard be considered consistent over the 2-hour of some fluxes showed an increase trend, operation. The rheology (which corre- period. Also note that, even though all while some had a decrease over time. lates with viscosity or tack) of a flux can fluxes are printed using the same equip- This is determined by the flux chemistry be fine-tuned to suit the specific applica- ment setup with same aperture diameter, and how it reacts with the atmosphere tion, such as solderball diameter, package the different rheology of flux will affect when exposed for an extended period. configuration, and equipment capability. the final flux imprint diameter greatly Some solvents in the flux may slowly and this is independent of their measured evaporate once exposed to an ambient Printing Test single-point viscosities. condition, while some fluxes may absorb The printing test was done with In another similar experiment, we more moisture from the atmosphere. a DEK Horizon printer, using a noticed that for certain fluxes, the flux One of the key functions of flux is to 30µm-thick stencil and 20 mil aperture, imprint diameter varies over time (Figure clean oxides from the pad of the wafer/ on a bare Cu substrate. The printing 7). TACFlux®025 slumps badly, and this panel and the solder sphere, and to speed was 50 mm/sec and the pressure is an indication that the flux is sensi- promote good wetting and solderability was 1.2 kg. There was no gap between tive to the ambient environment. Mois- between the solder sphere and the pad. If the stencil and the substrate. The auto- ture absorption by the flux (caused by the solderability of flux is insufficient, it matic understencil wipe was activated increased humidity, measured as %RH) will lead to weak joint formation and/or after every print, using the Wet/Dry/ can be one of the causes. voiding. In some cases, controlled wet- Vac sequence. One substrate was printed We did another test to confirm the ting is needed for specific applications, every 2 minutes, and this process was behavior of this flux. For ease of visual which have special designs, and some- continued for 2 hours. At least 10 points inspection, we doped the flux with UV times different sized spheres are used. of the flux imprint diameters were mea- sensitive material, printed it on a sub- Typically, the request for controlled wet- sured, for substrates printed every 12 strate, and checked the slump behavior ting is to ensure the solder sphere stays minutes up to 120 minutes (2 hours). over time of exposure to moderately high where it is during reflow, and also to Figure 6 shows an example of measure- humidity at 67% RH. The results showed control the collapse of the solder sphere ment. This measurement, though tedious, that bad slumping behavior could lead and ensure the coplanarity of the bump allows monitoring of the printing con- to missing or double ball issues, as the after reflow. Hence, in such cases, the wetting (solderability) of the flux needs to be optimized according to the application and its requirements.

Solderability Testing for solderability was done by printing flux onto a OSP-coated copper coupon using a stencil. Next, 96.5Sn/3Ag/0.5Cu (SAC305) 28 mil solder spheres were placed onto the flux using an automated pick and place Figure 7. Flux imprint diameter can vary Figure 8. Flux tackiness variation over time. machine. The coupon with the printed drastically over time. flux and spheres was then reflowed in a meptec.org SPRING 2018 MEPTEC REPORT 19 PACKAGING

BTU oven in a nitrogen-purged environ- acteristic is especially important if there film (ABF), and others. Most of these ment at <500ppm O2. After reflow, solder is warpage of the wafer or panel. polymers are not fully cured, hence dur- wetting was calculated from the height of During the course of ball-attach/ ing the ball-attach/bumping process, flux the solder bump; the solder spread ratio bumping process on a wafer or panel, may interact with the polymers, causing (%) was calculated using the following flux comes in contact with the passiv- the “volcano” effect and delamination. equation[4]: ation or dielectric material while provid- Other passivation materials or methods ing good solderability for the sphere include silicon nitride, silicon oxide, S = [(D-H)/H] * X100 to wet the pad. Some fluxes may not and Cu oxide. How flux interacts with Where: S = Spread factor be compatible with certain passivation these passivation materials is critical for D = Initial sphere diameter materials; they may react with the passiv- achieving maximum yield as well. H = Post-reflow solder height ation material and cause some stains or delamination issues as previously men- Flux Compatibility Test with The results of the solderability test tioned. Some flux residue may adhere Different Passivation Layers are shown in Figure 9. too tightly to certain passivation material To simulate the actual ball-attach/ that is more porous, thus causing it to be bumping process, flux was printed onto more difficult to be cleaned effectively. the substrate to be tested. Two different types of substrate can be used for test- Types of Passivation Materials ing. One was only with the passivation There is a broad range of polymer material (without any pad opening) to passivation materials with various study the interaction between the flux properties for WLP. The selections are and passivation material; usually this primarily based on the properties of the will be used first for a quick and easy polymers: high glass transition tem- initial screening process. A second type Figure 9. Spread factor of fluxes on fresh perature (Tg), better adhesion, excellent of substrate which was coated with the and baked OSP Cu coupon. mechanical/electrical/thermal properties, passivation material and pad opening can good chemical resistance, low moisture be used. This will confirm if the flux will When controlled wetting is desired, absorption, photosensitivity, low cur- cause any delamination of the passivation fluxes with a lower spread factor are ing temperature, finer line/space (L/S) material from the RDL. appropriate. If a more activated flux requirements, and others[5]. The perfor- The substrates printed with flux with better wetting is needed, especially mance of polymers plays a major role were reflowed using standard reflow on oxidized or contaminated pads, then in the build-up structure of WLP. Low-k conditions. In order to study worst case fluxes with a higher spread factor should materials are preferred because a high scenarios, the process of printing flux be chosen. capacitance reduces the computing speed onto the substrate and reflow, is repeated Movement During Reflow (MDR): between integrated circuits. In addition, two more times. In total, the substrates The ability of the flux to hold spheres in the selection of the optimal polymer for go through the reflow process three place during reflow was studied by using a given application depends not only on times. More flux and heat cycles induce a proprietary movement during reflow its physical and chemical properties and increased incompatibility of flux with (MDR) test (Figure 10). This used the processability, but also on its intrinsic the passivation material, if there is any. same test setup as the solderability test. interfacial characteristics. Newer poly- In this case, the PI substrate was being As seen in Figure 10, the move- mers are being continuously developed to used. We did not see any issue with this ment of the spheres is most severe with meet the stringent demand of advanced flux after one reflow, but after being WS-676, followed by TACFlux®25, and packaging technology for higher I/O and reflowed two and three times, a white flux 759-16-2. The best result, or least better reliability. Most commonly used ring was etched onto the substrate along movement, for the MDR test is flux 759- are polyimides (PI), benzocyclobutene the original flux print area, even though 16-2. This flux can hold the sphere in polymers (BCB), poly (benzoxazole) all the flux residue was effectively place very well during reflow. This char- s (PBO), epoxies, Ajinomoto build-up removed. Other examples in Figure 11 show that some fluxes caused delamination and discoloration on the passivation material. A halo of stain can also be seen around the solder bump. From the many compatibility tests with various passivation materials, we found that generally most fluxes have good compatibility with PI material, but for some other materials, Tac25 WS676 759-16-2 there may be challenges of this type that will need to be verified individually. Figure 10. Sphere movement during reflow test. It is important to note that indications

20 MEPTEC REPORT SPRING 2018 meptec.org Good Delamination and Discoloration after Reflow Figure 11. Incompatibility of flux with passivation material. of stains and discoloration do not always correlate with reliability concerns for the finished package. We have experienced that even with some minor stains around the bumps on the passivation material, the package still passed the required reliability test. As long as there is no further degradation or delamination encountered during or after the typical semiconductor packaging reliability test, the solder bumps can pass all the mechanical testing (e.g., bump shear test) and the package passes all the functional and electrical testing. The stains are merely cosmetic and are deemed acceptable.

CONCLUSIONS The challenges of ball-attach process using flux for FOW/PLP and flux compatibility with various kinds of passivation materials have been investigated in this study. Some important results and Figure 12. FOWLP after ball-attach process. recommendations are summarized in the following. • In order to achieve a robust ball-attach/ • Flux compatibility with these pas- cron. Some of the testing shown above is bumping process for the FOW/PLP, an sivation materials needs to be studied so the results of the consortium work. Addi- appropriate flux needs to be selected that the long-term reliability of the pack- tional appreciation is extended to Dr. based on each specific application. age will not be compromised. Certain Andy Mackie, Senior Product Manager, • Consistency in flux printing is deter- chemistries of passivation materials may Semiconductor and Advanced Assembly mined by the rheology stability of the be more sensitive to a particular flux Materials, Indium Corporation for assist- flux, which can be characterized using chemistry, for example. ing with the technical content of this the viscosity and tackiness test as simple • Working closely together with all the paper. measures of the more complex rheology. different material vendors is key for the • Lengthy printing test with flux imprint success of the ball-attach/bumping pro- References diameter measurement can also be cess. Figure 12 is a cross-sectional view [1] John Lau, Ming Li, DeWen Tian, Nelson Fan, Eric Kuah, Wu Kai, Margie Li, J. Hao, Zhang Li, conducted to confirm its printing perfor- of a good FOWLP after the ball attach/ Kim Hwee Tan, Rozalia Beica, Cheng-Ta Ko, Yu- mance as a function of both rheology and bumping process. The solder sphere wets Hua Chen, Sze Pei Lim, Ning Cheng Lee, Koh Sau Wee, Jiang Ran, and Cao Xi, “Warpage and Thermal the environment. well to the pad while maintaining a good Characterization of Fan-out Wafer-Level Packaging” • During reflow, it is important for the bump shape and height. This is what we IEEE/ECTC (May 30 - June 2, 2017) Orlando, FL flux to hold the solder spheres in place, desire to achieve in the ball attach/bump- [2] Ramachandran K. Trichur, Tony D. Flaim, “Pro- especially when warpage is a common ing process of the FOW/PLP. ◆ cess challenges for temporary bonding material in issue for FOW/PLP. fan-out packaging”, Chip Scale Review, May-June 2017 • Another key function of the flux is to Acknowledgement [3] Cassandra Melvin, Roger Massey, “Fan-out provide optimum solderability to achieve The authors of this article extend packaging: a key enabler for optimal performance in good bump coplanarity across the whole a special thanks to the members of the mobile devices”, Chip Scale Review, Jan-Feb 2017 wafer or panel, creating a reliable sol- FOW/PLP consortium, which consists [4] Japanese Industrial Standard JIS-Z-3197 Testing der bump with good mechanical and of various participants from ASM, Dow/ Methods for Soldering Fluxes electrical connection for the subsequent DuPont Chemical, Huawei Technologies, [5] M. Töpper, “The Importance of Polymers in process. Indium Corporation, JCAP, and Unimi- Wafer-Level Packaging” meptec.org SPRING 2018 MEPTEC REPORT 21 ASSEMBLY

The Artificial Intelligence Factory Becomes a Reality

Phil Marcoux PPM Associates

SOME REFER TO THIS AS “INDUSTRY 4.0” some as “Machine to Machine” (M2M), others as the more unsettling “Dark Factory”. Whatever we call it the purpose is still the same, i.e., to enable the machines doing our IC and SMT assembly to communicate and do production without the need for human intervention. While not a new concept, the idea of being able to quickly report manufacturing problems and status intel- ligently has always been a goal of any- one striving to operate a quality, efficient factory. In W. Edward Deming’s book “Out of Crisis” first published in 1982 he lists “break down barriers between areas” as one of his guiding fourteen points to achieve total quality management.[1][2] Profits and cost reductions are a driving factor for Industry 4.0 particularly in industries routinely characterized with razor thin profit margins as electronic assembly. In a study announced last year Figure 1. Siemans Amberg Germany SMT Facility. Source: Siemans from PWC, “managers surveyed around the world expect to achieve cost reduc- the 2016 IPC APEX show even though rection and control. One example in IC tions of on average 3.6% per year and it was first proposed by German industry assembly could be wire no sticks due to additional revenue of around 2.9% annu- in 2003[4][5] (see Figure 1). improperly etched pads. The 4.0 factory ally. In absolute terms, this corresponds However a new communications could be capable of quickly identifying to $US 421 billion in year-on-year cost effort, The Hermes Standard, seems to the bad die lot and replace it with new and a simultaneous yearly increase in have enough support to give it broad die. On an SMT line an example would turnover of $US 493 billion.”[3] acceptance. The Hermes is being driven be solder opens which the post reflow A perennial obstacle for the M2M from within the SMT assembly commu- inspection station may pinpoint as factory has been a communication stan- nity and has gained support from seven- clogged openings on a particular stencil. dard that ties design, materials, assem- teen leading manufacturers. It’s expected Ideally the sensors measure and bly, test, and other processes together to gain wider acceptance when the IPC report only the critical elements of the with dissimilar pieces of equipment and SEMI organizations promote greater process they perform. For example, a and suppliers. There have been several interest. robotic arm programmed to pick up and attempts in prior decades (after all fully Basically all machines in a process place an IC package should sense and automated SMT has been around since are equipped with sensors. These sensors report that it successfully picked up, 1982). One of the more recent efforts to collect data and are capable of feeding it griped, positioned, and properly placed make M2M factories a reality is called both upstream to the potential problem the part. Any other sensors, such as tem- Industry 4.0 of Industrie 4.0 outside of sources as well as into an augmented perature, humidity, remaining parts in the US. This seems to have only become realty computing center which can help a slot may be too much or unnecessary a widely used buzz phrase in the US at make rapid decisions on process cor- information.

22 MEPTEC REPORT SPRING 2018 meptec.org Status of Standards Efforts In addition to the Hermes efforts The Hermes Standard – Why does it show such great promise? there are other industry driven efforts • 17 leading manufacturers have already joined the initiative: ASM, ASYS, CYBEROPTICS, ERSA, to create uniform communication KIC, KOH YOUNG, MIRTEC, MYCRONIC, NUTEK, OMRON, PARMI, REHM, SAKI, SMT, VISCOM, standards. The FDT Group (www. YAMAHA and YJ LINK. fdtgroup.org, Belgium) became an • It’s an open, modern standard: The Hermes Standard is based on TCP/IP- and XML, is com- official association in 2005 by a num- pletely open and therefore free of charge for any manufacturer and all users. ber of leading automation firms: ABB, • It’s got a solid time and work schedule: the initiative has an ambitious and clearly defined Endress+Hauser, Invensys (now Schnei- time line. By the end of June, the specifications for the standard will be presented in the first der Electric), Metso, and Siemens. In version. And at this year’s productronica, the active manufacturers intend to be ready to show 2008 they joined with the OPC Foun- first solutions for cross-vendor communication based on the standard. dation (www.opcfoundation.org) “to provide greater access to information http://www.smart-smt-factory-forum.com/general/progress-manufacturers-agree-on-open-standard-for-m2m- throughout the enterprise by making communication-for-smt-assembly-lines/#comment-4394 device-specific information available via the FDT/OPC Unified Architecture Figure 2. Factory or Industry 4.0 - The Basic Concept. information model.[6] SAP and Bosch joined efforts in late 2016 to promote a different standard. Machines talking to machines? Where are the humans? Humans while essential for critical decision skills have become a liability when near instantaneous decisions are needed to maintain high flows of production. There will always be a need for human interaction to program and manage and maintain a 4.0 factory. But the immense data storage and data access from Big Data sources and Cloud Com- puting (See Figure 3) combined with machine learning capability are replacing many of the human tasks performed on current SMT and IC assembly lines. As cited by the PWC study[3], AI and M2M within the electronics indus- Figure 3. The IPC’s 2-17 Connected Factory Initiative Subcommittee is developing a machine try offer very high rates of return on data interface standard, “Connected Factory Exchange or CFX”. [5] investment. Our industry is very capital intensive and any improvements in yield and material costs translate into almost [2] http://asq.org/learn-about-quality/total- open-standards/29659189157150 quality-management/overview/deming-points. immediate profits. However, our industry [8] https://derinet.vontobel.com/CH/ html has always been proud of its competitive Download/AssetStore/cfebecbf-54d6-4a84- zeal. As a result standards, even simple [3] http://pwc.blogs.com/press_room/2016/04/ ae3e-3aae9fe21f45/Industry%204%200%20 ones take a lot of time and patience. industry-40-uk-and-global-companies-to- Performance-Index_EN.pdf invest-over-us-900-billion-per-year-to- become-truly-digital.html The Ball is in the Buyer’s Court Phil Marcoux is a business mentor and Just as in the early days of personal [4] https://ipc.mit.edu/research/production/ infrequent angel investor for technology computers when various operating sys- industry-40-what-it-and-what-does-it-mean- businesses. He was co-founder of one the tems existed and with the current differ- firms first automated SMT factories in 1982, ences between Android and IOS systems [5] http://www.zdnet.com/article/germanys- co-founder of one of the first wafer level the decision is left to the buyer as to vision-for-industrie-4-0-the-revolution-will- packaging companies, book author, world when to jump on the Industry 4.0 train be-digitised traveler, and sea kayaker. He has been a member of the MEPTEC Advisory board and which standard to embrace. ◆ [6] http://www.pbsionthenet.net/arti- for several years and through several cle/128877/Significant-progress-on-machine- technology inflexion cycles. Phil’s Linkedin References data-interface-standard.aspx link is https://www.linkedin.com/in/phil- [1] Demings, “Out of Crisis”. MIT Press, [7] https://www.designnews.com/automation- marcoux-5122a04/ ISBN-13: 978-0911379013 motion-control/iot-industry-40-encourage-fdt- meptec.org SPRING 2018 MEPTEC REPORT 23 Your Microelectronic Package Assembly Solution for MEMS Sensors

Product Launch – Ready for the Big Day?

William Boyce SMART Microsystems Ltd.

PREVIOUS SMART ARTICLES HAVE discussed product design concepts and developing a robust manufacturing process in microelectronics. Some of the elements leading up to and ensuring the success of “the big day” (product launch) have been presented. In theory, if an organization executed on a robust design and a properly developed assembly process, there ought to be a flawless launch. If this is the case, then why are so many product launches flawed? Experience shows that, in some part, all new product launches have some degree of difficulty that needs to be overcome. That is why it is critical to do everything possible to make it successful. Whether launching a product or a subassembly for a product, the challenges can be equally as demand- Figure 1. Projected Demand and Capacity. ing. The key to a well-executed product launch is a thoughtful, well-documented design that meets the customer require- review is encouraged to ensure that all plan that contains several crucial element. Meanwhile, the process team can risk areas are being effectively addressed. ments. A 3-year product volume ramp be working concurrently to meet the Like all of the tools in this process, this plan, a capacity ramp plan, FMEA, projected launch date with a process information should flow from the top PFMEA, risk analysis, NPD readiness capacity ramp plan that will exceed the down. In other words, all of the elements reviews, control plans, and engineer- projected volumes within the DTC goal. of the FMEA should be derived from ing process reviews are just some of the One approach is to design a scalable pro- the top most customer-driven assem- many tools that are used by ISO organi- cess that will meet 120% of the 3-year bly down to the lowest component and zations in preparation for product launch. projected volume utilizing a single shift. subassembly. The information gained Many times the question is asked, This allows for flexibility to scale up from the FMEA review should then be “When is it a good time to start planning the process capacity as demand grows captured in a launch control document. for product launch”? It is always impor- while maintaining the option of a second As an example, if the FMEA review tant “to begin with the end in mind”. shift for non-sustained periodic spikes in indicates a potential risk to the supply Planning for product launch should begin demand. chain by some unknowns in the process, on day one of the product concept. If the Failure mode effects analysis (FMEA) the control plan may require the buildup product concept has been properly vet- and process failure mode effects analy- of some “safety stock” to mitigate that ted, then the design to cost (DTC) goal sis (PFMEA) are great tools which lie risk. Because safety stock has a cost and projected volume product demand at the core of any six sigma or quality associated with it, which is preferable should be well understood at the begin- program. These tools, when used prop- not to carry for the life of the product, it ning of the project. These two pieces of erly, can provide valuable insight into will be used as a launch control only, and data, along with the upstream customer the design and process weaknesses of a there will be a call out point for when it requirement, should drive the design, the product. When coupled with a thoughtful is eliminated. Preferably, this happens in process, and the 3-year product volume risk analysis, the outcome is a stronger, production once it is demonstrated that ramp plan. With these pieces in place, the more robust design and process. Even safety stock is no longer required. design team can work toward a frozen at the subassembly level periodic FMEA Other tools, like the engineering pro-

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cess reviews, can be used as inputs to the launch plan. Often time these tools are either overlooked or conducted indepen- dently in a format that is not captured in the launch plan. Engineering process reviews should definitely be captured in a launch plan. This way, full advantage of the product knowledge on the design team and the process knowledge of the process engineering team can be taken. Too often, a problem is encountered later in the product launch cycle, only to dis- cover that some individuals with product tribal knowledge not only knew about it, but took the time to actually document it in a separate format, like an engineering design review or an Open Issue List (OIL), that never made its way back to the readiness review. This represents a tragic missed opportunity, not to mention an effect on the bottom line. Finally, conducting formal and peri- Figure 2. Example of PFMEA. odic new product development (NPD) readiness reviews is an essential element to a successful launch. If possible, these reviews should be conducted in person, at specified stages of development, containing members of all interested parties in the product launch. The reviews can be divided into four phases - concept phase, development, pre-launch, and production phases. For the meeting to be effective, design engineering, process engineering, sales (for the voice of the customer), purchasing, and management all need to be represented. These meet- Figure 3. SMART Concept Phase Review Checklist. ings should update any changes in the design or process, the status of the product relative to the DTC goal, the sched- occurs just prior to the program launch year product volume ramp plan, a capacity ule, and any customer changes or inputs. date, and contains the results of all the ramp plan, FMEA, PFMEA, risk analysis, A readiness review format that utilizes documentation and preparation to date. If NPD readiness reviews, control plans, and a traffic light process embedded in an the preparation steps have been effective, engineering process reviews – in order to NPD checklist format is effective. In the all the critical launch control elements have a well-executed product launch. ◆ NPD traffic light process, each element should be coded green and any yellow William Boyce is the Engineering Manager at of the review gets assigned one of 3 col- should have launch controls in place. SMART Microsystems. He has served in senior ors: green indicates an element is ready, There should never be a launch with a engineering roles over the last 19 years with yellow indicates a potential risk with critical element coded red. accomplishments that include manufactured follow-up, and red is an at risk element A robust design and a properly devel- automotive sensors. He is certified in EIT and with recommended actions. Any quality oped assembly process are necessary to Six Sigma Green Belt and is an industry recog- organization recognizes that this meeting ensure the success of a product launch. nized expert in Al wire bonding. Additionally, he must be clearly and formally documented Whether building the entire product or a designed and led the metrology lab and machine shop at Sensata. Mr. Boyce earned a Bachelor for it to be of value. A standardized form subassembly, there are always challenges of Science in Engineering degree from the Uni- that has all of the critical elements can that need to be overcome. It is important versity of Rhode Island and has been a member serve to facilitate the meeting and record to have a thoughtful, well-documented of the IMAPS New England Chapter for over the results. The final readiness review plan that includes key elements – a 3- 10 years.

26 MEPTEC REPORT SPRING 2018 meptec.org TECH BRIEFS

State-of-the-Art Technology Briefs A special feature courtesy of Binghamton University

We are pleased to continue this fea- of optical and electrical devices. (IEEC file such as electronic paper and business card. ture in the MEPTEC Report, brought #10318, Solid State Technology, 11/1/17) (IEEC file #10334, ECN, 11/7/17) to us by new Advisory Board member Dr. Gamal Rafai-Ahmed from Xilinx. Caltech engineers have developed a Harvard University and AFRL have The State-of-the-Art Technology Briefs nanoscale optical quantum memory comput- developed a new method called Hybrid 3-D contains articles from the Binghamton er chip analogous to a traditional computer printing, for digital design and printing of University S3IP “Flashes.” Full text memory chip. The team used the character- stretchable, flexible electronics. The process is available upon request through the istics of quantum mechanics (superposition uses additive manufacturing to integrate soft, IEEC Site at: http://www.binghamton. in which a quantum element can exist in conductive inks with a material substrate edu/s3ip/index.html. two distinct states simultaneously) in their to create stretchable, wearable electronic chip to store data efficiently and securely. devices. This is the first time a 3-D printer This device is an essential component for has used in a single process to print stretch- the future development of optical quantum able sensors with integrated microelectronic networks used to transmit quantum informa- components. The printer builds an entire tion. The technology enables better control stretchable circuit that blends the mechanical of photon/atom interactions and miniaturiza- durability of printed components with per- tion of quantum memory devices. (IEEC file formance of off-the-shelf electronics. (IEEC #10288, Photonics Media, 10/4/17) file #10316, Printed Electronics World, 10/30/17) RMIT University researchers used liquid metal to create two-dimensional mate- Linköping University researchers have rials no thicker than a few atoms. This sig- developed the first material with conductiv- nificant breakthrough can revolutionize the ity properties that can be switched on and way we do chemistry in a manner to enhance off using ferroelectric polarization. The data storage and make faster electronics. organic molecules conduct electricity and The researchers dissolved metals in liquid contain dipoles. When an electrical field metal to create very thin oxide layers, which with the opposite polarity is applied, the previously did not exist as layered structures dipoles again switch direction. The polariza- and which are easily peeled away. Once tion changes, as does the ability to conduct extracted, these oxide layers can be used as current. The development has applications transistor components in electronics. The for future small and flexible digital memo- thinner the oxide layer, the faster the elec- ries, and for a new generation of solar cells. tronics are. Thinner oxide layers also mean (IEEC file #10291, Science Daily, 10/18/17) the electronics need less power. (IEEC file #10293, Science Daily, 10/19/17) Imperial College London researchers Keio University researchers have have paved the way for computers based on used a single-step, laser-based method to An ultra-flexible organic flash memory light. Light is desirable for use in comput- produce small, precise hybrid microstruc- that is bendable down to a radius of 300μm ing because it can carry a higher density of tures of silver and flexible silicone. By com- has been developed by KAIST. The memory information and is much faster and more bining soft materials, such as engineered tis- has a significantly-longer retention rate efficient than conventional electronics. By sue, with hard materials that add functions, with and a programming voltage consistent squeezing light into a channel only 25 nano- such as glucose sensing, this laser processing with the present industrial standards. This meters wide, the team increased the intensity technology could enable smart factories that memory technology can be applied to non- which allows the photons to interact more use one production line to mass-produce conventional substrates, such as plastics strongly over a short distance, changing the customized device. With this technique, the and paper. By fabricating the proposed flash property of the light that emerged from the metal component of the microstructures ren- memory on a 6-micrometer-thick ultrathin other end of the channel. This is a signifi- ders them electrically conductive while the plastic film, researchers demonstrated virtu- cant step forward by reducing the distance elastic silicone contributes flexibility. This ally foldable memory devices. They also over which light can interact by 10,000-fold unique combination of properties makes succeeded in producing the memory on bringing optical processing into the range of the structures sensitive to mechanical force printing paper, which can provide a future electrical transistors. (IEEC file #10363, Sci- and could be useful for making new types way for disposable smart electronic products ence Daily, 11/30/17) meptec.org SPRING 2018 MEPTEC REPORT 27 TECH BRIEFS

Columbia University researchers have CAGR for packaging versus 14.1% for are synthesized miniature semiconductor engineered “artificial graphene” by recreating devices. MEMS devices are characterized by crystals. Quantum dots are small, emit a the electronic structure of graphene in a semi- a wide range of different designs and manu- single, pre-determined wavelength of light, conductor device. While artificial graphene facturing technologies, with no standardized and can be created synthetically. The smaller has been demonstrated in other systems such processes. Companies will have to consider the diameter of the crystal, the shorter its as optical, molecular, and photonic lattices, performance of each component as well as wavelength. Larger crystals emit orange and these platforms lack the versatility and poten- the application constraints. These constraints red light, while smaller crystals emit blue tial offered by semiconductor processing tech- include low cost packaging for consumer and green. Applications for QDs include nologies. These artificial graphene devices applications, and the ability to withstand photovoltaic cells, image sensors and panel could be platforms to explore new types of harsh environments for specialized applica- displays. The production of QDs is expected electronic switches, transistors with superior tions. (IEEC file #10327, Solid State Technol- to increase by 20-fold going from 100kg in properties, and potentially new ways of stor- ogy,10/30/17) 2015 to over 2 metric tons in 2026. (IEEC file ing information based on exotic quantum #1034?, US-Tech, 11/1/17) mechanical states. (IEEC file #10380, Science Daily, 12/12/17) The University of Cambridge has developed a method to print washable, and University of Texas researchers have stretchable electronic circuits into fabric. This developed a self-healing gel that repairs and development is a major step for applications connects electronic circuits with applications in smart textiles and wearable electronics. in foldable electronics. The new ‘supergel’ The new textile electronic devices are based material has high conductivity and strong on low-cost, sustainable and scalable inkjet self-healing properties. The team created printing of inks based on graphene and other the self-healing gel by combining two gels: two-dimensional materials, and are produced a self-assembling metal-ligand gel that pro- by standard processing techniques. The gra- vides self-healing properties and a polymer 3-D printed braces using flexible, non- phene circuits were directly printed onto fab- hydrogel. Until now, self-healing materials toxic batteries can reduce the time and cost ric and survived when subjected to 20 cycles have relied on application of external stimuli involved in realigning and straightening in a washing machine. (IEEC file #10345, such as light or heat to activate repair but teeth. KAUST researchers have developed an Science Daily, 11/8/17) this is the first time it has been done without orthodontic system that involves placing two external stimuli. (IEEC file #10405, NewsX, near-infrared light-emitting diodes (LEDs) 11/30/17) with one lithium-ion battery on every tooth in a semitransparent, 3D-printed dental brace. The LEDs can be programmed by the dentist MARKETMARKET TRENDS TRENDS and the brace would be removable to allow the batteries to be recharged. Phototherapy Advanced wafer-level packaging tech- enhances bone regeneration and reduces the nologies hold the key to meeting future tech- time and costs involved in corrective ortho- nology needs, from mobile devices, automo- dontics. (IEEC file #10323, R&D, 10/24/17) tive applications, and enabling the Internet of Things (IoT). Flip chip technology is replac- The number of connected IoT devices ing wire bonding for many high-performance worldwide will jump 12% annually, from chips, and wafer level packaging (WLP) is nearly 27 billion in 2017 to 125 billion in The smartphone industry is expected replacing flip chip packages. Market forecasts 2030. Global data transmissions are expected to undergo a drastic shift in designs and show that WLP will overtake flip chip ship- to increase from 20% to 25% annually to functionalities next year, with global handset ments in 2018 and then continue growing 50% per year in the next 15 years. The entire vendors competing to be the first to introduce at a compound annual growth rate of 15% IoT is built upon these four innovational pil- foldable mobile devices. The world’s lead- compared to just 5% for flip chip. To meet the lars: new connections of devices and informa- ing display and smartphone manufacturers needs of thinner mobile devices, fan-out WLP tion; enhanced collection of data that grows such as Samsung and LG have unveiled (FO-WLP) enables redistribution of I/Os from the connections of devices and informa- their “foldable” display prototypes in recent beyond the chip footprint. (IEEC file #10307, tion; advanced computation that transforms years, hinting at their plans to equip their Solid State Technology, 10/24/17) collected data into new possibilities; unique new mobile devices with the next-generation creation of new interactions, business models displays. Samsung Electronics has included The MEMS packaging market is and solutions. (IEEC file #10326, Solid State foldable smartphones in the mobile unit’s expected to grow from $2.56 billion in 2016 Technology,10/25/17) annual roadmap for next year. The foldable to $6.46 billion in 2022, showing a 16.7% hype comes with the rise of the organic light- CAGR over this period. The MEMS packag- IDTechEx forecasts that the demand emitting-diode (OLED) display as a new ing market’s value is growing faster than the for quantum dots will increase significantly norm for premium smartphones. (IEEC file MEMS device market’s value at a 16.7% over the next 10 years. Quantum dots (QDs) #10350, The Korean Times, 11/10/17) ◆

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meptec.org SPRING 2018 MEPTEC REPORT 29 Miniaturization Spurs EMI Innovation at the Package Level

Jinu Choi and Doug Dixon Henkel Electronic Materials LLC

DEVICE DESIGNERS AND ELECTRON- ics specialists are all too familiar with the Traditional Technology challenges surrounding electromagnetic interference, more well-known by its acronym, EMI. A disturbance to an electrical circuit due to electromagnetic coupling from external sources, EMI is quite common with radio-frequency (RF) emitting devices such as smartphones, tablets and IoT-enabled technologies, among others. In order to limit the spread of the interference from one component to another within an electronics assembly and/or reduce outside interference, effective isolation must be employed. Tradition- ally, this has been achieved through the use of EMI shielding caps, which are also System and Board Level often referred to as cans or faraday cages. These metal lids attach to grounding pads • Custom designed metal enclosures/cans that cover a component or an assembly to minimize EMI between components within a design and eliminate cross talk • Requires large board space adding weight and of components on PCBs. (Figure 1) His- thickness to the design with complex re-workability. torically, the attachment of the shield has occurred at the PCB assembly phase, but Figure 1. Conventional EMI shielding caps are limiting for modern, streamlined designs. that’s all changing. With miniaturization comes greater move EMI management from the board are often quite narrow and high, ranging integration at the package level. Not only level to the package level. anywhere from aspect ratios of 5:1 up to are device dimensions becoming smaller Significant package-level EMI shield- 10:1. In order to completely fill the gap, with thinner package profiles, it’s also ing progress has been achieved with an simultaneous air displacement and paste quite common to have chips with higher innovative, compartmental shielding deposition is required to protect against and lower operating frequencies within method designed to allow separation of voiding and optimal EMI safeguarding. the same package, as is the case with chips housed within the same device, pro- In addition, the conductive paste must system-in-package (SiP) devices. Because tecting against signal interference. Using have strong adhesion properties with conventional EMI shielding caps don’t this technique, target dies are identified minimal shrinkage to ensure no separa- enable super-thin package dimensions or and a small channel is routed through the tion from the grounding floor and the protect against in-package interference, molded SiP via precise laser cutting. Once mold compound sidewalls of the trench. new strategies must be used to effectively the trench is created, a high-flow, highly- Essentially, this technique, along with a shield miniaturized devices and adequate- conductive material is jet-dispensed conformal coating, creates multiple fara- ly isolate varying frequency chips within into the trench and then cured. With this day cages around the targeted die with- the same package. Two new approaches method, high aspect ratio (aspect ratio = out altering the footprint or the height of have emerged as alternatives to traditional X dimension/Y dimension) filling is criti- the component, while delivering highly- EMI shielding techniques and effectively cal and can be challenging, as the trenches effective EMI protection.

30 MEPTEC REPORT SPRING 2018 meptec.org NON CONDUCTIVE FILM Advanced Packaging Technologies Get Reliability Boost From NCF Material

Today’s smaller footprint, greater I/O package designs dictate use of emerging technologies like through-silicon via (TSV) and copper pillar to address form factor requirements. With this come thinner dies for 3D stacking and higher-density bump, driving the need for greater protection to ensure reliability. In the memory market, where TSV applications with die less than 100 μm thick are common, Henkel’s new non-conductive film (NCF) technology provides controlled flow, stability and protection without the concerns associated with paste-based underfill materials and challenges posed by thermal compression bonding.

For more information, contact 1-800-562-8483 or visit us online at henkel-adhesives.com/electronics

All marks used are trademarks and/or registered trademarks of Henkel and its affiliates in the U.S., Germany and elsewhere. © 2017 Henkel Corporation. All rights reserved. (5/17) Packages placed on Carriers loaded Spray coating Carriers loaded Package PI tape/carrier into spray equip. in RT, ambient into magazine singulation (auto. pick & place) (conveyor) (conveyor) (conveyor)

Magazine loaded Cure Magazine unloaded Packages picked up into batch oven (Convection, from oven and sorted (manual) 175˚C, 1 hour) (manual) (auto. pick & place)

Figure 2. The EMI conformal shielding process dramatically raises throughput with the ability to process either singulated or strip formats, resulting in a much lower cost per part while delivering ultra-thin protection for today’s thinner designs.

Along with in-package chip isolation, a new process for ultra-thin, on-package Conformal Shielding shielding helps eliminate the use of conventional EMI caps, streamlines processing and offers a lower-cost alternative to other on-package techniques. Current methods that coat the exterior of a component with a protective EMI shielding material are usually quite capital-inten- Compartment sive. Sputtering, for example, is a physi- Shielding cal vapor deposition process that requires substantial capital investment with low units per hour (UPH) and high mainte- nance costs. With sputtering, metal is Figure 3. Compartment shielding isolates chips within a package, while ultra-thin deposited onto the plasma treated, mold- conformal shielding coats the package exterior for maximum EMI protection. ed package in a vacuum chamber and normally entails depositing several layers EMI conformal shielding solution was process that provides a lower cost per of material. Another popular approach to initiated. Building on atomization spray package, much higher UPH, smaller floor on-package shielding is plating, where technologies used to coat PCBs and other space and easy scalability. In fact, as com- electroless copper and electrolytic copper/ electronics, the new spray-on EMI shield- pared to sputtering, conformal shielding nickel are coated onto the mold coming material provides superior processing can reduce cost of ownership by as much pound. Plating delivers good thickness and performance advantages as compared as 60%, while raising UPH by a factor of control like sputtering, but with respect- to alternative metal coating techniques. four. And, for SiP devices that undergo able UPH at the strip level and a relatively Simple and easy to support in a batch pro- compartmental shielding, the spray-on low material cost. However, plating does cess, a spray-coated, flowable and highly coating is completely compatible with have drawbacks, including environmental conductive material is applied to the trench filling materials, allowing packag- contamination which has raised high con- molded component, ensuring full covering specialists to use both approaches for cerns and restricted mass deployment. In age of the top and sidewalls for maximum EMI shielding. (Figure 3) addition, surface pre-treatment and com- EMI protection. (Figure 2) The new spray As package- and chip-level functional- plex masking procedures must be used; coating method allows for very high UPH ity continues to increase so, too, will the no singulated packages can be processed and multi-part processing in either singu- need for novel and effective solutions as plating can only manage strip formats; lated or strip formats for high throughput. for EMI shielding to accommodate ultra- and, it is a wet process that requires sub- No pre-treatment of organic surfaces is small package profiles. Trench filling and stantial floor space. required for this single-layer application, conformal shielding are a significant, cost- Given these realities along with the which can be applied as thin as 3-5 µm to effective step forward for in-package and industry’s desire to raise performance, accommodate today’s ultra-thin package on-package interference resistance. And, increase UPH, lower cost and reduce pro- profiles. The material delivers excellent in the longer-term, shielding at the wafer cess complexity, development of a new shielding effectiveness with a simple level may become reality. ◆

32 MEPTEC REPORT SPRING 2018 meptec.org OPINION

 continued from page 34 Table 1. Projected Top 10 OSAT Providers by Revenue for 2017 (Revenue in US$ Million) houses owned and operated by the big chip guys were later sold to independent packagers. In the 1970s, Intel operated an assembly and packaging plant near Manila, as did several of the other major semiconductor companies. That, like so many other company O/Os was later sold to one of today’s large independent operation. In the case of Intel, Amkor became the owner. Source: TrendForce, Oct., 2017 To repeat, the old days were not so Note: The full names of companies listed in the table are as follows – ASE Group (Advanced Semi- golden for the early offshore subcons. conductor Engineering, Inc.), Amkor (Amkor Technology, Inc.), JCET (Jiangsu Changjiang Elec- They truly got little respect, then. Today, tronics Technology Co., Ltd.), SPIL (Siliconware Precision Industries Co., Ltd.), PTI (Powertech when they post revenues in the billions Technology Inc.), TSHT (Tianashui Huatian Technology Co., Ltd.), TFME (Tongfu Microelectron- every year, as ASE and Amkor do, they ics Co., Ltd.), KYEC (King Yuan Electronics Co., Ltd.), UTAC Group (United Test and Assembly get plenty of respect from customers and Center Ltd.), ChipMOS (ChipMOS Technologies Inc.). from Wall Street analysts who follow them on the international stock markets. SPIL will become an operating unit of Not only have the OSATs become Today, the largest independents are ASE very soon. very big commercial enterprises, they are growing mostly by acquisition. Small While 2017 may not have been a now responsible for advancing the tech- to medium-sized assemblers have been great year for the OSATs, it was a very nology of chip assembly, packaging and snapped up by the largest operations. good year. Indeed, the testing and pack- test. The future, most important advances This is true for the low-cost Asian plants, aging industry is expected to register in the packaging business belong to the but even in costly Japan. Last year, one of recovery and growth in 2017, in contrast OSATs, not to the chip makers. ◆ the latest acquisitions was, oddly, a small to the 2016 revenue result that showed a Portugal-based assembler, Namics, now slight annual decline. Ron Iscoff is the editor of Test, part of Amkor. It’s likely the full story Last year, TrendForce reported, “the Assembly & Packaging TIMES, and on this acquisition is still to be written. main revenue driver was the increase in has been covering the semiconductor For many reasons, OSATs in Europe have the amount of IC components demanded industry for nearly four decades for not done well for decades, and most have for mobile devices. The strong demand publications that include Electronic vanished. for IC components has also expanded the News, Electronic Packaging & Pro- The largest OSATs are rich and deployment of advanced packaging solu- duction, Semiconductor International powerful enough to command attention tions that offer higher levels of integra- and Chip Scale Review. Email Ron at throughout the industry. Industry watcher tion and higher numbers of I/O connec- [email protected]. TrendForce, Taiwan, predicted OSATs tions.” in 2017 would grow by 2.2 percent over the prior year to reach $51.73 billion (See Table 1 above). PRESENTED BY The industry leader ASE Group, SPONSORED BY headquartered in Taiwan, reported a net revenue of $2.8 billion for Q4 2017. For the full year 2017, the group reported a revenue of $9.6 billion, up 12 percent year-over-year. Second-place Amkor Join Us For Lunch! Technology, a distant number two, report- THE SEMICONDUCTOR INDUSTRY SPEAKER SERIES ed Q3 sales of $1.135 billion and Q4 guidance between $1.050 billion - $2.130 Held Monthly billion. Amkor is likely to show 2017 rev- January through June and September through December enues of slightly over $4 billion. Number three, JCET, is in an expan- SEMI Global Headquarters, Milpitas, California sive mode and acquired STATS ChipPAC in 2016. Fourth place SPIL has been the VISIT WWW.MEPTEC.ORG FOR EVENT SCHEDULE apple of ASE’s acquisitionary eye for sev- AND MORE INFORMATION eral years. Initially SPIL rebuffed ASE’s takeover plans, but now it appears that meptec.org SPRING 2018 MEPTEC REPORT 33 OPINION

Assembly and Packaging – From Grunt Work to White Gloves

Ron Iscoff Editor Test, Assembly & Packaging TIMES

WHEN I WAS A YOUNG AND ogy (with the same money, owned by Dr. the independent assembly houses won a nimble trade reporter (several decades James Kim.) large contract from a big chip maker, a ago) writing for the then-beloved but There has been quite a change over celebration was in order. Industry stal- sadly now defunct weekly Electronic the past three-plus decades. People no warts, who have been around for years, News, there were more semiconductor longer make the subcons, now elevated like me, will probably remember the lav- company-owned chip assembly, pack- by name to OSAT (offshore semiconduc- ish parties several subcons threw during aging and test plants than independent tor assembly and test) the butt of their SEMICON West, when it was held at the facilities. The action then, as it is now, jokes. Today the leaders are very big San Mateo County Fairgrounds. was centered in Asia, and a lot of it was businesses – with ASE at the top, head- I don’t know what the parties cost in “grunt” work. quartered in Taiwan; followed by Amkor, today’s dollars, but little regard was paid Financially, the dozen or so indepen- with corporate offices in Arizona. to expenses to curry favor with poten- dent assembly shops offshore were not a Back in the day, however, the inde- tial customers. During one SEMICON factor in the industry. The revenue of a pendent contractors were supplying West, Dynetics imported the major dance dozen shops combined probably did not only a tiny fraction of the assembly and troupe from the Ballet Folklorico of the equal the revenue from a single semi- packaging business to the big fab houses. Philippines to entertain. conductor maker such as Intel or Texas On top of the big players’ demand for For quickturn work, the balance of Instruments. control of their packaging work, often the available contract assembly work In the 1970s, all the big guys oper- they did not trust the subs. It was, for went to a handful of U.S.-based opera- ated their own packaging shops. You semiconductors, a very young industry, tions, mostly located in or near Silicon know the names: AMD, Intel, Motorola, a new business model. It means turning Valley. Often the locals were founded Signetics and Texas Instruments. The over your sawn wafers to a plant thou- and run by former expats, who had cut belief was you weren’t really a full- sands of miles away where you had no their assembly-and-packaging teeth in service semiconductor provider unless direct oversight, other than sending an a semiconductor company-owned plant you had your own, very visible assembly engineer to inspect from time-to-time. in Asia. These U.S.-based subcons typi- shop. Several Japanese chip makers also Even though the female bonder opera- cally offered the short-run assembly and sited offshore, but those plants were in tors usually wore clean white lab coats, packaging of specialized products, such the minority. the operations at the independents were as military or medical – not too different All operated facilities to assemble, viewed with suspicion as “dirty” places. from today. package and test their own products in I visited a number of both the inde- People did not look to the assembly various parts of Asia, including Hong pendent and company owned/operated and packaging sector for great technical Kong, Korea, the Philippines, Malaysia houses in the 1970s in Korea, the Philip- advances. There was a job to be done, and Taiwan. China was not in the busi- pines and Taiwan. They were “manned,” period. The plants did it and moved on to ness at the time. In the 1970s, the big as it were, completely by young female the next task. There was little money for chip makers felt the stand-alone houses, operators neatly attired in starched R&D in assembly and packaging, beyond the subcons, were generally good only smocks, seated at manual and semi-man- what academics produced at industry for overflow work or for the simplest , ual die and wire bonders. The accepted conferences. Still it was a “feel good” low-tech jobs. corporate thought was that men would time in the backend – an onerous name The independent subcons included find the work too repetitive and too bor- for the latter stages in chip production. such names as Dynetics and Stanford ing. The only males, typically, were the How times change! The independent Micro Systems (named after its owner engineering staff, frequently comprised subcons, now accorded more respect as who attended Stanford University). Both of expats, who oversaw the banks of OSATs, are still typically in Asia and were in the Philippines and both no machinery, and programmed and main- account for huge revenues and huge unit longer exist. Then there was CARSEM tained the bonders. volumes. Almost all of the assembly in Hong Kong and ANAM, which was It was certainly an interesting and the Korean genesis of Amkor Technol- slightly cutthroat business. When one of continued on page 33 

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