1. ABoolean function produces an output that is also a member of the set {0,1} T 2. - A group of four binary digits is called a hextet. T 3. - A group of four bits is called a nibble T 4. - All computers provide a way of interrupting the fetch-decode-execute cycle T 5. - A Boolean operator can be completely described using a truth table. T 6. - Access is more efficient when memory is organized into banks of chips with the addresses interleaved across the chips. T 7. - Anything that can be done with software can also be done with hardware, and anything that can be done with hardware can also be done with software T 8. A cache hit happens when data is found at the main memory. F 9. A certain "black box" has 4 inputs and 16 outputs. Only one of the 16 outputs is asserted (set to 1) for each unique combination of the inputs. This circuit is called a multiplexer. F 10. A disadvantage of write through is that memory must be updated with each cache write. T 11. A k-stage pipeline can theoretically produce execution speedup of k as compared to a non-pipelined machine. T 12. Bus clocks maintain synchronization for I/O devices. T 13. Boolean algebra is a mathematical system for the manipulation of variables that can have one of two values T 14. - Computers with large main memory capacity can run larger programs with greater speed than computers having huge memories. F 15. - Cache is a type of permanent memory that can be accessed faster than RAM F temporary 16. Dirty blocks are those blocks that have been copied with errors. F 17. Decoder and Multiplexer are combinational circuits. T 18. Direct addressing is where the address of the data is given in the instruction. T 19. Dynamic RAM must be refreshed every few milliseconds to prevent data loss. T 20. EBCDIC stands for Binary Coded Decimal and encodes each digit of a decimal number to an 8-bit binary form. T 21. General purpose register architecture is faster than accumulator architecture. T 22. In MARIE, the Memory Buffer Register is a 12 bit register. F 23. In a general purpose register (GPR) architecture, registers can not be used instead of memory. F 24. If a carry out of the leftmost bit occurs with an unsigned number, overflow has occurred. T 25. If we have a 64K word memory ( word addressable ) , then the needed number of address lines is 14. F 26. If we have a 16K word memory (word addressable ) , then the needed number of address lines is 14. T 27. Instruction-level- pipelining is one example of Instruction-level-parallelism. T 28. In a direct mapped cache consisting of N blocks of cache, block X of main memory maps to cache block : X = Y mod N. F 29. Interrupts can be caused by hardwares only F 30. - Interrupts are not useful in processing I/O F 31. Integrated circuits contain collections of gates suited to a particular purpose T 32. In the sum-of-products form, ANDed variables are ORed together. T 33. - In one’s complement, as with signed magnitude, negative values are indicated by a 1 in the high order bit. T 34. Integrated circuits contain collections of gates suited to a particular purpose. 35. I/O cann't be memory-mapped-- where the I/O device behaves like main memory from the CPU’s point of view. 36. Immediate addressing is where the address of the data is given in the instruction. F 37. Java was designed for platform interoperability and performance. F 38. Level 2 cache is usually greater and faster than Level 1 cache. F 39. Memory addresses are always signed numbers. T 40. Memory addresses are always unsigned numbers. T 41. Many of today’s systems embrace Unicode, a 16-bit system that can encode the characters of every language in the world. T 42. - Physical memory usually consists of more than one RAM chip T 43. Registers hold data that can be readily accessed by the CPU T 44. SKIPCOND skips the next instruction according to the value of the PC. F 45. The Instruction Register IR holds an instruction immediately preceding its execution . T 46. The purpose of cache memory is to speed up accesses by storing recently used data in the main memory. F 47. The only memory that a computer has is used to store both data and instructions . F 48. - The Unicode codespace is divided into seven parts. The first part is for Western alphabet codes, including English, Greek, and Russian. F six 49. The term, “addressable,” means that a particular byte can be retrieved according to its location in memory. T 50. - The datapath consists of an arithmetic-logic unit and storage units (registers) that are interconnected by a data bus that is also connected to main memory T 51. The size of the significand determines the precision of the representation. T 52. - The hexadecimal numbering system uses the numerals 0 through 9 and the letters A through F. T 53. Static RAM must be refreshed every few milliseconds to prevent data loss. F 54. Unicode is a 16-bit code, occupying twice the disk space for text as ASCII or EBCDIC would require. T 55. Various CPU components perform discontinous operations according to signals provided by its control unit. F 56. “Write Through ” updates cache and main memory simultaneously on every write. T 57. We can improve CPU throughput when we increase the number of instructions in a program F 58. - Words can be any number of only bytes F 1* - ________ can be implemented using D flip-flops a. Registers b. Processors c. Memories d. All 2*- ________ is a set of wires that simultaneously convey a single bit along each line. a. A modem b. A bus c. A port d. A processor 3*__________ is the “brain” of the system. It executes program instructions. This one is a Pentium (Intel) running at 4.20GHz. Answer: The microprocessor 4* A direct addressing mode means a. the address of the operand is explicitly stated in the instruction b. the address of the operand is implicitly stated in the instruction c. the address of the operand is explicitly stated in the CPU d. None 5* Computer representation of a floating-point number consists of fixed-size fields a. Exponent b. significand c. sign d. All 6* In 8-bit signed magnitude, if positive 3 is : 00000011 then Negative 3 is : a. 10000011 b. 1100001 c. 11111100 d. None 7* In the MARIE RTL, we use the notation _______ to indicate the actual data value stored in memory location X a. M[X] b. M(X) c. M <- X d. M[X-1] 8* If the memory word size of the machine is 16 bits, then a 5M ´ 16 RAM chip gives us a. 4 megabytes of 16-bit memory locations. b. 5 megabytes of 16-bit memory locations. c. 50 megabytes of 16-bit memory locations. d. 5 megabytes of 32-bit memory locations. 9*- ISA stands for A computer's _________ Answer: Instruction Set Architecture 10* The MARIE ISA consists of only ________ a. thirteen instructions. b. Nighnteen instructions. c. thirteen buses d. thirteen CPU 11* The number of times per second that the image on a monitor is repainted is its a. refresh rate b. dot pitch c. displaying rate d. All together 12* Ports allow movement of data between a system and its ________ devices. a. external b. internal c. semi permenant d. shell 13* Serial ports send data as a. one pulse along one or two data lines b. a series of pulses along one or two data lines c. three pulses along one or two data lines d. a series of pulses along only one data lines 14* Way in which signed binary numbers may be expressed: a. Signed magnitude b. One’s complement c. Two’s complement d. All of what mentioned above 15* Write down the bit pattern for a LOAD instruction as it would appear in the IR: Answer: 0001000000000011 و د أآ/ *( اوح )* .