Practical Design of Buck Converter

Dr. Taufik Associate Professor Electrical Engineering Department California Polytechnic State University, USA

[email protected] http://www.ee.calpoly.edu/faculty/taufik Tutorial Outline • Brief Review of DC-DC Converter • Design Equations • Loss Considerations • Layout Considerations • Efficiency Improvement • Synchronous Buck • Resonant Buck • PWM Controller • Multiphase

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 2 Review: DC-DC Converter Basics • A circuit employing switching network that converts a DC voltage at one level to another DC voltage • Two basic topologies: – Non-Isolated • Buck, Boost, Buck-Boost, Cuk, SEPIC – Isolated • Push-pull, Forward, Flyback, Half-Bridge, Full-Bridge

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 3 Review: DC-DC Converter Basics

• When ON: The output voltage is the same as the input voltage and the voltage across the switch is 0. • When OFF: The output voltage is zero and there is no current through the switch. • Ideally, the Power Loss is zero since output power = input power • Periodic opening and closing of the switch results in pulse output PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 4 Review: DC-DC Converter Basics

TDT 11 ton VvtdtVdtVD0 ===Dutycycle== D t f = ∫∫oii() on s TT00 T • Duty Cycle range: 0 < D < 1 • Two ways to vary the average output voltage: – Pulse Width Modulation (PWM), where ton is varied while the overall switching period T is kept constant – Pulse Frequency Modulation (PFM), where ton is kept constant while the switching period T is varied PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 5 Review: DC-DC Converter Basics

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 6 Review: DC-DC Converter Basics

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 7 Review: DC-DC Converter Basics

Source Side Load/User Side DC-DC Converter

Wants: Wants: to switch DC Voltage and DC DC Voltage and DC Current Current

Wants: No AC Component No Harmonics

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 8 Review: DC-DC Converter Basics

Source Side Load/User Side DC-DC Converter

Gets: Wants: Current with some Voltage with some ripple ripple

Needs Filtering

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 9 What is Buck Converter?

• A dc-dc converter circuit that steps down a dc voltage at its input • Non-isolated hence ideal for board-level circuitry where local conversion is needed – Cell-phones, PDAs, fax machines, copiers, scanners, computers, anywhere when there is the need to convert DC from one level (battery) to other levels • Widely used in low voltage low power applications • Synchronous version and resonant derivatives provide improved converter’s efficiency • Multiphase version supports low voltage high current applications

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 10 The Basic Topology

Controller

• Two types of Conduction Modes – Continuous Conduction Mode (CCM) where Inductor current remains positive throughout the switching period – Discontinuous Conduction Mode (DCM) where Inductor current remains zero for some time in the switching period

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 11 The Basic Topology

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 12 Steady State Analysis of CCM Buck: Transfer Function

• Inductor is the main storage element • Transfer function may be derived from Volt Second Balance: – Average Voltage across Inductor is Zero in steady state – Inductor looks like a short to a DC

VvtvtL= Lon on+= Loff off 0

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 13 CCM Buck: Transfer Function

• When the switch is closed or ON – Diode is reverse biased since • Cathode (at Positive of Input) more positive than Anode (at 0 volt) – Voltage across inductor: vVVLon= S− O – Recall that: D = ton/T – Then, duration of on time, ton: tDTon = PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 14 CCM Buck: Transfer Function

• When the switch is OPEN or OFF – Inductor discharges causing its voltage to reverse polarity – Diode conducts since • Anode (0 volt) is more positive than the Cathode (at some negative voltage) – Voltage across inductor: vVLoff=− O – Recall that: t = T – t = T – DT Î off on tDToff =−(1 )

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 15 CCM Buck: Transfer Function

vtLon on+ v Loff t off = 0

()VVDTVSO−+−−=( O)(10 DT)

VDSOOO− VD−+ V VD =0

VDVOS=

• Average output voltage is LESS than Input Voltage

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 16 CCM Buck: Sizing Components

For MOSFETs: Vds and Id L and Ipk

C, V and Irms Vrrm, and If

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 17 CCM Buck: Inductor Current

• When switch is ON, Inductor is charging: di di VV− v = V −V = L L L = SO=⊕ L S O dt dt L VV− Δit=ΔSO LonL on VV− Δ=iDTSO Lon L

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 18 CCM Buck: Inductor Current • When switch is OFF, Inductor is discharging: di di −V vVL=− = L L ==−O LOdt dt L −V Δ=itO Δ LoffL off −V Δ=iDTO ()1 − Loff L

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 19 CCM Buck: Inductor Current

Average Inductor Current = Average Output Current = Vo/R

ΔiL

• We can then determine ILmin and ILmax

ΔiL VV0011(1)⎡⎤⎡ − D ⎤ IILLmin=− =−⎢⎥(1 − DTV ) = 0 ⎢ − ⎥ 22R ⎣⎦LRLf⎣ 2⎦

ΔiL VV0011(1)⎡⎤⎡ − D ⎤ IILLmax=+ =+⎢⎥(1 − DTV ) = 0 ⎢ + ⎥ 22RL⎣⎦⎣ RLf 2⎦

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 20 Sizing Inductor: Critical Inductance

Minimum Load (output current)

• ILmin is used to determine the Critical Inductance (Minimum Inductance value at which the inductor current reaches Boundary Conduction Mode) • Any inductance lower than critical inductance will cause the buck to operate in Discontinuous Conduction Mode

• Requirement is set either by means of maximum ∆iL or by specifying the minimum percentage load where converter still maintains CCM

• Set ILmin = 0, then solve for L = LC, then choose L > 1.05*LC

ΔiL ⎡ 1(1)− D ⎤ (1− DR ) II==0 − = V − max max LLmin 0 ⎢ ⎥ LC = 22⎣ RLfmax C ⎦ 2 f

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 21 Sizing Inductor: Critical Inductance (1− DR ) L = max max C 2 f

Calculated at Minimum • Calculated at Minimum Output Input Voltage Current = Rmax = Vo/Iomin • Iomin is either given as percentage of load to maintain CCM, e.g. 10% load with CCM • Switching frequency normally chosen by the designer • Or, Iomin is calculated as specified by maximum ∆i , • The higher the switching L such that Iomin = ∆i /2 frequency, the smaller the required L critical inductance, i.e. beneficial for reducing size of Buck

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 22 Sizing Inductor: Peak Current

Maximum Load (output current)

• ILmax is used to determine peak current rating of Inductor • Worst case maximum inductor current occurs at maximum load Î Maximum output power rating per specified required output voltage

Δi ⎡ (1D ) ⎤ Calculated from L 1 − min Highest Input IILLmax=+ = V 0 ⎢ + ⎥ 22⎣ RLfmin ⎦ Voltage

Chosen inductance value as discussed previously

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 23 Sizing Switch: Voltage Rating

• With ideal diode, the Vswitch-max = Vinmax

• For non-ideal diode, Vswitch-max = Vinmax + VF where VF is the maximum forward drop across the diode (calculated at maximum load current) • Use safety factor of at least 20%

• For MOSFET, the rating would be VDSmax PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 24 Sizing Switch: Current Rating

• Switch current rating is calculated based on average value • Draw switch current waveform and then compute the average value • By KCL, Inductor Current = Switch Current + Diode Current

• During tON, Inductor current equals switch current

• During tOFF, Inductor current equals diode current

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 25 Switch Current Waveform

iL

ONOFF ON OFF ON OFF t T2T3T

iSwitch

t

iDiode

t

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 26 Switch Current Waveform for Current Rating

iLmax iSwitch iLmin Average Value ON ON ON t 0 T2T

(iit+⋅) I = LLmin max on Switch 2⋅T ()[]iiiDT−Δ + ⋅ (2iiD−Δ) ⋅ I ==LLLmax max LLmax Switch 22⋅T

⎛⎞ΔiL IiSwitch=−⎜⎟ Lmax DIDID =⋅=⋅ L o ⎝⎠2

ISwitch−max>⋅ID o max max

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 27 MOSFET Rating Example

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 28 Sizing Diode (Schottky): Voltage Rating

• Known as PIV (Peak Inverse Voltage) or VRRM is the maximum voltage across the diode

• With ideal switch, the VRRM = Vinmax

• For non-ideal diode, VRRM = Vinmax + VSW where VSW is the maximum forward drop across the switch (calculated at maximum load current) • Allow at least > 20% safety factor

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 29 Sizing Diode (Schottky): Current Rating

• Same approach as that for the switch current

Average Value iDiode

OFF OFF OFF t T2T3T

()iit+⋅ I = LLmin max off F 2⋅T ([iiiDT−Δ] +) ⋅(1 − ) (21iiD−Δ) ⋅( − ) I ==LLLmax max LLmax F 22⋅T

IIFL=⋅−(11 DI) =⋅− o( D) IIFo>⋅−max(1 D min )

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 30 Schottky Diode Rating Example

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 31 Sizing Output Capacitor: Voltage Rating

• Capacitor Voltage should withstand the maximum output voltage

– Ideally: Vcmax = Vo + ∆Vo/2 – More realistic: Capacitor has ESR (Equivalent Series

Resistance) which worsens ∆Vo

– Output voltage ripple contributed by ESR is (ESR * ∆IL) – Suppressing ripple contribution from ESR • Reduce ESR (Paralleling Caps, Low ESR Caps)

• Reduce ∆IL by increasing L or increasing switching frequency

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 32 Sizing Output Capacitor: Minimum Capacitance

• The AC component (ripple) of inductor current flows through the capacitor, leaving the average flowing through the load • Capacitor current waveform will look like:

iC ONOFF ON OFF ON OFF t T2T3T

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 33 Sizing Output Capacitor: Minimum Capacitance

+Q iC -Q t T/2

T

VO ()1− DT 1− DV 1 ⎛⎞T ⎛⎞ΔΔiiLLL ()O qArea=⋅Δ=⎜⎟⎜⎟ == = 2 22⎝⎠⎝⎠ 2 8ff 8 8 Lf

q (11−−DV) O ( D) qC=⋅Δ⇒= Vo C =22 = ΔΔVLfVLfVVoo88() Δ oO (1− D ) C = min 2 Percent V 8Lf()Δ VoO V opp

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 34 Sizing Output Capacitor: RMS Current Rating

iLmax –Io = ∆iL/2

iC ONOFF ON OFF ON OFF t T2T3T

i Δi 2 ()1− D V i ==Cpk L = O Crms 3323Lf

(1− DV) i = min O Crms 23Lf

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 35 Sizing Input Capacitor: Voltage Rating

• Capacitor Voltage should withstand the maximum input voltage

– Ideally: Vcmax = Vinmax – More realistic: Capacitor has ESR (Equivalent Series Resistance) contributes to capacitor loss – Minimizing loss contribution from ESR • Reduce ESR (Paralleling Caps, Low ESR Caps)

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 36 Sizing Input Capacitor: Minimum Capacitance

iLmax –D*IO

iC ONOFF ON OFF ON OFF

–D*IO t T2T3T

(1− D)⋅⋅DI q= Area ⋅= t ⋅⋅=− DI()1 DTDI ⋅⋅= O off O O f

(1−⋅⋅DDI) O

q f ()1− DDI⋅⋅O qC=⋅Δ⇒= Vin C = = ΔΔVVin in fV Δ in (1−⋅⋅DDI) C = Omax fVΔ in

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 37 Sizing Input Capacitor: RMS Current Rating

iLmax –D*IO

iC ONOFF ON OFF ON OFF

–D*IO t T2T3T

2 2 IICrms=−() Switch−− rms() I switch avg

2 ⎛⎞ ⎛⎞⎡⎤Δi 2 ⎜⎟L ICrms=+−⋅ID o⎜⎟1 ⎢⎥ () DI o ⎜⎟⎜⎟2⋅ I ⎝⎠⎝⎠⎣⎦o

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 38 To Summarize ⎡ 1 (1− D ) ⎤ IV=+min I >⋅ID L max 0 ⎢ ⎥ Switch−max o max max ⎣ RLfmin 2 ⎦ V = V (1− D ) R switch-max inmax L = max max C 2 f

(1− Dmin ) C = 2 8LfVV()Δ oO IIFo>⋅−max(1 D min ) Vcmax = Vo + ∆Vo/2 VRRM = Vinmax (1− D )V i = min O Crms 23L PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 39 Simple Buck Design: 12V to 2.5V 1A

Given: Vs:= 12V Vo:= 2.5V Iomax:= 1A

Ioccm:= 0.1A %Vo:= 1% f:= 50kHz

Solution: Vo D := D0.208= Vs

Inductor:

()1D− Vo − 4 Lcrit := ⋅ Lcrit= 1.979× 10 H 2f⋅ Ioccm − 6 Choose: L20010:= ⋅ H ()Vo1D− ⋅ ILmax:= Iomax + ILmax= 1.099 A 2L⋅ ⋅f ()Vo1D− ⋅ ΔIL := ΔIL= 0.198 A Lf⋅

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 40 Simple Buck Design: 12V to 2.5V 1A

MOSFET:

Vds:= Vs Vds= 12V Id:= D⋅ Iomax Id= 0.208 A

Diode: Vrrm:= Vs Vrrm= 12V If:= ()Iomax 1− D ⋅ If= 0.792 A

Capacitor: %Vo⋅ Vo Vcmax:= Vo + Vcmax= 2.513 V 2 ()1D− 1 − 5 C := ⋅ C1.97910= × F 2 %Vo 8L⋅ ⋅f − 6 Choose Co:= 50⋅ 10 F ()1D− %Vo := %Vo= 0.396 % 2 8L⋅ ⋅f ⋅Co

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 41 Simple Buck Design: 12V to 2.5V 1A L1 1 2 200u - + S1 - + V1 Sbreak D1 R1 12 Dbreak C1 2.5 50u

0

V1 = 0 V2 V2 = 1 TD = 0 TR = 10n TF = 10n PW = {(3.185/12)*(1/50k)} PER = {1/50k}

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 42 Simple Buck Design: 12V to 2.5V 1A

1.25A Inductor Current

1.00A

SEL>> 0.59A I(L1) 2.0A

Input Current

1.0A

0A 3.6800ms 3.7000ms 3.7200ms 3.7400ms 3.7600ms 3.7800ms 3.8000ms 3.8182ms -I(V1) Time PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 43 Non-ideal Buck: Loss Considerations

• When efficiency estimation is required in the design, losses in Buck circuit should be considered • Several major losses to consider: – Static loss of MOSFET – Switching loss of MOSFET – MOSFET Gate Drive Losses – Static loss of diode – Switching loss of diode – Inductor’s copper loss – Capacitor’s ESR loss

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 44 Static Loss of MOSFET

• With MOSFET, its on resistance RDSon directly impacts the static loss

•RDSon depends on applied gate voltage and MOSFET’s junction temperature

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 45 Static Loss of MOSFET

• Recall, switch current:

iLmax iSwitch iLmin Average Value ON ON ON t 0 T2T

• Static loss for MOSFET with RDSon:

2 PIstatic=⋅ switch− rms R DSon

2 ⎛⎞⎛⎞⎡⎤Δi ⎜⎟L PIDstatic=+⋅ o⎜⎟1 ⎢⎥ R DSon ⎜⎟⎜⎟2⋅ I ⎝⎠⎝⎠⎣⎦o

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 46 Switching Loss of MOSFET

• The switching loss depends on how the voltage and current overlaps • May be approximated with a scenario where voltage and current start moving simultaneously and reach their endpoints • The overlap causes power loss (V x I) • Will assume to occur both at turn-on and turn-off transitions

turn onIo Io turn off VIN VIN

0

ton toff

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 47 Switching Loss of MOSFET

turn onIo Io turn off VIN VIN

0

ton toff

I Vt IVoino tff Pt()= oinon Pt()= on 6T off 6T IVt I Vt PPtPt=+() ( ) =oinon +oinoff switching on off 66TT IV Ptt=+oin() switching6T on off

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 48 Switching Loss of MOSFET & Gate Drive Loss

• When MOSFET is off, its output capacitance Coss is being charged Î translates to loss 1 P = CVf2 Csos 2 OSSin

• Gate drive loss comes from the total gate charge Qgate and the gate drive voltage Vgate used

1 P = QV f gate2 gate gate

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 49 Static Loss of Diode: Forward Loss

• Losses that occur during diode’s fully on (forward loss) and fully off (reverse loss) conditions • Forward loss come from the product of diode’s

forward voltage (VF) and forward current (IF), in addition to the rms loss due to diode dynamic

resistance, rd

j2 Pforward= VI f⋅+⋅ f Ir f d

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 50 Static Loss of Diode: Forward Loss

From datasheet

j2 Pforward= VI f⋅+⋅ f Ir f d

j ()1− D 22 I f =−()1 DI ⋅o IIIII=++⋅⎡ ⎤ f 3 ⎣ max min max min ⎦

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 51 Static Loss of Diode: Reverse Loss • Loss occurs when the diode is in the fully off or non- conducting condition

Preverse = Vr ⋅ I r ⋅(1− D)

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 52 Switching Loss of Diode: Turn On Loss • The switching behavior at turn-on is characterized by a

low value of peak forward voltage (VFP) and forward recovery time (tfr)

PON = 0.4⋅(VFP −V f )⋅t fr ⋅ I f ⋅ f

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 53 Switching Loss of Diode: Turn On Loss

• Both VFP and tfr are normally plotted against dId(t)/dt in the datasheet, whereas dId(t)/dt itself is also available in the datasheet for a given set of conditions

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 54 Switching Loss of Diode: Turn Off Loss • Turn-off loss constitutes appreciable switching losses due to the overlapping of diode voltage and current at turn-off with its associated reverse-recovery time

I d 0 trra = I rrm ()dId dt t1( rr )

trrb = 1.11⋅(trr − trra )

[t2rr ,t3rr ]= krr ⋅trrb

I d 0 2 Poff = 0.5Vds I d 0 + 0.033Vd 0 I rrmtrra +Vd 0 I rrm ()0.467 − 0.433krr + 0.15krr trrb ()dId dt t1( rr )

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 55 Inductor’s Copper Loss • Inductor’s winding is made of copper and hence inherently it will have resistive loss

Average Inductor Current, I

• With inductor’s dc resistance of RL and inductor’s rms current, the copper loss of inductor is: i 2 PIRL = LL 2 i 1 ⎛⎞ΔiL IIL =+1 ⎜⎟ 32⎝⎠I

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 56 Inductor’s Core Loss

• Factors affecting core loss: switching frequency F, temperature, flux swing B • General form:

Core Loss = Core Loss/Unit Volume x Volume Where, Core Loss/Unit = k1 x Bk2 x Fk3

• Constants k1, k2, and k3 are normally provided by the core manufacturers

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 57 Capacitor’s ESR Loss • Real world capacitors posses ESR (Equivalent Series Resistance) • ESR can measured with, for example, Capacitor Wizard

iC ONOFF ON OFF ON OFF t T2T3T

j2 • Loss due to Capacitor’s ESR is: PIESRESR= C

Δi Ij= L C 23

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 58 Buck Design With Losses

Buck Design with Losses Taufik

− 6 Maximum Output Power: Pomax:= 120W μ ≡ 110⋅ − 3 Nominal Output Voltage: Vonom:= 12V m110≡ ⋅ Nominal Input Voltage: Vinom:= 24V Switching Frequency: Fs:= 250kHz Minimum Percent CCM: Iccm:= 10% Maximum Ripple Percentage: Vopp:= 2%

Design Calculations and Sizing Components:

Vonom Nominal Duty Cycle: D := = 0.5 Vinom 2 ⎛ Vonom ⎞ ()1D− ⋅⎜ ⎟ Iccm⋅ Pomax Critical Inductance: Lc := ⎝ ⎠ = 12.000H⋅μ 2Fs⋅

Choose L > Lc Lo:= 200μH with assumed DC resistance of: RLo:= 100mΩ

1 ()1D− Peak Inductor Current: ILopk:= Vonom⋅⎡ + ⎤ = 10.06A ⎢ 2 2Lo⋅ ⋅Fs⎥ ⎢ Vonom ⎥ ⎣ Pomax ⎦ Switch Voltage: Vswmax:= Vinom= 24V Pomax Switch Current: Id:= D⋅ = 5A Vonom

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 59 Choose MOSFET IRF7471 40V 10A Rdson 13mO

Diode Vrrm: Vrrm:= Vinom= 24V Pomax Diode Forward Current: If:= () 1− D ⋅ = 5A Vonom Choose MBR3040 ⎛ Vopp⋅ Vonom ⎞ Capacitor Voltage Rating: Vcap:= Vonom + ⎜ ⎟ = 12.12V ⎝ 2 ⎠ ()1D− − 3 Capacitance: Co := = 250× 10 F⋅μ 2 8Lo⋅ ⋅Fs ⋅Vopp (1D− )⋅ Vonom RMS Current Rating: Icaprms := = 0.035A 23⋅Lo⋅Fs Choose a 25V 50uF capacitor

Power Loss Calculations

MOSFET Loss Calculations: Rdson:= 13m⋅Ω n011:= .. Load := n

0.01 5 10 Load ⎛ n ⎞ 20 ⎜ ⋅Pomax⎟ 100 30 Output Current Array: Io := ⎜ ⎟ n ⎝ Vonom ⎠ 40 50 Static Loss: 60 70 Idrms := Io ⋅ D⋅ 1+ Iccm 80 n n 2 90 Pmos1 := Io ⋅ D⋅ 1+ Iccm Rdson n ()n 100

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 60 Switching Loss: ton1:= 12ns toff1:= 15ns Coss:= 700pF Qg:= 21nC

Io ⋅Vinom⋅()ton1+ toff1 ⋅Fs Vg:= 12V n Pmos2 := n 6 1 2 1 Pcoss := ⋅Coss ⋅Vinom ⋅Fs = 0.05W Pgate := ⋅Qg⋅Vg⋅Fs = 0.032W 2 2

Pmostot := Pmos1 + Pmos2 + Pcoss + Pgate n n n

Diode Loss Calculations Vf := Ifavg := Io ⋅()1D− From Diode Datasheet: n n n 0.02V 0.62V− 0.4V Dynamic Resistance: Rd := = 0.063Ω 0.46V 4A− 0.5A 0.5V Vonom() 1 D 0.58V Peak to peak ⋅ − ΔIL := = 0.12A 0.61V Inductor Current Lo⋅ Fs 0.64V 2 2 0.66V ()1D− ⎡⎛ ΔIL ⎞ ⎛ ΔIL ⎞ ⎛ ΔIL ⎞ ⎛ ΔIL ⎞⎤ Ifrms := ⋅⎢⎜ Io + ⎟ + ⎜ Io − ⎟ + ⎜ Io − ⎟⋅⎜ Io + ⎟⎥ 0.68V n 3 ⎣⎝ n 2 ⎠ ⎝ n 2 ⎠ ⎝ n 2 ⎠ ⎝ n 2 ⎠⎦ 0.7V 0.71V 2 Pd1 := Vf ⋅Ifavg + Ifrms Rd n n n ()n 0.73V From Datasheet: Vr:= Vinom− Vonom Ir:= 0.00015A Pd2:= Vr⋅ Ir⋅()1D− = 0.001W

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 61 Efficiency of 12V 120W 0.95

Assume: tfr:= 500ns Vfp:= 10V 0.905

0.86 Pd3 := 0.4⋅ Vfp− Vf ⋅tfr⋅Ifavg ⋅Fs 0.815 n ()n n 0.77

ηn 0.725 Efficiency Pdtot := Pd1 + Pd2 + Pd3 0.68 n n n 0.635

0.59 Inductor Loss Calculation 0.545 0.5 0 10 20 30 40 50 60 70 80 90 100

Loadn 2 Percent Load 1 ⎛ ΔIL ⎞ 2 ILrms := Io ⋅ 1 + ⋅ PLo := ()ILrms ⋅RLo n n 3 ⎜ 2Io⋅ ⎟ n n ⎝ n ⎠

Capacitor Loss Calculation Assume: ESR:= 150m⋅Ω

ΔIL 2 Icrms := = 0.035A Pc:= Icrms ⋅ESR 23

Total Loss Calculation

Ptotal := Pmostot + Pdtot + PLo + Pc Po := Vonom⋅ Io n n n n n n Po n Efficiency ==> η := n Po + Ptotal n n

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 62 Another Example

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 63 PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 64 PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 65 PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 66 PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 67 PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 68 PARAMETERS: Vref = 2.5 Vo = 12 ratio = {Vref/Vo} Rtop = 10k Vg mult = 0.992 percentload = 10

+ - S1 I + 0 - L1 Vout Sbreak 1 2 V1 50u V R1a Vfb 48 C1 {Rtop} D1 R1 Dbreak 50u R1b {mult*((ratio*Rtop)/(1-ratio))}

0 {(100/percentload)*(Vo/10)}

4 COMPARATOR Vg {Vref} 100 IN+ OUT+ 0 IN- OUT- Vfb EVALUE LIMIT(1MEG*V(%IN+, %IN-),5,0) V1 = 5 Vtri V2 = 0 TD = 0 TR = {5u-10n} 0 TF = {5u-10n} PW = 20n 0 PER = {1/100k}

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 69 20V Output Voltage at Maximum Load

(12.008 V)

10V

SEL>> 0V V(Vout) 30A

Inductor Current at Maximum Load

20A

(10.000 Amps)

10A

0A 0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms I(L1) Time

Output Voltage Ripple at Maximum Load 12.0200V

(12.023 V) 12.0000V

11.9800V (11.977 V) SEL>> 11.9695V V(Vout) 11A Inductor Current Ripple at Maximum Load

(9.1136 Amps) 10A (10.883 Amps)

9A 4.68517ms 4.69000ms 4.69500ms 4.70000ms 4.70500ms 4.71000ms 4.71500ms I(L1) Time

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 70 PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 71 Efficiency Improvement

• Ways to improve converter’s efficiency: –MOSFET

•Low Rdson for High Duty Cycle • Low Gate Charge for Low Duty Cycle • Paralleling for High Current – Schottky Diode • Low forward drop • Short recovery time – Inductor • Multiple parallel winding such as Bifiliar (two windings), Trifiliar (three windings)

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 72 Efficiency Improvement – Capacitors • Low ESR • Paralleling caps (increasing capacitance while reducing ESRs) – Lower inductor current ripple • Reduce rms loss (inductor and output capacitor) • Increase switching frequency or inductance – Switching loss and real-estate trade off – Lower gate drive voltage – Use of Synchronous MOSFET in place of diode, especially for low voltage and high current output PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 73 Synchronous Rectification • Replaces freewheeling schottky with MOSFET • Especially beneficial on low duty cycle and high current applications • Due to required dead time and slow MOSFET’s body diode, a Schottky is connected across the Synchronous MOSFET • MOSFET + Schottky = FETKY combo such as IRF7326D2

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 74 Soft-Switching • Prevents hard-switching or the overlapping of switch’s voltage and current during turn-on and turn-off transitions – switching losses which is proportional to switching frequency • Use of resonant circuit to shape switch voltage and/or current waveforms to inherently go to zero at which switching transition is initiated Î zero switching loss

pswitching(t)

Ion Ion Voff Voff

0

turn on turn off

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 75 Soft-Switching • Quasi-resonant buck topologies such as Zero-Voltage and Zero Current Resonant Switch Buck converter • Needs constant-on or constant-off controllers such as UC1865 - UC1868, UC1861 – UC1864, MC34067 and MC33067, TDA4605-3, TDA4605-2

V Ion Ion off Voff

0 turn on turn off

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 76 Soft-Switching • Zero-Current Resonant Switch Buck – Turns switch OFF at zero current

• Zero-Voltage Resonant Switch Buck – Turns switch ON at zero voltage

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 77 PWM Controller

• Current Mode Controller will be used due to many of its advantages – Easy Compensation • With voltage-mode, the sharp phase drop after the filter resonant frequency requires a type III compensator to stabilize the system • Current-mode control looks like a single-pole system, since the inductor has been controlled by the current loop • Improves the phase margin, makes the converter much easier to control • A type 2 compensator is adequate, greatly simplifies the design process • With voltage-mode control, crossover has to be well above the resonant frequency, or the filter will ring. – CCM and DCM Operation • It is not possible to design a compensator with voltage-mode that can provide good performance in both CCM and DCM • With current-mode, crossing the boundary between the two types of operation is not a problem • Having optimal response in both modes is a major advantage, allowing the power stage to operate much more efficiently – Line Rejection • Closing the current loop gives a lot of attenuation of input noise • Even with only a moderate gain in the voltage feedback loop, the attenuation of input ripple is usually adequate with current-mode control • With voltage-mode control, far more gain (or feed forward) is needed in the main feedback loop to achieve the same performance

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 78 PWM Controller

• For the sake of example, we’ll use UC184x or MIC38HC4x family

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 79 PWM Controller

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 80 PWM Controller

• Selecting Timing Resistor and Timing Capacitor – Maximum Duty Cycle and Switching Frequency have to be determined first – Percent Dead time would then be computed from Dmax – Using % Dead time along with Switching Frequency, we can then use plots provided in the data sheet to determine the required timing capacitor and timing resistor • Example: Let’s say that Dmax was calculated to be 70% or 0.7. Add safety factor to Dmax. Say 10% such that Dmax’ = 0.8

• The dead time is therefore = 100% - 80% = 20% • If switching frequency used is 80 kHz, then the value for % dead time along with switching frequency can be used to determine the required Timing Capacitor • This is done by using the plot provided in the data sheet. PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 81 PWM Controller

• From plot, 80 kHz intersects the 20% dead time at approximately Timing Capacitor value of 10 nF. • Next, the timing resistor is found from the plot which is also provided in the data sheet

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 82 PWM Controller • Plot shows that 80kHz intersects the timing capacitor plot for 10 nF at timing resistance approximately equals to 2kΩ • So, in order to provide the 20% dead time at 80 kHz switching frequency, the timing components are: CT = 10 nF and RT = 2 kΩ

= 2kΩ

= 10nF

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 83 PWM Controller • Feedback Compensation – As a start, typically a small capacitor is placed on ZF (such as 2200 pF) for feedback compensation – Once a prototype is built, the feedback compensation will be investigated to give the desired gain and phase margin and stability (over wide range of load) – Involves decision of whether to use type I, II, or III error amplifier

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 84 PWM Controller

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 85 PWM Controller

• Steps for selecting components in Type 2

– Choose cross-over frequency Fcross to be around 1/3 of switching frequency F switch F – The required pole frequency Fp0 that yields the desired F = cross crossover frequency of the open loop gain (where H0 is dc gain p0 of the plant) Ho 1 – Calculate capacitor C1 where R1 should have been selected when C1 = setting the voltage divider 2π RF10p 1 – Calculate R using the previously calculated C and the output 2 1 R2 = pole of the plant Fp 2πCF1 p 1 – Calculate capacitor C3 where Fesr is the location of the ESR zero C3 = 2π ESR⋅ Fesr

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 86 PWM Controller • Current Sensing Resistor – Need to calculate power rating of the sensing resistor. This involves calculating worst case Irms through the sensing resistor, 2* and then compute P = (Irms) Rsense – A low pass RC filter circuit is also needed to eliminate leading spike on the pulse voltage resulted from current being sensed – Ensure that voltage out of the filter is less than 1V (for this controller). If not, then reduce the value of Rsense

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 87 Layout Considerations

• Keep trace inductance low (preferably by reducing length, not increasing width) for the critical path (switch and diode paths) – Noise spikes may appear in input and output, and to the controller chip – Avoid using a current probe (a loop of wire) for diode and switch due to additional inductance it will produce • Provision of good Input decoupling since input capacitor is in the critical path – Besides the usual bulk capacitor, also put a small ceramic capacitor at the supply end to ground, and another one close to the switch to ground • Provision of good decoupling with a small ceramic capacitor between input and ground pins • Try using shielded inductor, and position the inductor away from the controller and feedback trace • In multi-layer boards, dedicate one layer for ground • Keep the feedback trace as short as possible to minimize noise pickup and place it away from noise sources

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 88 Multiphase • The technique used mainly in very low voltage and high power applications such as processors – Next-generation networking ASICs and processors require multiple lower voltages, higher currents, faster dynamic response, greater efficiency and power management solutions that reside close to the load – To meet the need of increasing power density through higher efficiencies and higher operating frequencies • A novel power architecture, multiphasing topologies, is emerging to contend with tomorrow's power requirements • High-density applications with lower power levels are usually managed with 2-phase solutions, whereas higher power levels can require up to 4-phase solutions

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 89 Multiphase

• Multiphasing address 5 key parameters in power conversion – Efficiency: The best power efficiency is achieved by converting a voltage in a single stage, rather than double conversion. • For example, assume you want to convert 48V to 1.2V at 100W using a 2-phase forward converter • In a 2-phase conversion, current is split equally in the two phases. The FET on-losses are I2 × R, which equates to a 50% reduction in on-losses • Lower peak currents provide lower turn-on and turn-off losses, resulting in lower switching losses • Lower turn-on and switching losses provide overall greater efficiency – Input/output ripple reduction: Multiphasing PWM controllers increases switching frequency. The resulting frequency is equivalent to the PWM clock frequency times the number of phases. Higher operating frequency equates to less input/output capacitance and smaller input/output inductors

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 90 Multiphase – Fast dynamic response. Improved dynamic response is the result of smaller output inductors allowing for fast response to current changes combined with higher operating frequency, equal to clock frequency times the number of phases, which allows for higher crossover. – Ease of manufacturability: Next-generation designs demand smaller form factors and automated assembly, eschewing hand soldering of large transformers, inductors and capacitors. – Better thermal management: Thermal management is critical at these new power densities. The challenge is even higher with the emergence of modules operating in extended temperature range. With multiphasing techniques, you spread the heat evenly over the whole converter, avoiding hot spots and improving converter reliability

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 91 Multiphase

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 92 Multiphase

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 93 Two-Phase vs. 1 Buck

L1 L2 1 2 1 2 200u 200u - - + S1 V + S2 V - - + + V1 Sbreak D1 R1 V3 Sbreak D2 R2 12 Dbreak C1 12 Dbreak C2 2.5 2.5 50u 50u

0 0

V1 = 0 V2 V1 = 0 V4 V2 = 1 V2 = 1 TD = 0 TD = 0 TR = 10n TR = 10n TF = 10n TF = 10n PW = {(3.185/12)*(1/50k)} PW = {Duty *(1/50k)} PER = {1/50k} PER = {1/50k}

L3 1 2 200u - + S3 - + Sbreak D3 Dbreak

V1 = 0 V5 PARAMETERS: V2 = 1 Duty = {3.135/12} TD = {0.5/50k} TR = 10n TF = 10n PW = {Duty *(1/50k)} PER = {1/50k}

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 94 Two-Phase vs. 1 Buck

4.0V

Two-Phase Buck Output Voltage

3.0V Just a Buck

2.5 Volts

2.0V

1.0V

0V 0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms V(R1:2) V(L2:2) Time

2.5200V Output Voltage Ripple Just a Buck

2.5100V

2.5000V

Two-Phase Buck 2.4900V

2.4803V 3.6203ms 3.6400ms 3.6600ms 3.6800ms 3.7000ms 3.7200ms V(R1:2) V(L2:2) Time

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 95 Two-Phase vs. 1 Buck

200mA Capacitor Current

Two-phase Buck

0A

-200mA Just a Buck 4.6705ms 4.6800ms 4.6900ms 4.7000ms 4.7100ms 4.7200ms 4.7300ms 4.7400ms 4.7500ms -I(C2) -I(C1) Time 1.5A Input Currents

Just a Buck

1.0A

Two-Phase

0.5A

0A

3.9886ms 4.0000ms 4.0200ms 4.0400ms 4.0600ms 4.0800ms 4.1000ms -I(V1) -I(V3) Time

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 96 Power Electronics Lab at Cal Poly State University • 6 Instructional Lab Benches, 2 Project/Thesis Benches • For further information, contact Power Electronics Lab Coordinator, Dr. Taufik at [email protected]

PECON 2008, Johor Bahru, Malaysia Practical Design of Buck Converter Taufik | Page 97