บทความวจิ ยั –วชาการิ การประชุมวชาการิ งานวิจยั และพฒนาเชั ิงประยกตุ ์ คร้ังที่ 6 การพฒนาเทคโนโลยั เพี ื่อให้โลกมีสนตั ิสุข ECTI-CARD Proceedings 2014, Chiang Mai, Thailand An implementation of AES algorithm on multicore processors for high throughput Supachai Thongsuk1, Prabhas Chongstitvatana, Ph.D. 2 Department of Computer Engineering Faculty of Engineering, Chulalongkorn University Bangkok, Thailand E-mail:
[email protected],
[email protected] Abstract Block of data input is 128 bits or 4 words in 4x4 square matrix of AES (Advanced Encryption Standard) algorithm is a block bytes. The 4x4 matrix of bytes is called the state. The number of encryption algorithm established by the U.S. National Institute of iterations depends on the key length. (Table 1) Standards and Technology (NIST) in 2001. It has been adopted by many AES steps data security systems and now used worldwide. Most of AES 1) Key expansion -- Round keys are derived from the cipher key. Each implementations are for single-core processors. To achieve high round requires a separate key block. performance for large data, this work proposed an AES algorithm for multi-core processors. Using parallelism inherent in large data, all 2) Initial round -- Each byte of the state is bitwise XOR with the round cores are working concurrently to speed up the task. key. Keywords: cryptography; AES; Multicore processor; 3) Rounds -- A round consisted of four transformations: SubBytes, ShiftRows, MixColumns, AddRoundKey. 1. Introduction The information security has become an important concern today 4) Final round -- Three transformations: SubBytes, ShiftRows, due to popular use of computers. The AES algorithm is a standard AddRoundKey.