Sercos III Slave for Am437x — Communication Development Platform

TI Designs Sercos III Slave For AM437x — Communication Development Platform

TI Designs Design Features Industrial Ethernet for Industrial Automation exists in • Sercos III Slave Firmware for PRU-ICSS With more than 20 industrial standards. Some of the well- Sercos MAC-Compliant Register Interface established real-time Ethernet protocols like EtherCAT, • Board Support Package and Industrial Software EtherNet/IP, PROFINET, Sercos III, and PowerLink Development Kit Available From TI and Third-Party require dedicated MAC hardware support in terms of Stack Provider FPGA or ASICs. The Programmable Real-Time Unit inside the Industrial Communication Subsystem (PRU- • Development Platform Includes Schematics, BOM, ICSS), which exists as a hardware block inside the User’s Guide, Application Notes, White Paper, Sitara processors family, replaces FPGA or ASICS Software, Demo, and More with a single chip solution. This TI design describes • PRU-ICSS Supports Other Industrial the Sercos III slave solution firmware for PRU-ICSS. Communication Standards (For Example, EtherCAT, PROFINET, EtherNet/IP, Ethernet Design Resources POWERLINK, Profibus) • PRU-ICSS Firmware is Sercos III Conformance TIDEP0039 Design Folder Tested TMDXIDK437X Tools Folder AM4379 Product Folder Featured Applications TIDEP0001 Tools Folder • Factory Automation and Process Control TIDEP0003 Tools Folder • Motor Drives TIDEP0008 Tools Folder TIDEP0010 Tools Folder • Digital and Analog I/O Modules TIDEP0028 Tools Folder • Industrial Communication Gateways • Sensors, Actuators, and Field Transmitters

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Sitara AM437x

ARM Cortex-A9 PRU-ICSS processor PHY Sercos III application/profile/ Slave MAC stack PHY

An IMPORTANT NOTICE at the end of this TI reference design addresses authorized use, intellectual property matters and other important disclaimers and information.

TIDUAD6–August 2015 Sercos III Slave For AM437x — Communication Development Platform 1 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Key System Specifications www.ti.com 1 Key System Specifications For 25 years, Sercos has been one of the leading bus systems in factory automation applications such as mechanical engineering and construction. Sercos III is the third-generation Sercos interface and was established in 2003. The efficient and deterministic communication protocol, based on real-time technology, merges the hard real-time aspect of the Sercos interface with Ethernet. The Sercos III technology integration requires dedicated hardware to support "on-the-fly" Ethernet frame processing, which up until now was implemented in field-programmable gate arrays (FPGAs) and application specific integrated circuits (ASICs). This design guide provides an overview of the Sercos III fieldbus technology and the implementation of the Sercos III protocol into the Sitara™ AM437x processors. The TIDEP0039 Sercos III For AM437x — Communication Development Platform combines the Sitara processor family from Texas Instruments (TI) and the Sercos III media access control (MAC) layer into a single system-on-chip (SoC) solution.

2 Sercos III Slave For AM437x — Communication Development Platform TIDUAD6–August 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated www.ti.com System Description 2 System Description

2.1 Technology Introduction In a Sercos III Industrial Ethernet network, one Sercos III master controls multiple Sercos III slave devices. Slaves are network devices such as drives, sensors, and analog and digital I/O devices (see Figure 1). In a Sercos III network, one master can control up to 511 slaves.

P-Channel Sercos III Master S-Channel

Analog I/O Drive Sensor Digital I/O

Figure 1. Example Sercos III Network in Ring Topology With P- and S-Channel

Both master and slave devices have two real-time Ethernet ports, and wiring between devices can be realized either in line or ring topology. Other wiring topologies like star or stub are not supported. To simplify wiring and to reduce installation errors, the Ethernet cable can be connected to any port on a master or slave device. Network redundancy is only supported with ring topology. The master sends out each frame twice, one over the primary channel (P-channel) and one over the secondary channel (S-channel). The transmission of Sercos III frames by the master takes place on both channels simultaneously. This mechanism is also used to synchronize timing across all slaves (see Section 2.3). Sercos III combines a deterministic real-time-Ethernet channel (RT) and a best-effort-Ethernet channel (unified communication channel (UCC)) on the same Ethernet cable using time multiplexing (see Figure 2). During the time slot of the Sercos III real-time channel, only the master is allowed to start the transmission of a Sercos III Ethernet frame. The frame is received by all slaves and is being processed on-the-fly, meaning each slave that receives the Sercos III Ethernet frame processes the bytes from the byte-stream without changing the overall frame length. At the end of the frame, the slave recalculates and replaces the frame check sequence (FCS) in case the content has been modified. The overall processing delay in a slave from incoming port to outgoing port is constant and approximately 1 μs. Therefore, the frame round-trip delay in a network with 10 slaves is 10 μs in ring topology and 20 μs in line topology.

MDT0 MDT1 AT0 AT0 ETH telegrams MDT0 M H H H M Pay- Pay- Pay- Pay- Pay- S D D D S load load load load load T R R R T

Sercos real-time channel (RT) Unified communication channel (UCC) One Sercos III communication cycle Figure 2. Sercos III Communication Cycle

During the time slot of the RT channel, only the master transmits master data telegram (MDT) and axis telegram (AT) Sercos III frames, which contain the cyclic process data and asynchronous communication data. The UCC channel is used by the master and slaves to transmit Ethernet frames using the best-effort standard Ethernet approach. Slaves are not allowed to transmit Ethernet frames in the RT channel, and they have to buffer any UCC frames in the local memory. In line topology, it is common practice to add a service computer to the last slave to check or configure the slaves while the Sercos III network is operational. The last slave buffers UCC frames that are received during the RT channel and starts transmitting them after the UCC channel is opened.

TIDUAD6–August 2015 Sercos III Slave For AM437x — Communication Development Platform 3 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated System Description www.ti.com Sercos III supports bus cycle times of down to 31.25 μs, which are used in dedicated drive applications where the programmable logic controller (PLC) handles the motor control loop. In less demanding applications, bus cycle times in the millisecond range are used. After startup, the Sercos III network goes through different communication phases before it reaches the operational state when real-time process data is exchanged. These are called communication phases (CP0, CP1, CP2, CP3, and CP4); it starts from CP0 (detecting of slaves) to CP4 (operational state, cyclic, and acyclic data communication).

2.2 Sercos III Frame Only the master can generate Sercos III MDT and AT Ethernet frames. The MDT frame transfers data from the master to the slave while the AT frame transfers data from the slaves to the master. Figure 3 shows the generic Sercos III frame structure. Sercos III frames are broadcast frames. Each slave processes the frame by taking or placing data from the data field while forwarding the modified or unmodified content to the secondary port. The master receives back the modified frame; hence, in line topology, the last slave loops back the frame, and in ring topology, the frame is received on the master’s secondary port.

S Destination Source Ethernet Preamble F MST Data Field FCS Address Address Type D 7+1 Bytes 6 Bytes 6 Bytes 2 Bytes 46 to 1500 Bytes 4 Bytes

Figure 3. General Sercos III Frame Structure

The data field contains the cyclic and acyclic data for each slave. Each slave has a descriptor list that describes the location in the frame where it can read or write data. The slave validates the received FCS at the end of the frame. If the FCS is invalid, the frame content is not processed by the slave. If the slave has modified the content of the frame, it has to update the FCS; otherwise, the frame is corrupted and will be ignored by the next slaves or the master. Because a Sercos III frame is based on standard Ethernet, it has a minimum and maximum frame length. The minimum frame is 72 bytes, which takes 5.8 μs to transmit at 100 Mb/s. The longest frame is 1526 bytes, which takes 122 μs to transmit. The frame length as well as the number of MTD and AT frames are set by the master and are configured in the slaves during CP2.

2.3 Synchronization The master sync telegram (MST) field in the MDT0 frame is used by the master for slave synchronization. The MST field has its own FCS. Each slave validates the MST FCS and uses the MST time reference as an internal synchronization event.

S Destination Source Ethernet Preamble F MST Data Field FCS Address Address Type D Telegram timing reference Start of CON_CLK, t6/t7... (TTref)

Figure 4. MDT0 Frame Synchronization Method

In CP2, the master measures the port-to-port delay of each slave, calculates the frame round-trip time and programs a different port delay time into each slave’s ports. Finally, all slaves are synchronized in CP4 to the master’s reference clock. The slave uses the MST synchronization events to internally synchronize the RT and UCC channel time slot as well as to generate a hardware synchronization signal called CON_CLK. The CON_CLK hardware signal is used to synchronize a coprocessor or application to the Sercos III communication cycle.

4 Sercos III Slave For AM437x — Communication Development Platform TIDUAD6–August 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated www.ti.com System Description 2.4 Service Channel (SVC) The MDT and AT frames embed an asynchronous communication channel that is used by the master to transfer communication, parameter and diagnostic data. The master issues SVC read and write requests to defined data structure (identification number [IDN]) in each slave. For example, the IDNs are used to configure Sercos III network parameters and UCC channel parameters.

2.5 Topology A Sercos III network is configured as line or ring topology. When using line topology, a daisy-chain cabling is used and only one port of the master is connected to the first slave. The last slave in the chain loops- back the MDT/AT frames, so they are received back by the master (see Figure 5).

P-Channel Sercos III Master

Analog I/O Drive Sensor Digital I/O

Figure 5. Line Topology With Last Device in Loopback Mode

To support network redundancy, use ring topology (see Figure 1). The primary port of the master is connected to the first slave and the secondary port is connected to the last slave. The master transmits Sercos III frames simultaneously on both ports. In case of an Ethernet cable break (called ring break), the slave that detects the break immediately starts the loopback mode. The slave sends the MDT/AT frames back on the same port where the frames were received. The master detects the ring break scenario in the status information of the AT frames. After the ring-break is physically resolved, the master issues a ring heal command to the slaves to restore the ring topology connection. Ring break and ring heal can occur anytime, but the master continues to operate the network in CP4.

TIDUAD6–August 2015 Sercos III Slave For AM437x — Communication Development Platform 5 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Sercos III Slave Solution With Sitara Processors From TI www.ti.com 3 Sercos III Slave Solution With Sitara Processors From TI

3.1 Components of Sercos III Slave Many existing Sercos III slave solutions consists of an application processor, a FPGA, two industrial Ethernet physical layer devices (PHYs), and power management (see Figure 6). The application processor executes the customer’s application, the Sercos III user profile and slave stack. The FPGA implements the Sercos III real-time Ethernet MAC that handles the real-time critical functions of the Sercos III standard. The MAC in the FPGA is connected to two industrial Ethernet PHYs that provide the Sercos III network ports. The devices need to be powered by a dedicated power management solution.

PHY Processor FPGA Host application/ interface Sercos III profile/stack MAC PHY

Power management subsystem

Figure 6. Sercos III Slave Solution With Processor and FPGA

The AM437x Sitara TI design (TIDEP0039) combines the Sercos III MAC function blocks of an FPGA with the application processor. This leads to an integrated solution combining the customer application, the profile, and stack with the Sercos III MAC on a single SoC (see Figure 7). The powerful ARM® Cortex®- A8 application processor handles the application, the Sercos profile, and stack. The Sercos III real-time critical functions are handled by the PRU-ICSS, which is integrated on the AM335x Sitara family of MPUs. A dedicated power management unit (PMU) device supplies the Sitara device enabling a simplified power management solution. The fast internal interconnect between the ARM Cortex-A8, the PRU-ICSS, internal memory, and other peripherals allow fast exchange of real-time process data.

Sitara AM437x

ARM Cortex-A9 PRU-ICSS processor PHY Sercos III application/profile/ Slave MAC stack PHY

Figure 7. Integrated Sitara Sercos III Slave Solution

6 Sercos III Slave For AM437x — Communication Development Platform TIDUAD6–August 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated www.ti.com Sercos III Slave Solution With Sitara Processors From TI 3.2 Sitara AM437x Peripheral Block Diagram The Sitara AM437x device family is a low-power application processor with an ARM Cortex-A9 RISC core and a broad range of integrated industrial peripherals (see Figure 8). The ARM Cortex-A9 supports clock frequency ranges from 300 MHz for simple I/O applications up to 1 GHz for complex control applications that require more CPU performance.

45 nm

Quad-Core ® ARM Graphics PRU-ICSS Cortex® -A9 Acceleration Industrial Up to 1 GHz SGX530 Communication Subsystem EtherCAT® , 32K/32K L1 Display PROFINET® , Subsystem EtherNet/IP™ + 256K L2/L3 24-Bit LCD Motor feedback protocols + 64K RAM Touch Screen Controller Sigma Delta Processing Overlay, 256KB L3 Shared RAM Resizing, Security Color Space AccelerationPac 32-Bit Conversion, etc. LPDDR2/DDR3/DDR3L Crypto, Secure Boot System Services Simple Pwr Seq EDMA Debug 12 Timers SyncTimer 32K WDT RTC 2 12-Bit ADCs

Connectivity and I/Os EMAC Camera McASP NAND/ CAN ×2 PWM ×6 2-Port I/F (2× ×2 NOR Switch Parallel) (16-Bit ECC) eCAP/ 10/100/1G SPI ×5 GPIO w/ 1588 USB2 eQEP ×3 Dual-Role 3 MMC/ 2 SD/SDIO QSPI PHY ×2 HDQ I C ×3 UART ×6

Figure 8. AM437x Family Block Diagram

TIDUAD6–August 2015 Sercos III Slave For AM437x — Communication Development Platform 7 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Sercos III Slave Solution With Sitara Processors From TI www.ti.com 3.3 Sercos III Slave System and Software Architecture The hardware layer of Sercos III requires 100 Mb/s Ethernet for the physical layer (PHY). In the TIDEP0039, this is implemented with two TLK105L Ethernet PHYs from TI. The PHY’s MII connects to the PRU-ICSS that handles the real-time functions of the Sercos III standard. The PRU-ICSS exchanges real- time data, Ethernet frames, control, and status information through the internal shared memory interface with the Sercos and Ethernet stack. The Sercos III stack and the function-specific profile (drive, I/O, and so on) provides an application programming interface (API) to the customer’s application. The standard Ethernet frames are placed by PRU-ICSS in a dedicated shared memory area. Ethernet applications like web server and trivial file transfer protocol (TFTP) can access the Ethernet frames through a dedicated frame queue.

Device application Application

Function specific profile (drive, IP IO, and so on) Generic device profile applications (web-server, TFTP, and so on) S/IP

Sercos III stack Sercos communication TCP/UDP profile

Sercos register i/f Ethernet

PRU-ICSS FPGA compatible interface Hardware 100Mbit/s

P1 / Ethernet PHY P2 / Ethernet PHY

Figure 9. Sitara Sercos III Slave System and Software Architecture

3.4 Sercos III Stack Integration and Solution Validation The TIDEP0039 solution has been validated with the Sercos III stack from third-party stack provider Cannon-Automata, using the Sercos III Conformizer validation tool. All required communication tests cases have been tested and confirmed. Customers can leverage this integrated solution by contacting the third-party stack provider, who gives them access to the validated Sercos III solution to jump start product development. The Sercos III firmware for PRU-ICSS has been implemented with a register interface equivalent to the Sercos III FPGA to allow customers to reuse existing stack solutions.

8 Sercos III Slave For AM437x — Communication Development Platform TIDUAD6–August 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated www.ti.com Sercos III Slave Solution With Sitara Processors From TI 3.5 Development Tools The TIDEP0039 solution can be evaluated with the AM437x industrial development kit (IDK) board (see Figure 10). The board is intended for developing industrial Ethernet protocols for master and slaves devices, for example, I/O modules, sensors, actuators, motor controls, and PLCs. The two real-time Ethernet ports of the PRU-ICSS are accessible by two RJ45 connectors. Additionally, the board is equipped with digital inputs and outputs through onboard connectors.

Figure 10. AM437x IDK Board

Further software development can be done using the industrial software development kit (SDK), which combines SYS/BIOS (real-time operating system (RTOS) from TI) and example projects using industrial Ethernet protocols. One key advantage of the Sitara AM437x family is that it allows for a flexible and dynamic exchange of the industrial Ethernet protocol within the PRU-ICSS (see Figure 11). The application processor loads new fieldbus firmware in the PRU-ICSS during device initialization, making external fieldbus ASICs or FPGAs redundant. This enables customers to support various industrial Ethernet protocols, including EtherCAT, PROFINET, Sercos III, EtherNet/IP, and Ethernet POWERLINK, with one single hardware platform.

TIDUAD6–August 2015 Sercos III Slave For AM437x — Communication Development Platform 9 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Block Diagram www.ti.com 4 Block Diagram

QSPI I2C DDR3 µSD Flash EEPROM

Expansion Power AM437x Sitara ARM MPU Connector 3x PWM DRV8313 M General Purpose Connectivity Processor tripzone DCAN_RX/TX pin-header Fieldbus USB SPI ARM 2 to ADCs (3x I, 3x VBus) CAN LCD I C RX/TX/TX_en Cortex OPA365/2350 Profibus slave MMC UART pin-header A9 CPGSW CAN eQEP 1xCPGSW TXB0106PW J 1x5 RJ45 GBit PHY Real-Time Ethernet EnDAT EtherCAT ICSS v3 SN65HVD78 M12 / ENDAT 2.2 Profinet RT/IRT RT_MII Sercos 3 RJ45 TLK105L SPI Ethernet/IP PRU0 PRU1 PRU2 PRU3 HVS882 Power-Link RT_MII 8x digital I/O RJ45 TLK105L I2C TPIC2810 LEDs GPIO Industrial LEDs

Figure 11. AM437x IDK (TMDXIDK437X) Board System Block Diagram

10 Sercos III Slave For AM437x — Communication Development Platform TIDUAD6–August 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated www.ti.com Block Diagram 4.1 Highlighted Products

4.1.1 AM4379 Processor Up to 1-GHz Sitara™ ARM Cortex-A9 32‑bit RISC processor • NEON™ SIMD coprocessor and vector floating point (VFPv3) coprocessor • 32KB of L1 instruction and 32KB of data cache • 256KB of L2 cache or L3 RAM • 256KB of on-chip boot ROM • 64KB of dedicated RAM • Emulation and debug — JTAG • Interrupt controller PRU-ICSS • Supports protocols such as EtherCAT®, PROFIBUS, PROFINET, EtherNet/IP™, EnDat 2.2, and more • Two PRUs subsystems with two PRU cores each • 32-bit load/store RISC processor capable of running at 200 MHz • 12KB (PRU-ICSS1), 4KB (PRU-ICSS0) of instruction RAM with single-error detection (parity) • 8KB (PRU-ICSS1), 4KB (PRU-ICSS0) of data RAM with single-error detection (parity) • Single-cycle 32-bit multiplier with 64-bit accumulator • Enhanced GPIO module provides shift-in/out support and parallel latch on external signal • 12KB (PRU-ICSS1 only) of shared RAM with single-error detection (parity) • Three 120-byte register banks accessible by each PRU • Interrupt controller module (INTC) for handling system input events • Local interconnect bus for connecting internal and external masters to resources inside PRU-ICSS • Peripherals inside PRU-ICSS: – One UART port with flow control pins, supports up to 12 Mb/s – One enhanced capture (eCAP) module – Two MII Ethernet ports that support industrial Ethernet, such as EtherCAT – One MDIO port On-chip memory (shared L3 RAM) • 256KB of general-purpose on-chip memory controller (OCMC) RAM • Accessible to all masters External memory interfaces (EMIF) • DDR controllers: – LPDDR2: 266-MHz clock (LPDDR2-533 data rate) – DDR3 and DDR3L: 400-MHz clock (DDR-800 data rate) – 32-bit data bus – 2GB of total addressable space – Supports one x32, two x16, or four x8 memory device configurations • General-purpose memory controller (GPMC) – Flexible 8-bit and 16-bit asynchronous memory interface with up to seven chip selects (NAND, NOR, Muxed-NOR, SRAM) – Uses BCH code to support 4-, 8-, or 16-bit ECC – Uses hamming code to support 1-bit ECC See the AM4379 datasheet for a complete list of features [1].

TIDUAD6–August 2015 Sercos III Slave For AM437x — Communication Development Platform 11 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Block Diagram www.ti.com 4.1.2 AM437X Industrial Development Kit (IDK) EVM Hardware Specification • AM4379 ARM Cortex-A9 • 1GB DDR3, QSPI-NOR Flash • Discrete power solution • EnDat connectivity for motor feedback control • 24-V power supply • USB cable for JTAG interface and serial console Software and Tools • SYS/BIOS real-time OS • StarterWare base port • Code Composer Studio™ (CCS) integrated development environment (IDE) • Application stack for industrial communication protocols • Sample industrial applications Connectivity • PROFIBUS interface • CANOpen • EtherCAT • EtherNet/IP • PROFINET • Sercos III • IEC61850 • PWM • Motor axis position feedback • Up to 3-phase motor drive connector • Sigma Delta decimation filter • Digital inputs and outputs (I/O) • SPI • UART • JTAG See the AM437x IDK website for a complete list of features and design resources (http://www.ti.com/tool/TMDXIDK437X).

Figure 12. Sercos Conformizer Test Report Extract

TIDUAD6–August 2015 Sercos III Slave For AM437x — Communication Development Platform 13 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Summary and Conclusion www.ti.com 6 Summary and Conclusion The TIDEP0039 Sercos III slave communication development platform combines the Sercos III firmware for the PRU-ICSS and an equivalent Sercos III register interface with the TMDXIDK437X board. Third- party service provider Cannon-Automata offers customers a Sercos III reference stack and example application. Alternatively, customers can use an existing stack and interface it to the TIDEP0039 Sercos III slave solution. With the TIDEP0039 Sercos III slave communication development platform, customers can jump start their development of Sercos III-based industrial applications like industrial I/Os, drives, sensors, and actuators. The solution saves development efforts and production cost by integrating the industrial Ethernet protocol into the microprocessor (MPU) and shortens time to market. It also demonstrates that customers can remove the external FPGA or fieldbus ASIC without compromising the functional or operational requirements.

14 Sercos III Slave For AM437x — Communication Development Platform TIDUAD6–August 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated www.ti.com Design Files 7 Design Files

7.1 Physical TMDXIDK437X EVM To purchase the TMDXIDK437X the TI shop, see its product page at http://www.ti.com/tool/tmdxidk437x.

7.2 Schematics To download the schematics, see the design files at TIDEP0039.

V3_3D

R69 10K R75 Y1 V3_3D 10K R92 0 OSC0_IN

3 U11-2 R82 4 2 1M C25 AM437X_OSC0_IN 24MHz OSC0_IN B25 AM437X_OSC0_OUT R91 0 OSC0_OUT 1 OSC0_OUT B24 VSS_OSC C35 C36 24pF 24pF Y23 R90 PORZn PORZn G22 R86 0 GND_OSC0 R566 0 RESETIN_OUTn 0 G25 R87 NMIn 0 GND_OSC0 DGND

H20 TP2TP

AM437x Main Osc/Ctrl Industrial EVM CLKREQ R487 0 AM437X_ZDN <7,20> PORZn PORZ_RELEASE <4> V3_3DREG

5 C281 0.01uF DGND 4 2

U54 SN74LVC1G07

3 1

DGND <18> SYS_WARMRESETn

Warm Reset Switch R498 R499 SYS_WARMRESETn SYS_RESETn <5,7,8,11,17,19>

3 4 100 100

SW2 B3SL C287 1uF

1 2

DGND DGND Figure 13. Processor System Schematic

VDD_CORE

C224 C213 C230 C220 C219 C257 10uF 0.01uF 0.01uF 0.01uF 0.01uF 0.01uF VDD_MPU

VDD_CORE DGND C207 C39 C197 C203 C40 C172 10uF 0.01uF 0.01uF 0.01uF 0.01uF 0.01uF C221 C205 C202

0.01uF 0.01uF 0.01uF DGND

DGND V1_8D_AM437X

C32 C159 C160 C158 V1_8D_AM437X C31 VDD_CORE 10uF 0.01uF 0.01uF 0.01uF 0.01uF V1_8D_PMLDO V3_3D V1_8D_AM437X

2 FB1

FB6 DGND V1_8D_AM437X 1 2 V1_8D 150OHM800mA R463 R456 R139 0 R142 0 0 150OHM800mA TP20 0

1 FB7 TP1mm R149 0 CAP_VDD_RTC V1_8D_AM437X C60 C62 V3_3D_AM437X 1 2 V3_3D 0.01uF 0.01uF C66 C71 150OHM800mA

VDD_CORE VDDS_CTM 1uF 0.01uF

VDDA1P8_PMLDO VDDA3P3_PMLDO DGND VDD_TAMPER VDDS_TAMPER DGND

DGND DGND

P21 D6 F8

AD12 AD9

AD8 AD5 U11-20 AD3 AM437X_VDDS J10 J11 VDD_CORE L12 VDD_CORE VPP F20 L14 VDD_CORE VDDS G6 C210 C216 C200 C199 VDD_CORE VDDS AM437X_VDDS M9 VDD_TPM H12 V1_8D_PMLDO C214

VDDS_RTC

VDDS_TPM M12 VDD_CORE VDDS_CTM VDDS P19 10uF 0.01uF 0.01uF 0.01uF 0.01uF M14 VDD_CORE VDDS W15 N9 VDD_CORE CAP_VDD_RTC VDDS Y19 N16 VDD_CORE VDDA1P8_PMLDO VDDA3P3_PMLDO VDDS N17 VDD_CORE DGND P16 VDD_CORE V3_3D_AM437X P17 VDD_CORE VDD_CORE R9 J7 V3_3D_AM437X R11 VDD_CORE VDDSHV1 J8 R14 VDD_CORE VDDSHV1 C223 C52 C184 C201 C59 C256 T9 VDD_CORE C229 T11 VDD_CORE 10uF 0.01uF 0.01uF 0.01uF 0.01uF 0.01uF 0.01uF VDD_CORE T14 V16 V3_3D_AM437X T18 VDD_CORE VDDSHV2 V17 T19 VDD_CORE VDDSHV2 W16 U15 VDD_CORE VDDSHV2 DGND VDD_MPU V15 VDD_CORE W12 VDD_CORE VDD_CORE W13 AM437x Power J18 V3_3D_AM437X V3_3D_AM437X VDD_CORE VDDSHV3 K17 H13 Industrial EVM VDDSHV3 K18 H14 VDD_MPU VDDSHV3 N18 H16 VDD_MPU VDDSHV3 N19 C48 C181 C47 C204 C252 C53 J13 VDD_MPU VDDSHV3 P18 C189 J14 VDD_MPU VDDSHV3 W18 10uF 0.01uF 0.01uF 0.01uF 0.01uF 0.01uF 0.01uF J16 VDD_MPU VDDSHV3 K19 VDD_MPU 150OHM800mA FB9 K20 VDD_MPU VDD_MPU V1_8D_AM437X 1 2 L19 F22 V3_3D_AM437X DGND L20 VDD_MPU VDDSHV5 M17 VDD_MPU C173 M18 VDD_MPU 0.01uF VDD_MPU TP21 TP1mm D20 G16 V3_3D_AM437X VDD_MPU_MON VDDSHV6 G17 VDDSHV6 V1_8D_AM437X H17 DGND E23 VDDSHV6 C23 VDDS_CLKOUT C192 VDDS_OSC 0.01uF F16 VDDSHV7 V3_3D_AM437X F19 DGND E13 CAP_VBB_MPU 150OHM800mA FB10 E14 CAP_VDD_SRAM_CORE G13 CAP_VDD_SRAM_MPU VDDSHV8 V3_3D_AM437X V1_8D_AM437X 1 2 F13 G14 F14 VDDS_SRAM_CORE_BG VDDSHV8 N21 VDDS_SRAM_MPU_BB G5 VDDS_PLL_CORE_LCD VDDS_PLL_DDR E17 G11 V3_3D_AM437X VDDS_PLL_MPU VDDSHV9 H11 VDDSHV9 C206 C180 W21 VDDA1P8V_USB0 0.01uF 0.01uF U21 G10 V3_3D_AM437X C198 VDDA1P8V_USB1 VDDSHV10 H10 0.01uF W20 VDDSHV10 C242 U20 VDDA_3P3V_USB0 0.01uF VDDA_3P3V_USB1 W23 H8 V3_3D_AM437X C179 VSSA_USB VDDSHV11 H9 VDDA_MC_ADC 0.01uF VDDSHV11 DGND K7 VDDA_ADC 150OHM800mA DGND K8 VDD_DDR FB11 M7 VDD_DDR Y16 VDDA_MC_ADC 1 2 VDD_DDR VDDA_MC_ADC VDDA_ADC V1_8D_AM437X M8 AB12 1 2 V1_8D_AM437X N7 VDD_DDR VDDA_TS_ADC FB14 N8 VDD_DDR C217 C211 150OHM800mA R6 VDD_DDR AC15 150OHM800mA FB8 R7 VDD_DDR VSSA_ADC 0.01uF 0.01uF VDD_DDR V1_8D_AM437X 1 2 R8 C191 C218 T7 VDD_DDR 1uF 1uF T8 VDD_DDR H21 TP1mm TP19 DGND V7 VDD_DDR TESTOUT V8 VDD_DDR AA23 R444 DNI VDD_DDR TEST_EN V3_3D_AM437X DGND DGND C212 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND 1uF AM437X_ZDN

L8 L9

A1 K9 P8 P9 V9 U8 U9 DGND GNDA_ADC DGND

J12 J15 J17

L11 L15 L17 L18

T12 T15 T17

A25 K11 K12 K14 K15 P10 P11 P12 P13 P14 P15 V10 V11 V12 V13 V14 V18

H15 H18 N10 N11 N12 N13 N14 N15 R12 R15 R17 R18 U10 U11 U12 U13 U14 U16 U17 U18 U19

AE1

M10 M11 M13 M15 M16

C193 C195 C29 C30 AE25 DGND 0.01uF 0.01uF 0.01uF 0.01uF

DGND DGND DGND

VAM437X_DDR SCKT1 V1_5D MCH1 MCH2 AM437x C280 C231 C236 C234 C241 C233 C240 17x17 Socket 10uF 0.01uF 0.01uF 0.01uF 0.01uF 0.01uF 0.01uF MCH3 MCH4

DNI

DGND Figure 14. Processor Power Schematic

Main 24VDC Power Input TP14 C51 J12 TP V24_0D V1_8DREG V1_8D Power Jack RAPC722X F1 0.1uF L6 1 2 U40 1 VPWRIN_JCK VPWRIN_PREFUSE 1 2 VPWRIN_FUSED 100uH A2 A1 R379 0 D19 V24_0D U10 B2 VIN VOUT B1 MBRS140T Fuse 4A 1 8 C175 R415 VIN VOUT C322 BOOT LX 22uF 49.9 R360 C2 C168 3 2 100uF C97 C96 C95 C98 2 D11 DNI ON C1 10uF D21 0.1uF 0.1uF 10uF 1uF VIN 6 MBR0530T1 GND SMCJ26CA COMP DGND C171 TPS22922B 3 DGND 1uF ROSC 5 DGND C45 VSNS DGND 10uF 4 7 DGND R94 SS GND R95 R409 DGND 51K TPS5402D 60.4K 10K, 1% J13 DGND C44 1 0.01uF DGND DGND 2 R93 C46 8.06K DNI DGND DGND 2200pF

DGND DGND DGND

R359 0

C1 V3_3D V3_3DREG L4 R273 U29 0.1uF 1 2 0 A2 A1 R299 0 C67 47uH B2 VIN VOUT B1 V1_5DREG V1_5D V24_0D U3 VIN VOUT C134 L8 1 8 R302 R296 C2 10uF C131 R20 0.1uF 1 2 U52 BOOT LX ON C124 49.9 0 C1 220uF 33 82uH A2 A1 R486 0 2 D1 22uF GND V24_0D U15 B2 VIN VOUT B1 VIN 6 MBR0530T1 TPS22922B 1 8 VIN VOUT COMP C118 BOOT LX C269 R480 C2 C276 3 DGND DGND 1uF DGND 2 D13 22uF 49.9 ON C1 10uF ROSC 5 D2 VIN 6 MBR0530T1 GND C12 VSNS Green LED COMP C273 TPS22922B 10uF 4 7 R298 3 DGND DGND 1uF R18 SS GND R14 15K,1% DGND ROSC 5 DGND 51K TPS5402D 34K DGND C74 VSNS R481 C17 10uF 4 7 18K 0.01uF DGND R175 SS GND R173 DGND DGND R19 51K TPS5402D 49.9K 4.75K, 1% C77 C11 0.01uF DGND DGND DGND 2200pF DGND R176 C75 20.5K DGND DGND DGND DGND 2200pF

DGND DGND

R490 VDD_CORE VDD_MPU 0

V1_8D V3_3D V3_3DREG C88 V3_3DREG VDD_COREREG VDD_CORE L9 0.1uF 1 2 U53 R488 R224 47uH A2 A1 24K, 1% 10K V3_3DREG V24_0D U17 B2 VIN VOUT B1 0 R237 R234 R228 1 8 R492 VIN VOUT U26 10K 10K 10K BOOT LX C272 49.9 C2 C266 C271 1 14 2 D16 22uF ON C1 10uF 220uF R227 14K R229 R230R235 14K 60.4K MR VCC C114 VIN 6 MBR0530T1 GND 10 COMP C268 TPS22922B 9 SENSE1 12 0.01uF 3 DGND DGND 1uF 8 SENSE2 GND ROSC 5 R491 7 SENSE3 C81 VSNS 15K,1% 6 SENSE4L 13 10uF 4 7 DGND SENSE4H VREF R182 SS GND R184 DGND 20 15 V1_8DEN 51K TPS5402D 22K DGND WDI RESET1 16 PORZ_RELEASE C79 5 RESET2 17 VDD_CORE_EN PORZ_RELEASE <2> 0.01uF DGND 4 CT1 RESET3 18 VDD_MPU_EN DGND R181 3 CT2 RESET4 40.2K 2 CT3 19 C82 11 CT4 WDO DGND DGND 2200pF

R550 10K R551R556 10K R557 10K 10K

NC TPAD TPS386000 C346 C345 C344 C343 DGND DGND DGND 0.01uF 0.01uF 0.01uF 0.01uF TPAD R482 DGND 0 DGND

DGND V5_0D L7 C253 0.1uF 1 2 100uH V24_0D U14 1 8 R164 TP7 BOOT LX C254 49.9 V3_3D TP 2 D14 22uF V3_3D V3_3D VDD_MPU VIN 6 MBR0530T1 COMP 3 DGND DGND ROSC 5 R165 VSNS U35 L5 C70 16K R418 R424 R325 R355 A4 B4 VDD_MPU_OUT 1 2 VDD_MPU_SENSE R358 0 10uF 4 7 2.2K 2.2K 0 0 A1 VIN SW B3 1uH R156 SS GND R159 AVIN SW 51K TPS5402D 49.9K C165 C69 R324 B2 B1 VDD_MPU_SENSEP R52 0 10uF C27 0.01uF DGND V3_3D 0 EN SENSEP 220uF DGND R166 3.01K D1 C1 C72 U11-11 VDD SENSEM DGND DGND 2200pF

Y22 AM437X_I2C0_SCL R356 0 D3 C3 DGND I2C_SCL0 AB24 AM437X_I2C0_SDA R354 0 D2 SCL PGND C4 DGND DGND I2C_SDA0 SDA PGND D4 C2 PGND A3 VSEL0 A2 VSEL1 AGND TPS62362 DGND R425 R419 0 0

AM437x I2C0 Industrial EVM C157 TP9TP TP16TP TP1TP TP11TP AM437X_ZDN 0.1uF C148 C144 DGND DGND 0.1uF 10uF <11,12,17> GP_I2C_SCL <11,12,17> GP_I2C_SDA DGND DGND DGND DGND Figure 15. Power Schematic

V3_3D

U11-5 V3_3D R458 B12 AM437X_QSPI_CLK 10K GPMC_CSN3/QSPI_CLK A8 AM437X_QSPI_CSn GPMC_CSN0/QSPI_CSn A9 AM437X_QSPI_D0 U46 GPMC_ADVN_ALE/QSPI_D0 E10 AM437X_QSPI_D1 R128 0 SPIMEM_CLK 16 2 GPMC_OEN_REN/QSPI_D1 D10 AM437X_QSPI_D2 SCLK VCC GPMC_WEN/QSPI_D2 C10 AM437X_QSPI_D3 R137 SPIMEM_D0 15 GPMC_BE0N_CLE/QSPI_D3 R449 0 SPIMEM_D1 8 SI/SIO0 7 R457 0 SPIMEM_D2 9 SO/SIO1 CS C63 R453 0 SPIMEM_D3 1 WP/SIO2 0.01uF 0 DNU/SIO3 10 R152 0 3 GND <2,7,8,11,17,19> SYS_RESETn RESET 11 4 NC11 12 5 NC4 NC12 13 6 NC5 NC13 14 NC6 NC14

AM437x QSPI NOR Memory Industrial EVM MX66L51235FMI

AM437X_ZDN R144 0 SPIMEM_CS

DGND Figure 16. QSPI NOR Flash Memory Schematic

U20 DDR_CLK J7 N3 DDR_A0 DDR_CLKn K7 CK A0 P7 DDR_A1 DDR_CKE K9 CKn A1 P3 DDR_A2 DDR_CS0n L2 CKE A2 N2 DDR_A3 DDR_RASn J3 CSn A3 P8 DDR_A4 DDR_CASn K3 RASn A4 P2 DDR_A5 VDDS_DDR DDR_WEn L3 CASn A5 R8 DDR_A6 WEn A6 R2 DDR_A7 A7 T8 DDR_A8 DDR_D0 E3 A8 R3 DDR_A9 DDR_D1 F7 DQ0 A9 L7 DDR_A10 VDDS_DDR R226 DDR_D2 F2 DQ1 A10/AP R7 DDR_A11 C111 10K DDR_D3 F8 DQ2 A11 N7 DDR_A12 0.001uF DDR_D4 H3 DQ3 A12/BC T3 DDR_A13 DDR_D5 H8 DQ4 A13 T7 DDR_A14 DDR_D6 G2 DQ5 A14 DGND DDR_D7 H7 DQ6 M2 DDR_BA0 C299 C304 C277 C288 C324 DDR_D8 D7 DQ7 BA0 N8 DDR_BA1 0.01uF 0.01uF 0.01uF 0.01uF 0.01uF R549 DDR_D9 C3 DQ8 BA1 M3 DDR_BA2 10K C109 DDR_D10 C8 DQ9 BA2 0.001uF DDR_D11 C2 DQ10 K1 DDR_ODT DDR_D12 A7 DQ11 ODT V3_3D VDDS_DDR DDR_D13 DQ12 A2 B2 VDDS_DDR DGND DGND DDR_D14 B8 DQ13 VDD D9 DGND VDDS_DDR DDR_D15 A3 DQ14 VDD G7 DQ15 VDD K2 DDR_DQS0 F3 VDD K8 R233 C113 C107 C105 C341 DDR_DQSn0 LDQS VDD V1_5D R494 0 G3 N1 VDDS_DDR 100K 10uF U25 0.1uF 10uF 10uF LDQSn VDD N9 10 1 DDR_DQS1 C7 VDD R1 VIN REFIN DDR_DQSn1 B7 UDQS VDD R9 DGND 9 2 DGND DGND DGND UDQSn VDD PGOOD VLDOIN DDR_DQM0 E7 C279 C323 8 3 VDDR_VTT DDR_DQM1 D3 LDM A9 C315 C297 C289 GND VO UDM VSS 0.01uF 0.01uF 0.01uF B3 0.01uF 0.01uF V3_3D R232 7 VDDS_DDR A1 VSS E1 0 EN 4 C342 C104 C335 VDDS_DDR VDDQ VSS PGND A8 G8 VDDR_VREF 6 5 R225 10uF 10uF 10uF C1 VDDQ VSS J2 REFOUT PWRPD VOSNS 10 C9 VDDQ VSS J8 TPS51200 VDDQ VSS D2 M1 DGND C112 11 DGND DGND DGND E9 VDDQ VSS M9 0.1uF C285 C295 C292 C302 C80 F1 VDDQ VSS P1 0.01uF 0.01uF 0.01uF 0.01uF 22uF H2 VDDQ VSS P9 DGND DGND H9 VDDQ VSS T1 VDDS_DDR DGND DGND C106 C108 VDDQ VSS T9 0.1uF 10pF VSS U11-19 T1 DDR_RESETn DGND B1 T2 DDR_RESETn C313 DGND DGND DDR_RESETn B9 VSSQ RESETn 0.1uF DDR_CLK VSSQ M2 D1 M8 VDDR_VREF DDR_CK M1 DDR_CLKn D8 VSSQ VREFCA DDR_CKn M3 DDR_CKE0 R484 0 DDR_CKE E2 VSSQ H1 DDR_CKE0 N6 E8 VSSQ VREFDQ DDR_CKE1 M5 DDR_CS0n F9 VSSQ J1 DDR_CSN0 M4 G1 VSSQ NU0 J9 DDR_CSN1 N3 DDR_CASN G9 VSSQ NU1 L1 C330 C307 DDR_CASn N2 DDR_RASN VSSQ NU2 L9 0.1uF 0.1uF DDR_RASn N4 DDR_WEn L8 NU3 M7 DDR_WEn ZQ NU4 K1 DDR_BA0 MT41K256M16HA DDR_BA0 K2 DDR_BA1 DDR_BA1 K3 DDR_BA2 R504 DGND DDR_BA2 N1 DDR_A0 240 DDR_A0 L1 DDR_A1 DGND DGND DGND DDR_A1 L2 DDR_A2 DDR_A2 P2 DDR_A3 DDR_A3 P1 DDR_A4 DDR_A4 R5 DDR_A5 DGND DDR_A5 R4 DDR_A6 DDR_A6 R3 DDR_A7 DDR_A7 R2 DDR_A8 DDR_A8 R1 DDR_A9 DDR_A9 M6 DDR_A10 DDR_A10 T5 DDR_A11 DDR_A11 T4 DDR_A12 U21 DDR_A12 N5 DDR_A13 DDR_CLK J7 N3 DDR_A0 DDR_A13 T3 DDR_A14 DDR_CLKn K7 CK A0 P7 DDR_A1 DDR_A14 T2 DDR_CKE K9 CKn A1 P3 DDR_A2 DDR_A15 DDR_CS0n L2 CKE A2 N2 DDR_A3 E3 DDR_D0 DDR_RASn J3 CSn A3 P8 DDR_A4 DDR_D0 E2 DDR_D1 DDR_CASn K3 RASn A4 P2 DDR_A5 DDR_D1 E1 DDR_D2 DDR_WEn L3 CASn A5 R8 DDR_A6 DDR_D2 F3 DDR_D3 WEn A6 R2 DDR_A7 DDR_D3 G4 DDR_D4 A7 T8 DDR_A8 VDDS_DDR DDR_D4 G3 DDR_D5 DDR_D16 E3 A8 R3 DDR_A9 VDDR_VTT DDR_D5 G2 DDR_D6 DDR_D17 F7 DQ0 A9 L7 DDR_A10 DDR_D6 G1 DDR_D7 DDR_D18 F2 DQ1 A10/AP R7 DDR_A11 DDR_CLK R507 49.9 C306 DDR_D7 H1 DDR_D8 DDR_D19 F8 DQ2 A11 N7 DDR_A12 DDR_CLKn R508 49.9 0.1uF DDR_D8 J6 DDR_D9 DDR_D20 H3 DQ3 A12/BC T3 DDR_A13 DDR_CKE R199 47 DDR_D9 J5 DDR_D10 DDR_D21 H8 DQ4 A13 T7 DDR_A14 DDR_CS0n R521 47 DDR_D10 J4 DDR_D11 DDR_D22 G2 DQ5 A14 VDDS_DDR DDR_RASn R503 47 DDR_D11 J3 DDR_D12 DDR_D23 H7 DQ6 M2 DDR_BA0 DDR_CASn R532 47 AM437x DDR SDRAM DDR_D12 K6 DDR_D13 DDR_D24 D7 DQ7 BA0 N8 DDR_BA1 DDR_WEn R529 47 DDR_D13 K5 DDR_D14 DDR_D25 C3 DQ8 BA1 M3 DDR_BA2 DDR_D14 K4 DDR_D15 DDR_D26 C8 DQ9 BA2 DDR_A0 R528 47 DDR_D15 V5 DDR_D16 DDR_D27 C2 DQ10 K1 DDR_ODT C329 C301 DDR_A1 R218 47 DDR_D16 V4 DDR_D17 DDR_D28 A7 DQ11 ODT C282 C294 C290 DDR_A2 R530 47 DDR_D17 DDR_D18 DDR_D29 DQ12 0.01uF 0.01uF 0.01uF DDR_A3 V3 A2 B2 VDDS_DDR 0.01uF 0.01uF R535 47 DDR_D18 V2 DDR_D19 DDR_D30 B8 DQ13 VDD D9 DDR_A4 R520 47 DDR_D19 V1 DDR_D20 DDR_D31 A3 DQ14 VDD G7 DDR_A5 R533 47 C103 DDR_D20 W4 DDR_D21 DQ15 VDD K2 DDR_A6 R516 47 0.1uF DDR_D21 W5 DDR_D22 DDR_DQS2 F3 VDD K8 DDR_A7 R534 47 DDR_D22 W6 DDR_D23 DDR_DQSn2 G3 LDQS VDD N1 DGND DDR_A8 R221 47 DDR_D23 Y2 DDR_D24 LDQSn VDD N9 DDR_A9 R217 47 DDR_D24 Y3 DDR_D25 DDR_DQS3 C7 VDD R1 DDR_A10 R205 47 DGND DDR_D25 Y4 DDR_D26 DDR_DQSn3 B7 UDQS VDD R9 VDDS_DDR DDR_A11 R219 47 DDR_D26 AA3 DDR_D27 UDQSn VDD DDR_A12 R527 47 DDR_D27 AB2 DDR_D28 DDR_DQM2 E7 DDR_A13 R216 47 DDR_D28 AB1 DDR_D29 DDR_DQM3 D3 LDM A9 DDR_A14 R220 47 DDR_D29 AC1 DDR_D30 UDM VSS B3 C338 DDR_D30 DDR_D31 VSS DDR_BA0 AC2 VDDS_DDR VDDS_DDR A1 E1 R522 47 0.1uF DDR_D31 A8 VDDQ VSS G8 C296 C278 C318 C291 C316 DDR_BA1 R206 47 F4 DDR_DQM0 C1 VDDQ VSS J2 0.01uF 0.01uF 0.01uF 0.01uF 0.01uF DDR_BA2 R531 47 DDR_DQM0 H2 DDR_DQM1 C9 VDDQ VSS J8 DDR_ODT R517 47 DGND DDR_DQM1 V6 DDR_DQM2 D2 VDDQ VSS M1 DDR_DQM2 Y1 DDR_DQM3 E9 VDDQ VSS M9 DDR_DQM3 C328 C284 C283 C314 C102 F1 VDDQ VSS P1 F2 DDR_DQS0 V1_5D 0.01uF 0.01uF 0.01uF 0.01uF 22uF H2 VDDQ VSS P9 DGND DDR_DQS0 F1 DDR_DQSN0 H9 VDDQ VSS T1 VDDS_DDR DDR_DQS0n J2 DDR_DQS1 VDDQ VSS T9 DDR_DQS1 J1 DDR_DQSN1 VSS DDR_DQS1n W1 DDR_DQS2 DDR_DQS2 W2 DDR_DQSN2 R470 DGND B1 T2 DDR_RESETn C317 DDR_DQS2n AA1 DDR_DQS3 C247 2.2K, 1/8W B9 VSSQ RESETn 0.1uF DDR_DQS3 DDR_DQSN3 0.01uF VSSQ AA2 D1 M8 VDDR_VREF DDR_DQS3n D8 VSSQ VREFCA U1 DDR_ODT E2 VSSQ H1 DDR_ODT0 U2 E8 VSSQ VREFDQ DDR_ODT1 F9 VSSQ J1 T6 VAM437x_DDR_VREF G1 VSSQ NU0 J9 DDR_VREF AC3 G9 VSSQ NU1 L1 C312 C311 DDR_VTP VSSQ NU2 L9 0.1uF 0.1uF AM437X_ZDN C238 L8 NU3 M7 0.01uF R474 ZQ NU4 R162 2.2K, 1/8W MT41K256M16HA 49.9 DGND R198 240 DGND DGND DGND DGND DGND DGND

DGND Figure 17. DDR3 SDRAM Memory Schematic

V3_3D

V3_3D R77 V3_3D 2.2K

R380 0 V3_3D_PRUETH0JCK

R310 0 U11-10 U7 B22 AM437X_PRUETH0_TXCLK R410 0 PRUETH0_TXCLK 2 12 PRUETHER0_TDP J6 LCD_D0/PR1_MII0_MT_CLK A21 AM437X_PRUETH0_TXEN R405 0 PRUETH0_TXEN 3 TX_CLK TD+ 11 PRUETHER0_TDN LCD_D1/PR1_MII0_TXEN TX_EN TD- B20 AM437X_PRUETH0_TXD0 R391 0 PRUETH0_TXD0 4 8 LCD_D5/PR1_MII0_TXD0 A20 AM437X_PRUETH0_TXD1 R378 0 PRUETH0_TXD1 5 TXD_0 7 LCD_D4/PR1_MII0_TXD1 C21 AM437X_PRUETH0_TXD2 R377 0 PRUETH0_TXD2 6 TXD_1 10 PRUETHER0_RDP 6 LCD_D3/PR1_MII0_TXD2 B21 AM437X_PRUETH0_TXD3 R390 0 PRUETH0_TXD3 7 TXD_2 RD+ 9 PRUETHER0_RDN 5 LCD_D2/PR1_MII0_TXD3 TXD_3 RD- 4 C17 AM437X_PRUETH0_MRCLK R76 0 PRUETH0_RXCLK 25 3 LCD_D14/PR1_MII0_MR_CLK D17 AM437X_PRUETH0_RXDV R67 0 PRUETH0_RXDV 26 RX_CLK V3_3D 2 LCD_D15/PR1_MII0_RXDV D19 AM437X_PRUETH0_RXER R59 0 PRUETH0_RXERR 28 RX_DV 17 PRUETH0_LINKLED 1 LCD_D13/PR1_MII0_RXER RX_ERR LED_LINK B18 AM437X_PRUETH0_RXD0 R349 0 PRUETH0_RXD0 30 R411 0 9 LCD_D11/PR1_MII0_RXD0 A18 AM437X_PRUETH0_RXD1 R344 0 PRUETH0_RXD1 31 RXD_0 10 YEL LCD_D10/PR1_MII0_RXD1 B19 AM437X_PRUETH0_RXD2 R339 0 PRUETH0_RXD2 32 RXD_1 15 LCD_D9/PR1_MII0_RXD2 A19 AM437X_PRUETH0_RXD3 R337 0 PRUETH0_RXD3 1 RXD_2 PFBOUT 13 11 LCD_D8/PR1_MII0_RXD3 RXD_3 PFBIN1 24 R348 0 12 GRN G20 AM437X_PRUETH0_CRS R65 0 PRUETH0_CRS 27 PFBIN2 PRINT_MNA/PR1_MII0_CRS CRS

AM437x PRU #0 Ethernet Industrial EVM D25 AM437X_PRUETH0_COL R351 DNI 29 RJ-45 10_100Mb PRINT_NSTROBE/PR1_MII0_COL C19 COL TLK105L DGND LCD_D12/PR1_MII0_RXLINK R79 0 PRUETH0_MDC 20 14 VADD33_PRUETH0 R346 0 C153 C155 MDC AVDD33 V3_3D AM437X_ZDN R78 0 PRUETH0_MDIO 19 0.1uF 0.1uF SHLD1 SHLD2 MDIO R31 R43 R50 R56 49.9 49.9 49.9 49.9 PRUETH0_INT TP3 TP1mm 8 21 V3_3D PWRDNn/INTn VDD33_IO C137 <8> AM437X_PRUETH_MDCLK PRUETH0_RESETn 18 V3_3D V3_3D DGND 4700pF RESET_N C37 <8> AM437X_PRUETH_MDDATA 23 16 0.01uF C147 C150 <11> PRUETH0_25MHzCLK XI RBIAS C33 0.1uF 0.1uF 0.01uF C163 C38 C167 C164 22 DGND 0.1uF 0.1uF 10uF 0.1uF DGND AGNDFRAME_PRUETH0 XO DGND DGND

TPAD R362 TLK105L 4.87K DGND DGND DGND DGND PRUETH0_COL

TPAD

DGND DGND R57 2.2K Note: MDIO Address = 0x00

DGND AM437X_PRUETH0_RXLINK R434 0 R352 0

V3_3D V3_3D PRUETH0_RXD3 V3_3D PRUETH0_RXD2 PRUETH0_RXD1 V3_3D PRUETH0_RXD0 R412 10K C178 U39 20 0.01uF

<17> SYSBOOT[15..0] 5 SYSBOOT15 2 18 AM437X_PRUETH0_RXDV U43 SYSBOOT14 4 1A1 VCC 1Y1 16 AM437X_PRUETH0_MRCLK R417 0 1 DGND <8,19> AM437X_CAM1_DATA6 SYSBOOT13 6 1A2 1Y2 14 AM437X_PRUETH0_RXER 4 PRUETH0_RESETn SYSBOOT12 8 1A3 1Y3 12 AM437X_PRUETH0_RXLINK 2 <2,5,8,11,17,19> SYS_RESETn 1A4 1Y4 SN74LVC1G08

SYSBOOT11 11 9 AM437X_PRUETH0_RXD0 R44R46 2.2K R51 2.2K R55 2.2K 2.2K SYSBOOT10 13 2A1 2Y1 7 AM437X_PRUETH0_RXD1 3 SYSBOOT9 15 2A2 2Y2 5 AM437X_PRUETH0_RXD2 2A3 2Y3 AM437X_PRUETH0_RXD3

SYSBOOT8 17 74LV244A 3 2A4 2Y4 1 V3_3D DGND DGND R416 0 19 1OE# <2,20> PORZn 2OE#

SYSBOOT[15..0]

GND SN74LV244A C34

10 0.01uF V3_3D

DGND DGND

U9 20 J3 SYSBOOT7 2 18 R408 0 AM437X_LCD_DATA7 AM437X_PRUETH0_TXEN R404 0 RT_MII0_TXEN 1 2 RT_MII1_TXEN R157 0

VCC AM437X_LCD_DATA7 <19> AM437X_PRUETH1_TXEN <8> SYSBOOT6 4 1A1 1Y1 16 R406 0 AM437X_LCD_DATA6 AM437X_PRUETH0_RXDV R63 0 RT_MII0_RXDV 3 4 RT_MII1_RXDV R459 0 AM437X_LCD_DATA6 <19> AM437X_PRUETH1_RXDV <8> SYSBOOT5 6 1A2 1Y2 14 AM437X_PRUETH0_TXD0 R382 0 RT_MII_EDIO_DATA0 5 6 PR1_EDIO_DATA6 <19> AM437X_SPI0_D1 PR1_EDIO_DATA6 <19> SYSBOOT4 8 1A3 1Y3 12 AM437X_PRUETH0_TXD1 R384 0 RT_MII_EDIO_DATA1 7 8 PR1_EDIO_DATA7 <19> AM437X_SPI0_CS0n PR1_EDIO_DATA7 <19> 1A4 1Y4 9 10 SYSBOOT3 11 9 AM437X_PRUETH0_TXD2 SYSBOOT2 13 2A1 2Y1 7 AM437X_PRUETH0_TXD3 HEADER 5x2 SYSBOOT1 15 2A2 2Y2 5 AM437X_PRUETH0_TXEN 2A3 2Y3 AM437X_PRUETH0_TXCLK SYSBOOT0 17 74LV244A 3 2A4 2Y4 DGND 1 V3_3D 19 1OE# 2OE#

GND SN74LV244A C183

10 0.01uF

DGND DGND Figure 18. ICSS #0 Ethernet Schematic

AM437X_PRUETH1_MRCLK <19> AM437X_PRUETH1_TXCLK <19> AM437X_PRUETH1_TXD0 <19> AM437X_PRUETH1_TXD1 <19>

AM437X_PRUETH1_TXEN <7> V3_3D

V3_3D V3_3D R145 V3_3D 2.2K

R462 R438 0 V3_3D_PRUETH1JCK 2.2K R420 0 U11-8 U12 E8 AM437X_PRUETH1_TXCLK R141 0 PRUETH1_TXCLK 2 12 PRUETHER1_TDP J9 GPMC_A6/PR1_MII1_MT1_CLK C3 AM437X_PRUETH1_TXEN R155 0 PRUETH1_TXEN 3 TX_CLK TD+ 11 PRUETHER1_TDN GPMC_A0/PR1_MII1_TXEN TX_EN TD- E7 AM437X_PRUETH1_TXD0 R469 0 PRUETH1_TXD0 4 8 GPMC_A5/PR1_MII1_TXD0 D7 AM437X_PRUETH1_TXD1 R150 0 PRUETH1_TXD1 5 TXD_0 PRUETHER1_RDN 7 GPMC_A4/PR1_MII1_TXD1 A4 AM437X_PRUETH1_TXD2 R153 0 PRUETH1_TXD2 6 TXD_1 10 6 GPMC_A3/PR1_MII1_TXD2 C6 AM437X_PRUETH1_TXD3 R151 0 PRUETH1_TXD3 7 TXD_2 RD+ 9 PRUETHER1_RDP 5 GPMC_A2/PR1_MII1_TXD3 TXD_3 RD- 4 F6 AM437X_PRUETH1_MRCLK R466 0 PRUETH1_RXCLK 25 3 GPMC_A7/PR1_MII1_MR1_CLK C5 AM437X_PRUETH1_RXDV R461 0 PRUETH1_RXDV 26 RX_CLK V3_3D 2 GPMC_A1/PR1_MII1_RXDV B3 AM437X_PRUETH1_RXER R136 0 PRUETH1_RXERR 28 RX_DV 17 PRUETH1_LINKLED 1 GPMC_WPn/PR1_MII1_RXER RX_ERR LED_LINK D8 AM437X_PRUETH1_RXD0 R447 0 PRUETH1_RXD0 30 R475 0 9 GPMC_A11/MCASP0_D1 G8 AM437X_PRUETH1_RXD1 R445 0 PRUETH1_RXD1 31 RXD_0 10 YEL GPMC_A10/MCASP0_D0 B4 AM437X_PRUETH1_RXD2 R443 0 PRUETH1_RXD2 32 RXD_1 15 GPMC_A9/MCASP0_FSX F7 AM437X_PRUETH1_RXD3 R441 0 PRUETH1_RXD3 1 RXD_2 PFBOUT 13 11 GPMC_A8/MCASP0_ACLKX RXD_3 PFBIN1 24 R448 0 12 GRN F23 PRUETH1_CRS 27 PFBIN2

AM437x PRU #1 Ethernet Industrial EVM R140 0 PRINT_MB/PR1_MII1_CRS A3 R473 DNI 29 CRS RJ-45 10_100Mb GPMC_BE1n/PR1_MII1_COL E24 COL TLK105L DGND C222 PRINT_ON/PR1_MII1_RXLINK R147 0 PRUETH1_MDC 20 14 VADD33_PRUETH1 R446 0 C215 MDC AVDD33 V3_3D A12 PRUETH1_MDIO 19 R125 0.1uF 0.1uF SHLD1 SHLD2 GPMC_CLK/PR1_MDCLK D24 R146 0 MDIO C58 R101 R106 R131 XDMA_EVENT_INTR0/PR1_MDIO 0.01uF 49.9 49.9 49.9 PRUETH1_INT AM437X_ZDN TP8 TP1mm 8 21 V3_3D 49.9 PWRDNn/INTn VDD33_IO C188 PRUETH1_RESETn 18 V3_3D V3_3D DGND 4700pF RESET_N C64 <7> AM437X_PRUETH_MDCLK 23 16 0.01uF C208 C194 <7> AM437X_PRUETH_MDDATA <11> PRUETH1_25MHzCLK XI RBIAS 0.1uF 0.1uF DGND C232 C65 C244 C237 22 DGND 0.1uF 0.1uF 10uF 0.1uF DGND AGNDFRAME_PRUETH1 XO DGND DGND

TPAD R464 TLK105L 4.87K DGND DGND DGND AM437X_PRUETH1_RXDV <7>

TPAD

DGND DGND PRUETH1_COL Note: MDIO Address = 0x01

R452 DNI

DGND

R85 0 R134 0

V3_3D

R455 2.2K V3_3D V3_3D

C185 PRUETH1_RXD3 0.01uF PRUETH1_RXD2 PRUETH1_RXD1 5 U44 PRUETH1_RXD0 R431 0 1 DGND <7,19> AM437X_CAM1_DATA6 PRUETH1_COL 4 PRUETH1_RESETn 2 <2,5,7,11,17,19> SYS_RESETn SN74LVC1G08

DGND

R108R122 2.2K R127 2.2K R130 2.2K 2.2K

DGND Figure 19. ICSS #1 Ethernet Schematic

V3_3D V3_3D

LED0 1 LED1 1 A Red_Green_Yellow_LED A Red_Green_Yellow_LED

R G Y U1 R G Y U2

2 3 4 2 3 4

R272 R5 150 150

Q8 D Q3 D R10 R279 G R268 G R4 <19> AM437X_LCD_PCLK <17,19> AM437X_LCD_HSYNC S 150 S 150

0 R9 BSS138 0 R278 BSS138 100K 100K DGND DGND

Q6 D Q5 D

DGND DGND 0 R8 G 0 R275 G <17,19> AM437X_LCD_AC_BIAS_EN <19> AM437X_CAM1_WEN S R271 S R6 150 150 BSS138 BSS138 R7 R274 100K DGND 100K DGND

Q7 D Q4 D R12 R277 DGND DGND G G <17,19> AM437X_LCD_VSYNC <19> AM437X_CAM1_DATA2 S S

0 BSS138 0 BSS138 R11 R276 100K DGND 100K DGND

DGND DGND Figure 20. EtherCAT Schematic

V3_3D V3_3D

R231 R244 R267 R266 R236 10K 10K 10K 10K 10K C116 C115 SD/MMC0 Connector 0.1uF 4.7uF

DGND

AM437X_MMC0_DAT2 <16,19> U11-6 D1 AM437X_MMC0_CLK J19 MMC0_CLK/MMC0_CLK D2 AM437X_MMC0_CMD R161 0 MMC_D2 1 9 MMC0_CMD/MMC0_CMD R158 0 MMC_D3 2 DAT2 GND 10 C1 AM437X_MMC0_DAT0 R177 0 MMC_CMD 3 CD/DAT3 CD 11 MMC0_DAT0/MMC0_DAT0 C2 AM437X_MMC0_DAT1 4 CMD GND3 12 MMC0_DAT1/MMC0_DAT1 B2 AM437X_MMC0_DAT2 R179 0 MMC_CLK 5 VDD GND4 13 MMC0_DAT2/MMC0_DAT2 B1 AM437X_MMC0_DAT3 6 CLOCK GND5 14 MMC0_DAT3/MMC0_DAT3 R174 0 MMC_D0 7 VSS GND6 15 DAT0 GND7 R167 0 MMC_D1 8 microSD 16 <19> AM437X_MMC0_DAT1 DAT1 GND8 SCHA5B0200 AM437X_MMC0_DAT0 <19> R25 AM437X_MMC0_SDCD SPI0_CS1/MMC0_SDCD AM437X_MMC0_DAT3 <19> DGND DGND

AM437x MMC/SD Card0 Industrial EVM V3_3D

AM437X_ZDN R548 470K

R84 0 MMC_CD

1 2 3 6 7 8 3 5

2 U27

TPD6E001 IO1 IO2 IO3 IO4 IO5 IO6 IO1 IO2

U59

VCC GND TPD2E001

VCC GND NC1 NC2

1 4

5 4 9

V3_3D V3_3D DGND

DGND Figure 21. SDMMC #0 Interface Schematic

V3_3D VETH1_DVDDH VETH1_AVDDH VETH1_AVDDL_PMOS VETH1_AVDDL_PMOS VETH1_AVDDL_PLL V3_3D 600mAFB10ohm FB5 R401 600mAFB10ohm FB3 0 1 2 S D2 D1 1 2

C149 C43 C50 VETH1_DVDDL 0.1uF 10uF C142 C182 47uF C49 0.1uF 10uF Q9 47uF FB4 G FDT434P DGND DGND 1 2 DGND DGND 600mAFB10ohm C28 C162 DGND 10uF 0.1uF

ETH1_LDO_O DGND DGND

VETH1_AVDDL

FB2

1 2

600mAFB10ohm VETH1_DVDDH VETH1_AVDDL_PLL C21 C143 10uF 0.1uF

VETH1_DVDDH C26 C22 10uF 0.1uF DGND DGND C152 MMSD103T1 1 R361 0.01uF D20 100K

R66 1.5K DGND

U11-4 U37 44 43 D14 AM437X_RGMII1_TXCLK 22 R442 ETH1_TXCLK 24 MII1_TXCLK/RGMII1_TXCLK A13 AM437X_RGMII1_TXCTL 22 R121 ETH1_TXEN 25 GTX_CLK 2 MII1_TXEN/RGMII1_TXCTL TX_EN TXRXP_A 3 J4

B15 AM437X_RGMII1_TD0 22 R102 ETH1_TXD0 19 LDO_O TXRXM_A ETHER1_D0N 10 MII1_TXD0/RGMII1_TD0 A14 AM437X_RGMII1_TD1 22 R107 ETH1_TXD1 20 TXD0 5 ETHER1_D0P 9 MII1_TXD1/RGMII1_TD1 TXD1 TXRXP_B C13 AM437X_RGMII1_TD2 22 R123 ETH1_TXD2 21 AVDDL_PLL 6 ETHER1_D1N 8 MII1_TXD2/RGMII1_TD2 C16 AM437X_RGMII1_TD3 22 R439 ETH1_TXD3 22 TXD2 TXRXM_B ETHER1_D1P 7 MII1_TXD3/RGMII1_TD3 TXD3 7 ETHER1_D2N 6 D13 AM437X_RGMII1_RXCLK 22 R373 ETH1_RXCLK 35 TXRXP_C 8 ETHER1_D2P 5 MII1_RXCLK/RGMII1_RCLK A15 AM437X_RGMII1_RXCTL 22 R371 ETH1_RXDV 33 RX_CLK TXRXM_C ETHER1_D3N 4 MII1_RXDV/RGMII1_RXCTL RX_DV 10 ETHER1_D3P 3 F17 AM437X_RGMII1_RD0 22 R370 ETH1_RXD0 32 TXRXP_D 11 2 MII1_RXD0/RGMII1_RD0 B16 AM437X_RGMII1_RD1 22 R368 ETH1_RXD1 31 RXD0 TXRXM_D 1 MII1_RXD1/RGMII1_RD1 E16 AM437X_RGMII1_RD2 22 R367 ETH1_RXD2 28 RXD1 MII1_RXD2/RGMII1_RD2 RXD2

AM437x RGMII #1 Industrial EVM C14 AM437X_RGMII1_RD3 22 R365 ETH1_RXD3 27 17 PHY1_LED_ACTn R270 220 11 MII1_RXD3/RGMII1_RD3 RXD3 LED1 / PME_N1 15 PHY1_LED_LINKn 12 YEL B17 ETH_MDIO_CLK R374 0 LED2 MDIO_CLK/MDIO_CLK ETH_MDIO_DATA A17 R357 0 1 VETH1_AVDDH 13 MDIO_DATA/MDIO_DATA ETH1_MDC 36 AVDDH 12 R269 220 14 GRN AM437X_ZDN ETH1_MDIO 37 MDC AVDDH 47 MDIO AVDDH RJ-45 Gigabit

ETH1_RESETn 42 4 RESET_N AVDDL VETH1_AVDDL 9 SHLD1 SHLD2 46 AVDDL XI

16 VETH1_DVDDH 45 DVDDH 34 DGND DGND XO DVDDH 40 VETH1_DVDDH DVDDH 38 C121 INT_N / PME_N2 14 VETH1_DVDDL 0.1uF TP18 TP1mm 41 DVDDL 18 R353 CLK125_NDO DVDDL 23 C122 4.7K DVDDL 26 0.1uF C161 DVDDL 30 10uF 48 DVDDL 39 ISET DVDDL

J8 VSS VSS_PS P_GND 1 DGND GND_ETH1 HEADER 2 2 DGND KSZ9031RN

29 13 49

DGND R32 12.1K, 1%

DGND DGND

DGND VETH1_DVDDH

ETH1_RXD0 10K R396 R397 DNI V1_8D V3_3D VETH1_DVDDH

ETH1_RXD1 10K R395 R369 DNI C139 C141 VETH1_DVDDH C187 0.01uF 0.01uF 0.01uF C129 18pF V1_8D ETH1_RXDV DNI R399 R398 1K 5 U42 2 DGND DGND V3_3D DGND Y2 R307 2 4 ETH1_RESETn <2,5,7,8,17,19> SYS_RESETn 25MHz 1M U33 ETH1_RXD2 10K R393 1 3 R394 DNI 1 Xin/CLK VDD 6 SN74LVC1G07 C130 18pF R308 0 14 VDDOUT1 7 1 3 XOUT VDDOUT2 ETH1_RXD3 10K R392 2 11 R311 33 R366 DNI R21 0 13 S0 Y1 9 R312 33 PRUETH0_25MHzCLK <7> DGND <4,12,17> GP_I2C_SDA DGND R22 0 12 S1/SDA Y2 8 R323 33 ETH1GB_25MHzCLK PRUETH1_25MHzCLK <8> <4,12,17> GP_I2C_SCL S2/SCL Y3 4 5 Vctr GND1 10 GND2 ETH1_RXCLK DNI R400 R372 1K CDCE913 DGND PHY1_LED_LINKn DNI R336 R45 1K

PHY1_LED_ACTn DNI R345 R53 1K

DGND Figure 22. Gigabit Ethernet #1 Schematic

V3_3D V3_3D V2_8D

C166 C145 R347 0.01uF V3_3D V2_8D 0.01uF 10K U38 DGND 1 16 DGND VCCA VCCB CAM_SRCCLK 4 13 SENSOR_XCLK R350 0 CAM0_GIO0 5 1A1 1B1 12 SENSOR_RESET 1A2 1B2 AM437X_CAM0_VSYNC 6 11 SENSOR_VSYNC AM437X_CAM0_HSYNC 7 2A1 2B1 10 SENSOR_HREF V2_8A V2_8D 2A2 2B2 V2_8D 2 15 C151 3 1DIR 1OE 14 1uF 2DIR 2OE R13 8 9 0 GND GND DGND SN74AVC4T245 R15 R16 4.7K 4.7K DGND DGND DGND

V2_8A

V3_3D V2_8D V2_8D J5 1 24 SENSOR_Y2 U11-16 C156 C146 C2 C15 SENSOR_SIO_D 2 23 SENSOR_Y3 AC20 AM437X_CAM0_PCLK 0.01uF 0.01uF 10uF 0.01uF 3 22 SENSOR_Y4 CAM0_PCLK AD18 AM437X_CAM0_VSYNC R305 SENSOR_SIO_C 4 21 SENSOR_Y5 CAM0_VSYNC AE17 AM437X_CAM0_HSYNC V3_3D V2_8D 10K 5 20 SENSOR_Y6 CAM0_HSYNC DGND DGND SENSOR_VSYNC 6 19 SENSOR_Y7 U34 AGND 7 18 SENSOR_Y8 1 6 SENSOR_HREF 8 17 SENSOR_Y9 AE18 AM437X_CAM0_DATA0 VCCA VCCB R313 0 9 16 AM437X_CAM0_DATA0 <19> V1_5D CAM0_DATA0 AM437X_CAM0_PCLK 3 4 SENSOR_PCLK SENSOR_XCLK 10 15 SENSOR_RESET Y18 AM437X_CAM0_DATA2 A B SENSOR_PWRDN 11 14 CAM0_DATA2 AM437X_CAM0_DATA3 SENSOR_PCLK AA18 5 V2_8D 12 13 CAM0_DATA3 2 DIR GND C136 C14 AXK7L24223G AE20 AM437X_CAM0_DATA6 SN74AVC1T45 10uF 0.01uF CAM0_DATA6 AD20 AM437X_CAM0_DATA7

AM437x Camera0 Industrial EVM CAM0_DATA7 DGND DGND R304 AGND DGND DGND 0 AD17 AM437x_GPIO_CAM CAM0_WEN/GPIO C24 CAM_SRCCLK XDMA_EVENT_INTR1/CLKOUT2 V3_3D V2_8D AM437X_ZDN R17 0 DGND C20 C25 C123 C13 0.01uF V3_3D V2_8D 0.01uF 10uF 0.01uF

U6 AGND DGND DGND 1 24 DGND VCCA VCCB 23 DGND VCCB AM437X_CAM0_DATA0 R326 0 3 21 SENSOR_Y2 AM437X_CAM0_DATA1 R327 0 4 A1 B1 20 SENSOR_Y3 <14,19> AM437X_CAM0_DATA1 V3_3D AM437X_CAM0_DATA2 5 A2 B2 19 SENSOR_Y4 AM437X_CAM0_DATA3 6 A3 B3 18 SENSOR_Y5 AM437X_CAM0_DATA4 7 A4 B4 17 SENSOR_Y6 <14> AM437X_CAM0_DATA4 AM437X_CAM0_DATA5 8 A5 B5 16 SENSOR_Y7 <14> AM437X_CAM0_DATA5 R343 AM437X_CAM0_DATA6 9 A6 B6 15 SENSOR_Y8 <19> AM437X_CAM0_DATA6 DNI AM437X_CAM0_DATA7 10 A7 B7 14 SENSOR_Y9 A8 B8 2 22 DIR A1 <19> CAM_MTR_EN OE 11 12 GND 13 GND GND SN74LVC8T245 OV2659_Module DGND DGND

V3_3D

V2_8D V3_3D C126 0.01uF C140 0.01uF V2_8D V3_3D DGND R297 DGND 10K U31 3 7 VCCA VCCB SENSOR_SIO_C 5 8 GP_I2C_SCL GP_I2C_SCL <4,11,17> TP17 SENSOR_SIO_D 4 A1 B1 1 GP_I2C_SDA TP1mm A2 B2 GP_I2C_SDA <4,11,17> V2_8D 2 6 V1_8D V3_3D GND OE U30 TXS0102 1 6 V2_8D_OUT R303 0 IN OUT R309 V2_8D_EN 3 DGND 0 EN 5 V2_8D_FB R306 FB 39K C135 C132 4 2 15pF 2.2uF C133 NR GND 2.2uF TPS79301 C125 0.1uF DGND DGND R301 DGND 30.1K DGND

DGND Figure 23. Camera #0 Schematic

Industrial INPUTS V3_3D V5_0VOP

R54 10K C24 V5_0VOP 0.01uF

U11-22 DGND U4 D16 AM437X_SPI1_SCLK R437 0 INDUS_INPUTCLK 25 3 R295 1.2K, MELF INDUS_INPUT0 MII1_COL/SPI1_SCLK R99 0 INDUS_INPUTCSn 24 CLK IP0 5 R294 1.2K, MELF INDUS_INPUT1 V24_0D R105 0 INDUS_INPUTLDn 26 CE IP1 7 R293 1.2K, MELF INDUS_INPUT2 B13 AM437X_SPI1_D1 LD IP2 9 R292 1.2K, MELF INDUS_INPUT3 MII1_RXERR/SPI1_D1 27 IP3 11 R291 1.2K, MELF INDUS_INPUT4 C154 A16 AM437X_SPI1_CS0 U36 5 INDUS_INPUTSO 23 SIP IP4 18 R290 1.2K, MELF INDUS_INPUT5 0.001uF RMII1_REFCLK/SPI1_CS0n SOP IP5 20 R289 1.2K, MELF INDUS_INPUT6 B14 AM437X_GPIO_IND_LDn R111 0 4 2 1 IP6 22 R288 1.2K, MELF INDUS_INPUT7 MII1_CRS/SPI1_GPIO 2 DB0 IP7 DGND DB1 4

AM437x SPI1 Industrial EVM SN74LVC1G07 13 RE0 6 AM437X_ZDN 3 1 RLIM RE1 8 RE2 C3 C4 C5 C6 C7 C8 C9 V24_0D R338 49.9 14 10 C10 VCC RE3 12 RE4 V5_0VOP 15 17 5VOP RE5 19 RE6 21

0.022uF 0.022uF 0.022uF 0.022uF 0.022uF 0.022uF 0.022uF RE7 0.022uF

R33 R34 C23 R322 28 16

10uF DGND C138 C16 25K GND THRM TOK 2.2uF 0.01uF SN65HVS882 0 0 DGND

TH_PD DGND DGND DGND DGND DGND DGND

DGND

V3_3D Digital OUTPUTS

R100 R96 2.2K 2.2K

V5_0D

U11-17 U5 AC21 AM437X_I2C2_SCL R97 0 15 3 DRAIN0 D3 Green LED R287 150 CAM1_DATA1/I2C2_SCL AB20 AM437X_I2C2_SDA R98 0 2 SCL DRAIN0 4 DRAIN1 D4 Green LED R286 150 CAM1_DATA0/I2C2_DTA SDA DRAIN1 5 DRAIN2 D5 Green LED R285 150 V5_0D 9 DRAIN2 6 DRAIN3 D6 Green LED R284 150 10 A0 DRAIN3 11 DRAIN4 D7 Green LED R283 150 7 A1 DRAIN4 12 DRAIN5 D8 Green LED R282 150 C128 A2 DRAIN5 13 DRAIN6 D9 Green LED R281 150 2.2uF R430 R432 V3_3D 1 DRAIN6 14 DRAIN7 D10 Green LED R280 150 0 0 VCC DRAIN7 C19 C18 8 DGND

AM437x I2C2 Industrial EVM 1uF 0.01uF 16 G AM437X_ZDN GND TPIC2810 <19> IND_I2C_SCL DGND <19> IND_I2C_SDA DGND DGND

I/O Expansion Header V24_0D

J1 INDUS_INPUT0 1 2 INDUS_INPUT1 3 4 INDUS_INPUT2 5 6 INDUS_INPUT3 7 8 INDUS_INPUT4 9 10 INDUS_INPUT5 11 12 INDUS_INPUT6 13 14 INDUS_INPUT7 15 16 17 18 DRAIN0 19 20 DRAIN1 DRAIN2 21 22 DRAIN3 V5_0D V5_0D DRAIN4 23 24 DRAIN5 DRAIN6 25 26 DRAIN7 27 28 29 30 DGND 31 32 <15> AM437X_AIN0 AM437X_AIN4 <15> 33 34 <15> AM437X_AIN1 AM437X_AIN5 <15> 35 36 <15> AM437X_AIN2 AM437X_AIN6 <15> DGND 37 38 DGND <15> AM437X_AIN3 AM437X_AIN7 <15> 39 40

Header 20x2 Female

GNDA_ADC GNDA_ADC

Figure 24. Industrial I/O Schematic

V24_0MTR

Motor Drive C303 C326 C327 10uF 0.1uF 0.1uF

U23 21 16 4 DGND RESETn VM

17 NC 11 SLEEPn VM MOT_PGNDTOTAL <15> <19> AM437X_CAM1_DATA8 MTR_FAULT 18 5 MOT_OUT1 L2 1 2 MOTOR_OUT1 <19> AM437x_HDQ R81 FAULT OUT1 4.7uH 10K <19> AM437X_eHRPWM0B 1 6 MOT_PGND1 0.02 R538 CP1 PGND1 R562 U11-3 C94 95.3K AD24 R80 0 0.01uF 2 MOT_PGND1 <15> CAM1_DATA8/GPIO AC23 R83 0 DGND CP2 8 MOT_OUT2 L3 1 2 CAM1_VSYNC/eHRPWM0B OUT2 4.7uH MOT1_LEVEL R561 0 AE19 AM437X_eHRPWM3A R364 0 MOT1_ADC <15> CAM0_DATA4/eHRPWM3A AD19 AM437X_eHRPWM3B R363 0 26 7 MOT_PGND2 0.02 R537 CAM0_DATA5/eHRPWM3B H25 AM437X_eHRPWM4A R70 0 27 EN1 PGND2 R554 UART3_RXD/eHRPWM4A H24 AM437X_eHRPWM4B R187 0 IN1 4.99K C349 UART3_TXD/eHRPWM4B H22 AM437X_eHRPWM5A R132 0 24 MOT_PGND2 <15> 47nF UART3_CTSn/eHRPWM5A K24 AM437X_eHRPWM5B R138 0 25 EN2 9 MOT_OUT3 L1 1 2 UART3_RTSn/eHRPWM5B IN2 OUT3 4.7uH J17 22 1 N25 R61 0 23 EN3 10 MOT_PGND3 0.02 R536 DGND DGND SPI4_CS0/eHRPWM3_TRIPZONE N20 R62 0 IN3 PGND3 MOTOR_OUT2 2 SPI2_SCLK/eHRPWM4_TRIPZONE P22 R60 0 SPI2_D0/eHRPWM5_TRIPZONE MOT_PGND3 <15> 3 12 R215 0 V3_3MTRB COMPP

AM437x Motor Control Industrial EVM F11 V3_3MTR R190 0 15 R564 Connector_Screwdown GPMC_AD10/GPIO V3P3OUT 95.3K AB18 AM437X_eHRPWM3_SYNCO 13 402K R214 CAM0_DATA1/eHRPWM3_SYNCO COMPN AC25 AM437X_EXT_HW_TRIG R375 0 C99 0.1uF 3 19 R496 4.99K MOT2_LEVEL R563 0 CAM1_FIELD/EXT_HW_TRIG V24_0MTR VCP COMPOn V3_3MTR MOT2_ADC <15> AM437X_ZDN TPAD GND GND GND R555 C87 DRV8313 R213 R543 4.99K C350

0.47uF 14 20 28 4.99K C100 0 47nF <19> AM437X_eHRPWM1B 0.47uF

TPAD

<12,19> AM437X_CAM0_DATA1 DGND DGND DGND DGND <12> AM437X_CAM0_DATA4 <12> AM437X_CAM0_DATA5 DGND DGND MOTOR_OUT3

R186 0

R559 95.3K

MOT3_LEVEL R558 0 MOT3_ADC <15> V3_3D R553 R495 4.99K C348 4.99K 47nF

BSS84 S DGND DGND

MTR_FAULT G <19> MTR_FAULT

Q10

R183 220

D15 Red LED

DGND

Motor 24VDC Power Input

TP15 V24_0MTR TP J14 1 VMTR_PWRIN V24_0D V24_0MTR D17 2 MBRS140T C340 Connector_Screwdown 100uF C337 C339 D22 D18 0.1uF 10uF M17 MBRS140T SMCJ26CA 1 2

Shunt0.1in J11 HEADER 2 DGND DGND DGND

Figure 25. Motor Control Schematic

1.8V Motor ADC Reference V5_0D U28

4 5 VIN VREF V1_8DADC C119 V3_3MTR C117 3 C120 V2_5MTR 10uF R2 R3 EN 2 4.7uF 0.01uF

Motor Winding #1 10K 10K NC GND LM4132 R204 2.5V Motor Reference DGND 1 R196 33 28.7K Q2 D DGND DGND V3_3MTR

G C92 S

R195 5 0.01uF R497 R500 3 22K 33 V2_5MTR BSS138 <14> MOT_PGND1 1 IS_MIHB1 U56 Q1 D 4 1K 1 2 OPA365 U19 C286 IN OUT G DGND

2 V1_8D DGND S C308 180pF 0.001uF C293 GND R1 BSS138 0.47uF REF3025 100K DGND 3 R203 R502 19.1K DGND DGND R501 DGND <14,15> MOT_PGNDTOTAL C298 22K IS_IHB1 DGND DGND 1K

100pF25V10% C309 R509 22K R191 180pF 49.9K C85 100pF25V10%

DGND DGND

V24_0MTR

R154 95.3K

V3_3MTR MOTVM_ADC R454 0 V1_8DADC Motor Winding #2 V2_5MTR R476 R201 4.99K C68 R126 R194 33 47nF 0 28.7K

C56 U11-7 DGND DGND C57 ADC0_VREFP AD14 C90 0.1uF 0.001uF ADC0_VREFN AE14 ADC0_VREFP

R193 5 0.01uF R188 ADC0_VREFN 3 22K R450 DNI AA12 <14> MOT_PGND2 <13> AM437X_AIN0 1 IS_MIHB2 V3_3MTR R440 DNI IS_IHB1 Y12 ADC0_AIN0 <13> AM437X_AIN1 4 V2_5MTR R435 DNI Y13 ADC0_AIN1 <13> AM437X_AIN2 1K R436 DNI IS_IHB2 AA13 ADC0_AIN2 <13> AM437X_AIN3 OPA365 U18 C83 R104 DNI AB13 ADC0_AIN3 2 <13> AM437X_AIN4 DGND R505 R103 DNI IS_IHB3 AC13 ADC0_AIN4 <13> AM437X_AIN5 C300 180pF R208 R129 DNI AD13 ADC0_AIN5 33 <13> AM437X_AIN6 0.001uF 28.7K R124 DNI AE13 ADC0_AIN6 <13> AM437X_AIN7 ADC0_AIN7 DGND R200 <14> MOT1_ADC R506 19.1K DGND <14> MOT2_ADC R189 C89 GNDA_ADC

<14,15> MOT_PGNDTOTAL C305 R209 5 <14> MOT3_ADC

AM437x ADC0 Inputs 22K 0.01uF R207 Industrial EVM IS_IHB2 3 22K <14,15> MOT_PGNDTOTAL 1K 1 IDC_SENSE R109 0 AM437X_ZDN 4 100pF25V10% C84 R185 1K 22K U22 C325 R518 R192 180pF OPA365 2 DGND 22K 49.9K C86 C321 180pF 100pF25V10% 0.001uF R202 DNI

DGND R197 DGND R510 19.1K V1_8DADC DGND DGND

C310 DGND GNDA_ADC 1K R110 100pF25V10% 0

DGND R511 C54 V3_3MTR 49.9K C91 C55 U11-25 V2_5MTR 100pF25V10% 0.001uF 0.1uF ADC1_VREFP AE15 ADC1_VREFN AD15 ADC1_VREFP Motor Winding #3 ADC1_VREFN R223 R68 4.02K AC16 ADC1_AIN0 R210 33 DGND IS_MIHB2 AB16 28.7K R64 4.02K AA16 ADC1_AIN1 IS_MIHB3 AB15 ADC1_AIN2 R58 4.02K AA15 ADC1_AIN3 J2 IS_MIHB1 Y15 ADC1_AIN4 C101 1 AE16 ADC1_AIN5

R211 5 0.01uF R524 2 AD16 ADC1_AIN6 3 22K 3 ADC1_AIN7 <14> MOT_PGND3 1 IS_MIHB3 4 HEADER 3 1K

AM437x ADC1 Inputs GNDA_ADC GNDA_ADC Industrial EVM OPA365 U24 C334 2 DGND GNDA_ADC C332 180pF AM437X_ZDN 0.001uF

DGND R222 R525 19.1K DGND R523 <14,15> MOT_PGNDTOTAL C331 22K IS_IHB3 1K

100pF25V10% C333 R539 22K R212 180pF 49.9K C93 100pF25V10%

DGND DGND

Figure 26. Motor Sense Schematic

V3_3D V5_0D

V5_0D V5_0D C319 C336 V5_0D 0.01uF 0.01uF V3_3D V3_3D C110 V5_0D 0.001uF DGND DGND R545 R547 4.7K R544 R552 R560 R565 R542 4.7K R546 4.7K 4.99K 4.99K 4.99K V5_0D DGND 10K U58 4.7K 1 24 VCCA VCCB 23 J15 VCCB 1 U11-24 EQEP0A_IN 3 21 2 EQEP0B_IN 4 A1 B1 20 3 L24 EQEP0_INDEX 5 A2 B2 19 4 MCASP0_AHCLKX/eQEP0_STROBE EQEP0_STROBE 6 A3 B3 18 5 M25 7 A4 B4 17 6 MCASP0_AXR1/eQEP0_INDEX 8 A5 B5 16 L23 9 A6 B6 15 HEADER 6 MCASP0_ACLKR/eQEP0A_IN K23 10 A7 B7 14 C347 C351 C352 MCASP0_FSR/eQEP0B_IN A8 B8 0.001uF 0.001uF 0.001uF R515 0 2 R541 0 22 DIR DGND

AM437x eQEP0 Industrial EVM OE 11 DGND 12 GND 13 AM437X_ZDN GND GND DGND DGND SN74LVC8T245

DGND DGND

AM437X_MCASP0_FSR <19> AM437X_MCASP0_ACLKR <19>

AM437X_MCASP0_AHCLKX <19> AM437X_MCASP0_AXR1 <19>

V5_0D V5_0DENCOD PRU0_ENDAT0_CLK <19> FB17 PRU0_ENDAT0_OUT <19> 1 2 150OHM800mA AM437X_PRU0_ENDAT0_OUTEN <19> AM437X_PRU0_ENDAT0_IN <10,19>

V5_0DENCOD V24_0MTR

V3_3D V3_3D R428 0 R427 DNI U55 6 R483 R485 A R493 0 4 0 DNI TP12 TP 1 D R 7 3 B U11-15 2 DE 8 VENDAT RE VCC N24 AM437X_PRU0_ENDAT0_CLK C267 MCASP0_ACLKX/PRU0_ENDAT0_CLK R423 0 5 0.01uF J10 N22 AM437X_PRU0_ENDAT0_OUT R422 DNI GND 1 MCASP0_FSX/PRU0_ENDAT0_OUT SN65HVD78D 2 H23 AM437X_PRU0_ENDAT0_OUTEN 3 MCASP0_AXR0/PRU0_ENDAT0_OUTEN V3_3D DGND 4 5 6 7 R519 8

AM437x EnDAT Industrial EVM 10K 43-01028 AM437X_ZDN V3_3D R512 C270 120 U57 0.1uF 6 MTRA_GND R540 0 4 A R514 0 1 D MTRA_GND <10,19> AM437X_MMC0_DAT2 R 7 R526 0 3 B 2 DE 8 <19> ENDAT_EN RE VCC R513 0 C320 5 0.01uF GND SN65HVD78D DGND MTRA_GND

DGND Figure 27. Motor Encoders QEP and EnDAT

ID Memory

V3_3D V3_3D

U32 6 8 <4,11,12> GP_I2C_SCL 5 SCL VCC R300 <4,11,12> GP_I2C_SDA SDA C127 DNI 4 0.01uF 1 VSS 2 A0 3 A1 7 A2 WP CAT24C256W

DGND DGND

JTAG Pod Connector

V3_3D V3_3D V3_3D

R403 V3_3D R402 C190 4.7K 4.7K 0.01uF V3_3D

U11-18 C41 AA25 DGND 0.01uF JTAG_TCK J7 R426 V3_3D AA24 JTAG_TMS 1 2 TRSTn JTAG_TRSTn 10K JTAG_TDO Y20 JTAG_TDI 3 TMS TRSTn 4 R429 DGND JTAG_TDI Y24 5 TDI TDIS 6 0 5 U8 JTAG_TMS JTAG_TDO 7 TVDD NC 8 N23 R413 RTCK 9 TDO GND 10 R414 100 2 4 JTAG_EMU0 T24 JTAG_TCK 0 R407 TCK 11 TCKRTN GND 12 JTAGPOD_DET <18> JTAG_EMU1 JTAG_EMU0 0 13 TCK GND 14 JTAG_EMU1 Y25 R389 100 EMU_RSTn 15 EMU0 EMU1 16 C186 SN74LVC1G04 JTAG_TRSTn <2,5,7,8,11,19> SYS_RESETn SRST GND 1 3

AM437x JTAG Industrial EVM TP4 TP1mm EMU2 17 18 EMU3 TP1mm TP6 1uF TP5 TP1mm EMU4 19 EMU2 EMU3 20 AM437X_ZDN EMU4 GND DGND CTI JTAG DGND DGND C174 DGND R433 0.1uF 4.7K

DGND

JTAG_TCK <18> JTAG_TDI <18> JTAG_TMS <18> JTAG_TDO <18> JTAG_TRSTn <18>

JTAG_EMU0 <18> JTAG_EMU1 <18>

V3_3D V3_3D V3_3D

Boot Configuration

R47R48R49 DNI DNI DNI

R26R25R24 DNI R23 DNI R30R29 DNI 100KR28 100KR27 DNI DNI DNI R39R40R41R42 DNI R35 DNI DNI R36 DNI R37 DNI R38 DNI 100K DNI SYSBOOT3 SYSBOOT4 SYSBOOT11 SYSBOOT12 SYSBOOT18 SYSBOOT2 SYSBOOT5 SYSBOOT10 SYSBOOT13 <9,19> AM437X_LCD_AC_BIAS_EN SYSBOOT17 SYSBOOT1 SYSBOOT6 SYSBOOT9 SYSBOOT14 <9,19> AM437X_LCD_HSYNC SYSBOOT16 SYSBOOT0 SYSBOOT7 SYSBOOT8 SYSBOOT15 <9,19> AM437X_LCD_VSYNC

R340R342R341 10K 10K 10K

R318R319R320R321 10K R314 10K R315 10K R316 DNI R317 DNI 10K 10K 10K R331R330R329R328 10K R335 10K R334 10K R333 10K R332 10K 10K DNI 10K

DGND DGND DGND

SYSBOOT[15..0] <7> SYSBOOT[15..0] SYSBOOT0 SYSBOOT1 SYSBOOT2 SYSBOOT3 SYSBOOT4 SYSBOOT5 SYSBOOT6 SYSBOOT7 SYSBOOT8 SYSBOOT9 SYSBOOT10 SYSBOOT11 SYSBOOT12 SYSBOOT13 SYSBOOT14 SYSBOOT15 Figure 28. Debug and Configuration Schematic

V3_3FTDI V3_3D

C265 C264 0.01uF 0.01uF

V3_3FTDI DGND DGND V3_3D

U49 8 1 VCCB VCCA 7 2 JTAG_TDO <17> 6 B1 A1 3 B2 A2 V3_3D USBJTAG_ENn 4 5 OE GND SN74AVC2T244

DGND

V3_3FTDI V3_3D

U45 V3_3D 1 16 V3_3FTDI VCCA VCCB R451 4 13 5 1A1 1B1 12 JTAG_TCK <17> VUSB_FTDI 1A2 1B2 JTAG_TDI <17> 220OHM2A FB13 2 2 6 11 USB JTAG 1 2 0 FB16 FB15 7 2A1 2B1 10 JTAG_TMS <17> 2A2 2B2 JTAG_TRSTn <17> 220OHM2A C228 220OHM2A 2.2uF 2 15 USBJTAG_ENn R421 0 JTAGPOD_DET <17> V3_3FTDI V3_3FTDI V3_3D 3 1DIR 1OE 14 C226 C225 C76 0.01uF 2DIR 2OE 0.01uF 0.01uF C251 4.7uF 1 1 C259 0.01uF 8 9 DGND GND GND C239 0.01uF C235 C196 SN74AVC4T245 C249 0.01uF 0.01uF 0.01uF USB_MicroAB DGND DGND DGND 0.01uF FTDI_VPHY DGND DGND S4 VUSB_JTAG C250 C73 0.01uF S3 S4 1 C227 0.01uF DGND DGND S3 VBUS 2 C245 4.7uF FTDI_VPLL DM 3 C61 0.01uF DP 4 C209 0.01uF S2 ID 5 U47 DGND V3_3D S1 S2 GND 3 1 S1 5 IO1 VCC V1_8FTDI C246 0.01uF DGND V3_3D C274 J18 2 IO2 4 DGND NC GND C275 GNDUSBJ TPD2E001 DGND

DGND C258 0.01uF 4.7uF DGND

9 20 31 42 56 U13 12 37 64 0.01uF DGND V3_3FTDI DGND 16 F_ADBUS0 R133 0

ADBUS0 5 5 VPLL 17 F_ADBUS1 150OHM800mA FB12 C260 0.01uF VPHY R120 U50 U51 1 2 50 ADBUS1 18 F_ADBUS2 R119 0 1

VCCIO.1 VCCIO.2 VCCIO.3 VCCIO.4 VREGIN VCORE.1 VCORE.2 VCORE.3 ADBUS2 19 F_ADBUS3 R118 0 4 FT_SRESETn 2 4 FT_SRESETB R489 SYS_WARMRESETn <2> 49 ADBUS3 21 F_ADBUS4 R117 0 FT_VBUS 2 0 DGND VREGOUT ADBUS4 22 0 ADBUS5 23 F_ADBUS6 R116 SN74LVC1G00DCK SN74LVC1G07 GNDUSBJ DGND EMU_USB_DM 7 ADBUS6 24 0 3 1 3 EMU_USB_DP 8 DM ADBUS7 R460 DP 26 F_ADBUS5 R115 FT_SRESET DGND 12K, 1% ACBUS0 27 0 DGND FTDI_REF 6 ACBUS1 28 R114 0 REF ACBUS2 29 ACBUS3 30 F_ADBUS7 R113 R160 DGND 14 ACBUS4 32 0 4.7K R135 RESET# ACBUS5 33 10K ACBUS6 34 ACBUS7 AM437X_UART0_TXD <19> XTIN 2 38 UARTx_RXD XTIN BDBUS0 39 UARTx_TXD DGND U11-13 1 3 BDBUS1 40 Y4 XTOUT BDBUS2 41 R88 0 AM437X_UART0_TXD J24 BDBUS3 UART0_TXD 12MHz 43 R89 0 AM437X_UART0_RXD K25 BDBUS4 44 UART0_RXD 2 BDBUS5 45 R71 0 AM437X_UART0_RTSn J25 <19> PR1_EDC_SYNC1_OUT XTOUT BDBUS6 46 R112 VUSB_FTDI R72 0 AM437X_UART0_CTSn L25 UART0_RTSn <19> PR1_EDC_SYNC0_OUT 63 BDBUS7 0 UART0_CTSn EECS 48 62 BCBUS0 52 C261 C255 EESK BCBUS1 53 18pF 18pF 61 BCBUS2 54 R168

AM437x UART0 EEDATA BCBUS3 55 DGND 4.7K GP EVM BCBUS4 57 13 BCBUS5 58 V3_3FTDI V3_3D AM437X_ZDN DGND DGND TEST BCBUS6 59 R170 0 BCBUS7 60 R171 220 PWREN# 36 TP1mm TP10 C170 C169 SUSPEND# D12 0.01uF 0.01uF DGND Green LED

AGND GND.1 GND.2 GND.3 GND.4 GND.5 GND.6 GND.7 GND.8 FT2232HL R169 DGND DGND

1 5

10 11 15 25 35 47 51 10K V3_3FTDI V3_3D

U41 V3_3FTDI 1 8 VCCA VCCB DGND 2 7 R376 0 U16 DGND 3 A1 B1 6 R381 0 JTAG_EMU0 <17> 8 1 EECS A2 B2 JTAG_EMU1 <17> 7 VCC CS 2 EESK 5 4 USBJTAG_ENn 6 NC1 CLK 3 EEDATA GND OE C78 5 NC2 DI 4 SN74AVC2T244 0.1uF VSS DO 93LC56B R180 2.2K DGND

DGND DGND R178 10K Figure 29. USB JTAG Schematic

V3_3D

R472 10K

U11-23 AE11 AC18 R478 0 R477 0 User Switch AE12 XI_32K CAM0_FIELD AB25 AM437X_CAM1_WEN <9> AE10 XO_32K CAM1_WEN AD21 AM437X_CAM1_DATA2 <9> AE7 PMU_PORZ CAM1_DATA2 AE22 AM437X_CAM1_DATA3 AD7 EXT_WAKEUP1 CAM1_DATA3 AD22 AE8 PMIC_POWER_EN1 CAM1_DATA4 AE23 AM437X_CAM1_DATA5 2 1 AD1 PMU_HIBZ CAM1_DATA5 AD23 AM437X_CAM1_DATA6 SW1 TEMP_DIODE_P CAM1_DATA6 AM437X_CAM1_DATA6 <7,8> AD2 AE24 AM437X_CAM1_DATA7 B3SL AB6 TEMP_DIODE_N CAM1_DATA7 AC24 C262 TAMPER_EVENT CAM1_DATA9 1uF W25 C20 AM437X_LCD_DATA6 AM437X_LCD_DATA6 <7> W24 USB0_DP LCD_D6 E19 AM437X_LCD_DATA7 AM437X_LCD_DATA7 <7> 4 3 W22 USB0_DM LCD_D7 A22 AM437X_LCD_PCLK <9> U24 USB0_CE LCD_PCLK B23 AM437X_LCD_VSYNC DGND AM437X_LCD_VSYNC <9,17> U23 USB0_ID LCD_VSYNC A23 AM437X_LCD_HSYNC AM437X_LCD_HSYNC <9,17> G21 USB0_VBUS LCD_HSYNC A24 AM437X_LCD_AC_BIAS_EN USB0_DRVVBUS LCD_AC_BIAS_EN AM437X_LCD_AC_BIAS_EN <9,17> V24 F24 DGND V25 USB1_DP GPIO5_9 E25 0 R388 ENDAT_EN <16> U22 USB1_DM GPIO5_12 U25 USB1_CE AD25 AM437X_SD_CLKOUT T25 USB1_ID CAM1_HSYNC/SD_DATA_IN0 AE21 AM437X_SD_DATA_IN1 F25 USB1_VBUS CAM1_PCLK/SD_DATA_IN1 P25 AM437X_eHRPWM0_SYNCI USB1_DRVVBUS SPI4_SCLK/eHRPWM0_SYNCI P24 0 R73 AC12 SPI4_D1/eHRPWM0_TRIPZONE_I D11 AM437X_eHRPWM0_SYNCO AC10 RSV_AC12 GPMC_AD11/eHRPWM0_SYNCO P20 0 R383 AB10 RSV_AC10 SPI2_D1 T23 0 R74 AA10 RSV_AB10 SPI2_CS0 AA9 RSV_AA10 R24 SYNCI Y10 RSV_AA9 SPI4_D0 AC9 RSV_Y10 G24

AM437x GPIO & Unused Pins Y7 RSV_AC9 Industrial EVM ECAP0_IN_PWM0_OUT M24 AM437X_MCASP0_AHCLKR AA7 RSV_Y7 MCASP0_AHCLKR B5 AC6 RSV_AA7 GPMC_AD0 A5 AC5 RSV_AC6 GPMC_AD1 B6 AB7 RSV_AC5 GPMC_AD2 A6 RSV_AB7 GPMC_AD3 B7 AD10 GPMC_AD4 A7 AD11 RSV_AD10 GPMC_AD5 C8 RSV_AD11 GPMC_AD6 B8 AB9 GPMC_AD7 B10 AM437X_eHRPWM2A W10 RSV_AB9 GPMC_AD8/eHRPWM2A A10 AM437X_eHRPWM2B AC7 RSV_W10 GPMC_AD9/eHRPWM2B B9 PR1_EDIO_DATA6 <7> Y6 RSV_AC7 GPMC_CSN1/PR1_EDIO_DATA6 F10 PR1_EDIO_DATA7 <7> AE9 RSV_Y6 GPMC_CSN2/PR1_EDIO_DATA7 A2 CAM_MTR_EN CAM_MTR_EN <12> H19 RSV_AE9 GPMC_WAIT0 AB19 RSV_H19 CAM0_DATA8 AA19 CAM0_DATA9 U11-14 AM437X_ZDN R386 33 CAN0_RXDF K22 AM437X_DCAN0_TX UART1_CTSN/DCAN0_TX L22 AM437X_DCAN0_RX UART1_RTSN/DCAN0_RX R387 33 CAN0_TXDF

C176 C177 100pF25V10% 100pF25V10%

AM437x DCAN0 Industrial EVM DGND DGND

AM437X_ZDN

U11-12 R385 0 AM437X_SPI0_SCLK P23 SPI0_SCLK SPI0_DIN T22 SPI0_DOUT T21 SPI0_D0 <7> AM437X_SPI0_D1 SPI0_D1 SPI0_CS0n T20 <7> AM437X_SPI0_CS0n SPI0_CS0

AM437x SPI0 Expansion Connector Industrial EVM AM437X_ZDN V3_3D V5_0D

J16 U11-21 1 2 R265 0 SD0_CLKIN 3 4 AM437X_eHRPWM0B eQEP2_STROBE A11 <14> AM437X_CAM1_DATA8 AM437X_eHRPWM0B <14> R264 0 SD_CLKIN 5 6 AM437X_eHRPWM0_SYNCI GPMC_AD15/eQEP2_STROBE <12> AM437X_CAM0_DATA0 AM437X_SD_CLKOUT R263 0 SD_DATA_IN0_SD_CLKOUT 7 8 AM437X_eHRPWM012_TRPZONE eQEP2_INDEX B11 AM437X_SD_DATA_IN1 R262 0 SD_DATA_IN1 9 10 AM437X_eHRPWM0_SYNCO GPMC_AD14/eQEP2_INDEX R261 0 SD_DATA_IN2 11 12 AM437X_eHRPWM1B eQEP2A_IN E11 <18> AM437X_UART0_TXD AM437X_eHRPWM1B <14> AM437X_LCD_HSYNC R260 0 SD_DATA_IN3 13 14 AM437X_eHRPWM2A eQEP2B_IN C11 GPMC_AD12/eQEP2A_IN AM437X_LCD_AC_BIAS_EN R259 0 SD_DATA_IN4 15 16 AM437X_eHRPWM2B GPMC_AD13/eQEP2B_IN AM437X_CAM1_DATA3 R258 0 SD_DATA_IN5_PR1_EDC_LATCH0_IN 17 18 PR1_EDC_SYNC0_OUT PR1_EDC_SYNC0_OUT <18> AM437X_CAM1_DATA5 R255 0 SD_DATA_IN6 19 20 R256 0 PR1_EDC_SYNC1_OUT

AM437x eQEP2 PR1_EDC_SYNC1_OUT <18> Industrial EVM AM437X_CAM1_DATA7 R254 0 SD_DATA_IN7 21 22 R257 DNI eHRPWM3_SYNCI R253 0 eHRPWM3_SYNCO 23 24 eHRPWM0A SPI0_SCLK <12,14> AM437X_CAM0_DATA1 25 26 SPI0_DIN AM437X_ZDN <2,5,7,8,11,17> SYS_RESETn 27 28 SPI0_DOUT <13> IND_I2C_SCL 29 30 SPI0_CS0n <13> IND_I2C_SDA 31 32 PRU0_ENDAT1_CLK R252 0 AM437X_MCASP0_AHCLKR U11-9 <16> PRU0_ENDAT0_CLK 33 34 PRU0_ENDAT1_OUT R251 0 <16> PRU0_ENDAT0_OUT AM437X_MCASP0_ACLKR <16> 35 36 PRU0_ENDAT1_OUTEN R250 0 L21 AM437X_PROFI_TXD <16> AM437X_PRU0_ENDAT0_OUTEN AM437X_MCASP0_FSR <16> 37 38 PRU0_ENDAT1_IN R249 0 UART1_TXD K21 AM437X_PROFI_RXD <10,16> AM437X_PRU0_ENDAT0_IN AM437X_MMC0_DAT1 <10> R247 0 39 40 UART1_RXD <12> AM437X_CAM0_DATA6 CAN0_RXDF R248 DNI CAN0_RXDF_PR1_EDC_LATCH0_IN 41 42 eQEP2_INDEX CAN0_TXDF R246 DNI CAN0_TXDF_PR1_EDC_LATCH1_IN 43 44 eQEP2_STROBE R245 0 AM437X_PROFI_TXD 45 46 eQEP2A_IN <14> MTR_FAULT AM437X_PROFI_RXD 47 48 eQEP2B_IN AM437X_LCD_DATA6 PROF_TXENABLE 49 50 HDQ R243 0 AM437x_HDQ <14> R241 0 eQEP1_INDEX 51 52 PRU0_ENDAT2_CLK R242 0 <8> AM437X_PRUETH1_TXCLK AM437X_MCASP0_AXR1 <16> R465 0 eQEP1_STROBE 53 54 PRU0_ENDAT2_OUT R240 0 <8> AM437X_PRUETH1_MRCLK AM437X_MCASP0_AHCLKX <16>

AM437x ProfiBus R471 0 eQEP1B_IN 55 56 PRU0_ENDAT2_OUTEN R239 0 Industrial EVM <8> AM437X_PRUETH1_TXD0 AM437X_MMC0_DAT3 <10> R468 0 eQEP1A_IN 57 58 PRU0_ENDAT2_IN R238 0 <8> AM437X_PRUETH1_TXD1 AM437X_MMC0_DAT0 <10> 59 60 AM437X_ZDN

Header_30x2_Female

DGND DGND

Figure 30. Expansion Schematic

C243

15pF

C248 Y3 1 4 2 3 32.768KHz MC-306 15pF

R467 0

V1_8D V3_3D

C263 R479 0.01uF U11-1 10K V3_3D

AE5 DGND OSC1_IN AE4 OSC1_OUT

AD4 GND_OSC1 5 U48 VSS_RTC AE6 R148 4 2 PORZn PORZn <2,7> RTC_PORZ 0 AE3 R163 TP13TP EXT_WAKEUP0 0 SN74LVC1G07 AD6 R143 3 1 PMIC_POWER_EN0 0

AM437x RTC Industrial EVM AE2 DGND ENZ_KALDO_1P8V AM437X_ZDN

R172 10K

DGND Figure 31. RTC Schematic

TIDUAD6–August 2015 Sercos III Slave For AM437x — Communication Development Platform 29 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Design Files www.ti.com 7.3 Bill of Materials To download the bill of materials (BOM), see the design files at TIDEP0039.

7.4 PCB Layout To download the layer plots, see the design files at TIDEP0039.

7.5 Gerber Files To download the Gerber files, see the design files at TIDEP0039.

30 Sercos III Slave For AM437x — Communication Development Platform TIDUAD6–August 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated www.ti.com Software Files 8 Software Files To download the software files, see the design files at TIDEP0039.

9 References

1. Texas Instruments, AM437x Sitara™ Processors, AM4379 Datasheet (SPRS851) 2. Texas Instruments, AM437x ARM® Cortex™-A9 Processors, AM4379 Technical Reference Manual (SPRUHL7) 3. Texas Instruments, TLK10xL Industrial Temp, Single Port 10/100Mbps Ethernet Physical Layer Transceiver, TLK105L Datasheet (SLLSEE3)

10 Terminology ICSS— Industrial Communication Subsystem MII— Media Independent Interface PLC— Programmable Logic Controller PRU— Programmable Real-time Unit RTOS— Real-time Operating System SoC— System-on-chip TRM— Technical Reference Manual

11 About the Author THOMAS MAUER is a System Applications Engineer in the Factory Automation and Control Team at Texas Instruments Freising, where he is responsible for developing reference design solutions for the industrial segment. Thomas brings to this role his extensive experience in industrial communications like Industrial Ethernet, fieldbuses, and industrial applications. Thomas earned his electrical engineering degree (Dipl. Ing. (FH)) at the University of Applied Sciences in Wiesbaden, Germany.

TIDUAD6–August 2015 Sercos III Slave For AM437x — Communication Development Platform 31 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated IMPORTANT NOTICE FOR TI REFERENCE DESIGNS

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